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| author |   Mike Pagano <mpagano@gentoo.org> | 2018-04-24 07:31:20 -0400 |
|---|---|---|
| committer | Mike Pagano <mpagano@gentoo.org> | 2018-04-24 07:31:20 -0400 |
| commit | a3bf978c7d70cc9633c062dcfbaa009437563b42 (patch) | |
| tree | 32e245e48cf81bfe9abe3d85388f0ea06cca9613 | |
| parent | Linux patch 4.16.3 (diff) | |
| download | linux-patches-a3bf978c7d70cc9633c062dcfbaa009437563b42.tar.gz linux-patches-a3bf978c7d70cc9633c062dcfbaa009437563b42.tar.bz2 linux-patches-a3bf978c7d70cc9633c062dcfbaa009437563b42.zip | |
Linux patch 4.16.44.16-5
| -rw-r--r-- | 0000_README | 4 | ||||
| -rw-r--r-- | 1003_linux-4.16.4.patch | 7880 |
2 files changed, 7884 insertions, 0 deletions
diff --git a/0000_README b/0000_README index 65c079f7..c1274415 100644 --- a/0000_README +++ b/0000_README @@ -55,6 +55,10 @@ Patch: 1002_linux-4.16.3.patch From: http://www.kernel.org Desc: Linux 4.16.3 +Patch: 1003_linux-4.16.4.patch +From: http://www.kernel.org +Desc: Linux 4.16.4 + Patch: 1500_XATTR_USER_PREFIX.patch From: https://bugs.gentoo.org/show_bug.cgi?id=470644 Desc: Support for namespace user.pax.* on tmpfs. diff --git a/1003_linux-4.16.4.patch b/1003_linux-4.16.4.patch new file mode 100644 index 00000000..e8ddb45a --- /dev/null +++ b/1003_linux-4.16.4.patch @@ -0,0 +1,7880 @@ +diff --git a/Makefile b/Makefile +index 38df392e45e4..d51175192ac1 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 + VERSION = 4 + PATCHLEVEL = 16 +-SUBLEVEL = 3 ++SUBLEVEL = 4 + EXTRAVERSION = + NAME = Fearless Coyote + +diff --git a/arch/arm/boot/dts/at91sam9g25.dtsi b/arch/arm/boot/dts/at91sam9g25.dtsi +index a7da0dd0c98f..0898213f3bb2 100644 +--- a/arch/arm/boot/dts/at91sam9g25.dtsi ++++ b/arch/arm/boot/dts/at91sam9g25.dtsi +@@ -21,7 +21,7 @@ + atmel,mux-mask = < + /* A B C */ + 0xffffffff 0xffe0399f 0xc000001c /* pioA */ +- 0x0007ffff 0x8000fe3f 0x00000000 /* pioB */ ++ 0x0007ffff 0x00047e3f 0x00000000 /* pioB */ + 0x80000000 0x07c0ffff 0xb83fffff /* pioC */ + 0x003fffff 0x003f8000 0x00000000 /* pioD */ + >; +diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi +index 56626d1a4235..cf89385e7888 100644 +--- a/arch/arm/boot/dts/exynos5250.dtsi ++++ b/arch/arm/boot/dts/exynos5250.dtsi +@@ -655,7 +655,7 @@ + power-domains = <&pd_gsc>; + clocks = <&clock CLK_GSCL0>; + clock-names = "gscl"; +- iommu = <&sysmmu_gsc0>; ++ iommus = <&sysmmu_gsc0>; + }; + + gsc_1: gsc@13e10000 { +@@ -665,7 +665,7 @@ + power-domains = <&pd_gsc>; + clocks = <&clock CLK_GSCL1>; + clock-names = "gscl"; +- iommu = <&sysmmu_gsc1>; ++ iommus = <&sysmmu_gsc1>; + }; + + gsc_2: gsc@13e20000 { +@@ -675,7 +675,7 @@ + power-domains = <&pd_gsc>; + clocks = <&clock CLK_GSCL2>; + clock-names = "gscl"; +- iommu = <&sysmmu_gsc2>; ++ iommus = <&sysmmu_gsc2>; + }; + + gsc_3: gsc@13e30000 { +@@ -685,7 +685,7 @@ + power-domains = <&pd_gsc>; + clocks = <&clock CLK_GSCL3>; + clock-names = "gscl"; +- iommu = <&sysmmu_gsc3>; ++ iommus = <&sysmmu_gsc3>; + }; + + hdmi: hdmi@14530000 { +diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +index 7bf5aa2237c9..7de704575aee 100644 +--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts ++++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +@@ -39,6 +39,24 @@ + }; + }; + ++ reg_3p3v: regulator-3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "fixed-3.3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ reg_5v: regulator-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "fixed-5V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ + gpio_keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; +@@ -468,12 +486,14 @@ + }; + + &usb1 { +- vusb33-supply = <&mt6323_vusb_reg>; ++ vusb33-supply = <®_3p3v>; ++ vbus-supply = <®_5v>; + status = "okay"; + }; + + &usb2 { +- vusb33-supply = <&mt6323_vusb_reg>; ++ vusb33-supply = <®_3p3v>; ++ vbus-supply = <®_5v>; + status = "okay"; + }; + +diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi +index 373b3621b536..c7105096c623 100644 +--- a/arch/arm/boot/dts/sama5d4.dtsi ++++ b/arch/arm/boot/dts/sama5d4.dtsi +@@ -1379,7 +1379,7 @@ + pinctrl@fc06a000 { + #address-cells = <1>; + #size-cells = <1>; +- compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; ++ compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus"; + ranges = <0xfc068000 0xfc068000 0x100 + 0xfc06a000 0xfc06a000 0x4000>; + /* WARNING: revisit as pin spec has changed */ +diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c +index dc4346ecf16d..a1055a2b8d54 100644 +--- a/arch/arm/mach-exynos/pm.c ++++ b/arch/arm/mach-exynos/pm.c +@@ -271,11 +271,7 @@ static int exynos_cpu0_enter_aftr(void) + goto fail; + + call_firmware_op(cpu_boot, 1); +- +- if (soc_is_exynos3250()) +- dsb_sev(); +- else +- arch_send_wakeup_ipi_mask(cpumask_of(1)); ++ dsb_sev(); + } + } + fail: +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +index ee4ada61c59c..93a7830706f5 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +@@ -310,7 +310,7 @@ + pinctrl-names = "default", "clk-gate"; + + bus-width = <8>; +- max-frequency = <200000000>; ++ max-frequency = <100000000>; + non-removable; + disable-wp; + cap-mmc-highspeed; +diff --git a/arch/mips/include/asm/uaccess.h b/arch/mips/include/asm/uaccess.h +index b71306947290..06629011a434 100644 +--- a/arch/mips/include/asm/uaccess.h ++++ b/arch/mips/include/asm/uaccess.h +@@ -654,6 +654,13 @@ __clear_user(void __user *addr, __kernel_size_t size) + { + __kernel_size_t res; + ++#ifdef CONFIG_CPU_MICROMIPS ++/* micromips memset / bzero also clobbers t7 & t8 */ ++#define bzero_clobbers "$4", "$5", "$6", __UA_t0, __UA_t1, "$15", "$24", "$31" ++#else ++#define bzero_clobbers "$4", "$5", "$6", __UA_t0, __UA_t1, "$31" ++#endif /* CONFIG_CPU_MICROMIPS */ ++ + if (eva_kernel_access()) { + __asm__ __volatile__( + "move\t$4, %1\n\t" +@@ -663,7 +670,7 @@ __clear_user(void __user *addr, __kernel_size_t size) + "move\t%0, $6" + : "=r" (res) + : "r" (addr), "r" (size) +- : "$4", "$5", "$6", __UA_t0, __UA_t1, "$31"); ++ : bzero_clobbers); + } else { + might_fault(); + __asm__ __volatile__( +@@ -674,7 +681,7 @@ __clear_user(void __user *addr, __kernel_size_t size) + "move\t%0, $6" + : "=r" (res) + : "r" (addr), "r" (size) +- : "$4", "$5", "$6", __UA_t0, __UA_t1, "$31"); ++ : bzero_clobbers); + } + + return res; +diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S +index a1456664d6c2..f7327979a8f8 100644 +--- a/arch/mips/lib/memset.S ++++ b/arch/mips/lib/memset.S +@@ -219,7 +219,7 @@ + 1: PTR_ADDIU a0, 1 /* fill bytewise */ + R10KCBARRIER(0(ra)) + bne t1, a0, 1b +- sb a1, -1(a0) ++ EX(sb, a1, -1(a0), .Lsmall_fixup\@) + + 2: jr ra /* done */ + move a2, zero +@@ -252,13 +252,18 @@ + PTR_L t0, TI_TASK($28) + andi a2, STORMASK + LONG_L t0, THREAD_BUADDR(t0) +- LONG_ADDU a2, t1 ++ LONG_ADDU a2, a0 + jr ra + LONG_SUBU a2, t0 + + .Llast_fixup\@: + jr ra +- andi v1, a2, STORMASK ++ nop ++ ++.Lsmall_fixup\@: ++ PTR_SUBU a2, t1, a0 ++ jr ra ++ PTR_ADDIU a2, 1 + + .endm + +diff --git a/arch/powerpc/include/asm/barrier.h b/arch/powerpc/include/asm/barrier.h +index 10daa1d56e0a..c7c63959ba91 100644 +--- a/arch/powerpc/include/asm/barrier.h ++++ b/arch/powerpc/include/asm/barrier.h +@@ -35,7 +35,8 @@ + #define rmb() __asm__ __volatile__ ("sync" : : : "memory") + #define wmb() __asm__ __volatile__ ("sync" : : : "memory") + +-#ifdef __SUBARCH_HAS_LWSYNC ++/* The sub-arch has lwsync */ ++#if defined(__powerpc64__) || defined(CONFIG_PPC_E500MC) + # define SMPWMB LWSYNC + #else + # define SMPWMB eieio +diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h +index 12e70fb58700..fcf3ed5b8b18 100644 +--- a/arch/powerpc/include/asm/opal.h ++++ b/arch/powerpc/include/asm/opal.h +@@ -21,6 +21,9 @@ + /* We calculate number of sg entries based on PAGE_SIZE */ + #define SG_ENTRIES_PER_NODE ((PAGE_SIZE - 16) / sizeof(struct opal_sg_entry)) + ++/* Default time to sleep or delay between OPAL_BUSY/OPAL_BUSY_EVENT loops */ ++#define OPAL_BUSY_DELAY_MS 10 ++ + /* /sys/firmware/opal */ + extern struct kobject *opal_kobj; + +diff --git a/arch/powerpc/include/asm/synch.h b/arch/powerpc/include/asm/synch.h +index 63e7f5a1f105..6ec546090ba1 100644 +--- a/arch/powerpc/include/asm/synch.h ++++ b/arch/powerpc/include/asm/synch.h +@@ -6,10 +6,6 @@ + #include <linux/stringify.h> + #include <asm/feature-fixups.h> + +-#if defined(__powerpc64__) || defined(CONFIG_PPC_E500MC) +-#define __SUBARCH_HAS_LWSYNC +-#endif +- + #ifndef __ASSEMBLY__ + extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup; + extern void do_lwsync_fixups(unsigned long value, void *fixup_start, +diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c b/arch/powerpc/kernel/dt_cpu_ftrs.c +index 8ca5d5b74618..078553a177de 100644 +--- a/arch/powerpc/kernel/dt_cpu_ftrs.c ++++ b/arch/powerpc/kernel/dt_cpu_ftrs.c +@@ -84,6 +84,7 @@ static int hv_mode; + + static struct { + u64 lpcr; ++ u64 lpcr_clear; + u64 hfscr; + u64 fscr; + } system_registers; +@@ -92,6 +93,8 @@ static void (*init_pmu_registers)(void); + + static void __restore_cpu_cpufeatures(void) + { ++ u64 lpcr; ++ + /* + * LPCR is restored by the power on engine already. It can be changed + * after early init e.g., by radix enable, and we have no unified API +@@ -104,8 +107,10 @@ static void __restore_cpu_cpufeatures(void) + * The best we can do to accommodate secondary boot and idle restore + * for now is "or" LPCR with existing. + */ +- +- mtspr(SPRN_LPCR, system_registers.lpcr | mfspr(SPRN_LPCR)); ++ lpcr = mfspr(SPRN_LPCR); ++ lpcr |= system_registers.lpcr; ++ lpcr &= ~system_registers.lpcr_clear; ++ mtspr(SPRN_LPCR, lpcr); + if (hv_mode) { + mtspr(SPRN_LPID, 0); + mtspr(SPRN_HFSCR, system_registers.hfscr); +@@ -325,8 +330,9 @@ static int __init feat_enable_mmu_hash_v3(struct dt_cpu_feature *f) + { + u64 lpcr; + ++ system_registers.lpcr_clear |= (LPCR_ISL | LPCR_UPRT | LPCR_HR); + lpcr = mfspr(SPRN_LPCR); +- lpcr &= ~LPCR_ISL; ++ lpcr &= ~(LPCR_ISL | LPCR_UPRT | LPCR_HR); + mtspr(SPRN_LPCR, lpcr); + + cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE; +@@ -658,6 +664,13 @@ static void __init cpufeatures_setup_start(u32 isa) + cur_cpu_spec->cpu_features |= CPU_FTR_ARCH_300; + cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_ARCH_3_00; + } ++ ++ /* ++ * PKEY was not in the initial base or feature node ++ * specification, but it should become optional in the next ++ * cpu feature version sequence. ++ */ ++ cur_cpu_spec->cpu_features |= CPU_FTR_PKEY; + } + + static bool __init cpufeatures_process_feature(struct dt_cpu_feature *f) +diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c +index 0c0b66fc5bfb..295ba833846e 100644 +--- a/arch/powerpc/kernel/eeh_driver.c ++++ b/arch/powerpc/kernel/eeh_driver.c +@@ -207,18 +207,18 @@ static void *eeh_report_error(void *data, void *userdata) + + if (!dev || eeh_dev_removed(edev) || eeh_pe_passed(edev->pe)) + return NULL; ++ ++ device_lock(&dev->dev); + dev->error_state = pci_channel_io_frozen; + + driver = eeh_pcid_get(dev); +- if (!driver) return NULL; ++ if (!driver) goto out_no_dev; + + eeh_disable_irq(dev); + + if (!driver->err_handler || +- !driver->err_handler->error_detected) { +- eeh_pcid_put(dev); +- return NULL; +- } ++ !driver->err_handler->error_detected) ++ goto out; + + rc = driver->err_handler->error_detected(dev, pci_channel_io_frozen); + +@@ -227,8 +227,12 @@ static void *eeh_report_error(void *data, void *userdata) + if (*res == PCI_ERS_RESULT_NONE) *res = rc; + + edev->in_error = true; +- eeh_pcid_put(dev); + pci_uevent_ers(dev, PCI_ERS_RESULT_NONE); ++ ++out: ++ eeh_pcid_put(dev); ++out_no_dev: ++ device_unlock(&dev->dev); + return NULL; + } + +@@ -251,15 +255,14 @@ static void *eeh_report_mmio_enabled(void *data, void *userdata) + if (!dev || eeh_dev_removed(edev) || eeh_pe_passed(edev->pe)) + return NULL; + ++ device_lock(&dev->dev); + driver = eeh_pcid_get(dev); +- if (!driver) return NULL; ++ if (!driver) goto out_no_dev; + + if (!driver->err_handler || + !driver->err_handler->mmio_enabled || +- (edev->mode & EEH_DEV_NO_HANDLER)) { +- eeh_pcid_put(dev); +- return NULL; +- } ++ (edev->mode & EEH_DEV_NO_HANDLER)) ++ goto out; + + rc = driver->err_handler->mmio_enabled(dev); + +@@ -267,7 +270,10 @@ static void *eeh_report_mmio_enabled(void *data, void *userdata) + if (rc == PCI_ERS_RESULT_NEED_RESET) *res = rc; + if (*res == PCI_ERS_RESULT_NONE) *res = rc; + ++out: + eeh_pcid_put(dev); ++out_no_dev: ++ device_unlock(&dev->dev); + return NULL; + } + +@@ -290,20 +296,20 @@ static void *eeh_report_reset(void *data, void *userdata) + + if (!dev || eeh_dev_removed(edev) || eeh_pe_passed(edev->pe)) + return NULL; ++ ++ device_lock(&dev->dev); + dev->error_state = pci_channel_io_normal; + + driver = eeh_pcid_get(dev); +- if (!driver) return NULL; ++ if (!driver) goto out_no_dev; + + eeh_enable_irq(dev); + + if (!driver->err_handler || + !driver->err_handler->slot_reset || + (edev->mode & EEH_DEV_NO_HANDLER) || +- (!edev->in_error)) { +- eeh_pcid_put(dev); +- return NULL; +- } ++ (!edev->in_error)) ++ goto out; + + rc = driver->err_handler->slot_reset(dev); + if ((*res == PCI_ERS_RESULT_NONE) || +@@ -311,7 +317,10 @@ static void *eeh_report_reset(void *data, void *userdata) + if (*res == PCI_ERS_RESULT_DISCONNECT && + rc == PCI_ERS_RESULT_NEED_RESET) *res = rc; + ++out: + eeh_pcid_put(dev); ++out_no_dev: ++ device_unlock(&dev->dev); + return NULL; + } + +@@ -362,10 +371,12 @@ static void *eeh_report_resume(void *data, void *userdata) + + if (!dev || eeh_dev_removed(edev) || eeh_pe_passed(edev->pe)) + return NULL; ++ ++ device_lock(&dev->dev); + dev->error_state = pci_channel_io_normal; + + driver = eeh_pcid_get(dev); +- if (!driver) return NULL; ++ if (!driver) goto out_no_dev; + + was_in_error = edev->in_error; + edev->in_error = false; +@@ -375,18 +386,20 @@ static void *eeh_report_resume(void *data, void *userdata) + !driver->err_handler->resume || + (edev->mode & EEH_DEV_NO_HANDLER) || !was_in_error) { + edev->mode &= ~EEH_DEV_NO_HANDLER; +- eeh_pcid_put(dev); +- return NULL; ++ goto out; + } + + driver->err_handler->resume(dev); + +- eeh_pcid_put(dev); + pci_uevent_ers(dev, PCI_ERS_RESULT_RECOVERED); ++out: ++ eeh_pcid_put(dev); + #ifdef CONFIG_PCI_IOV + if (eeh_ops->notify_resume && eeh_dev_to_pdn(edev)) + eeh_ops->notify_resume(eeh_dev_to_pdn(edev)); + #endif ++out_no_dev: ++ device_unlock(&dev->dev); + return NULL; + } + +@@ -406,23 +419,26 @@ static void *eeh_report_failure(void *data, void *userdata) + + if (!dev || eeh_dev_removed(edev) || eeh_pe_passed(edev->pe)) + return NULL; ++ ++ device_lock(&dev->dev); + dev->error_state = pci_channel_io_perm_failure; + + driver = eeh_pcid_get(dev); +- if (!driver) return NULL; ++ if (!driver) goto out_no_dev; + + eeh_disable_irq(dev); + + if (!driver->err_handler || +- !driver->err_handler->error_detected) { +- eeh_pcid_put(dev); +- return NULL; +- } ++ !driver->err_handler->error_detected) ++ goto out; + + driver->err_handler->error_detected(dev, pci_channel_io_perm_failure); + +- eeh_pcid_put(dev); + pci_uevent_ers(dev, PCI_ERS_RESULT_DISCONNECT); ++out: ++ eeh_pcid_put(dev); ++out_no_dev: ++ device_unlock(&dev->dev); + return NULL; + } + +diff --git a/arch/powerpc/kernel/eeh_pe.c b/arch/powerpc/kernel/eeh_pe.c +index 2d4956e97aa9..ee5a67d57aab 100644 +--- a/arch/powerpc/kernel/eeh_pe.c ++++ b/arch/powerpc/kernel/eeh_pe.c +@@ -807,7 +807,8 @@ static void eeh_restore_bridge_bars(struct eeh_dev *edev) + eeh_ops->write_config(pdn, 15*4, 4, edev->config_space[15]); + + /* PCI Command: 0x4 */ +- eeh_ops->write_config(pdn, PCI_COMMAND, 4, edev->config_space[1]); ++ eeh_ops->write_config(pdn, PCI_COMMAND, 4, edev->config_space[1] | ++ PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); + + /* Check the PCIe link is ready */ + eeh_bridge_check_link(edev); +diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c +index ca5d5a081e75..e4c5bf33970b 100644 +--- a/arch/powerpc/kernel/kprobes.c ++++ b/arch/powerpc/kernel/kprobes.c +@@ -455,29 +455,33 @@ static int trampoline_probe_handler(struct kprobe *p, struct pt_regs *regs) + } + + kretprobe_assert(ri, orig_ret_address, trampoline_address); +- regs->nip = orig_ret_address; ++ + /* +- * Make LR point to the orig_ret_address. +- * When the 'nop' inside the kretprobe_trampoline +- * is optimized, we can do a 'blr' after executing the +- * detour buffer code. ++ * We get here through one of two paths: ++ * 1. by taking a trap -> kprobe_handler() -> here ++ * 2. by optprobe branch -> optimized_callback() -> opt_pre_handler() -> here ++ * ++ * When going back through (1), we need regs->nip to be setup properly ++ * as it is used to determine the return address from the trap. ++ * For (2), since nip is not honoured with optprobes, we instead setup ++ * the link register properly so that the subsequent 'blr' in ++ * kretprobe_trampoline jumps back to the right instruction. ++ * ++ * For nip, we should set the address to the previous instruction since ++ * we end up emulating it in kprobe_handler(), which increments the nip ++ * again. + */ ++ regs->nip = orig_ret_address - 4; + regs->link = orig_ret_address; + +- reset_current_kprobe(); + kretprobe_hash_unlock(current, &flags); +- preempt_enable_no_resched(); + + hlist_for_each_entry_safe(ri, tmp, &empty_rp, hlist) { + hlist_del(&ri->hlist); + kfree(ri); + } +- /* +- * By returning a non-zero value, we are telling +- * kprobe_handler() that we don't want the post_handler +- * to run (and have re-enabled preemption) +- */ +- return 1; ++ ++ return 0; + } + NOKPROBE_SYMBOL(trampoline_probe_handler); + +diff --git a/arch/powerpc/kernel/machine_kexec_file_64.c b/arch/powerpc/kernel/machine_kexec_file_64.c +index e4395f937d63..45e0b7d5f200 100644 +--- a/arch/powerpc/kernel/machine_kexec_file_64.c ++++ b/arch/powerpc/kernel/machine_kexec_file_64.c +@@ -43,7 +43,7 @@ int arch_kexec_kernel_image_probe(struct kimage *image, void *buf, + + /* We don't support crash kernels yet. */ + if (image->type == KEXEC_TYPE_CRASH) +- return -ENOTSUPP; ++ return -EOPNOTSUPP; + + for (i = 0; i < ARRAY_SIZE(kexec_file_loaders); i++) { + fops = kexec_file_loaders[i]; +diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c +index 73697c4e3468..f61ff5a6bddb 100644 +--- a/arch/powerpc/lib/feature-fixups.c ++++ b/arch/powerpc/lib/feature-fixups.c +@@ -55,7 +55,7 @@ static int patch_alt_instruction(unsigned int *src, unsigned int *dest, + unsigned int *target = (unsigned int *)branch_target(src); + + /* Branch within the section doesn't need translating */ +- if (target < alt_start || target >= alt_end) { ++ if (target < alt_start || target > alt_end) { + instr = translate_branch(dest, src); + if (!instr) + return 1; +diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c +index cf290d415dcd..1d388a0e1746 100644 +--- a/arch/powerpc/mm/hash_utils_64.c ++++ b/arch/powerpc/mm/hash_utils_64.c +@@ -875,6 +875,12 @@ static void __init htab_initialize(void) + /* Using a hypervisor which owns the htab */ + htab_address = NULL; + _SDR1 = 0; ++ /* ++ * On POWER9, we need to do a H_REGISTER_PROC_TBL hcall ++ * to inform the hypervisor that we wish to use the HPT. ++ */ ++ if (cpu_has_feature(CPU_FTR_ARCH_300)) ++ register_process_table(0, 0, 0); + #ifdef CONFIG_FA_DUMP + /* + * If firmware assisted dump is active firmware preserves +diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c +index a07f5372a4bf..9ab051155af3 100644 +--- a/arch/powerpc/mm/tlb-radix.c ++++ b/arch/powerpc/mm/tlb-radix.c +@@ -33,13 +33,12 @@ static inline void tlbiel_radix_set_isa300(unsigned int set, unsigned int is, + { + unsigned long rb; + unsigned long rs; +- unsigned int r = 1; /* radix format */ + + rb = (set << PPC_BITLSHIFT(51)) | (is << PPC_BITLSHIFT(53)); + rs = ((unsigned long)pid << PPC_BITLSHIFT(31)); + +- asm volatile(PPC_TLBIEL(%0, %1, %2, %3, %4) +- : : "r"(rb), "r"(rs), "i"(ric), "i"(prs), "r"(r) ++ asm volatile(PPC_TLBIEL(%0, %1, %2, %3, 1) ++ : : "r"(rb), "r"(rs), "i"(ric), "i"(prs) + : "memory"); + } + +diff --git a/arch/powerpc/platforms/powernv/opal-nvram.c b/arch/powerpc/platforms/powernv/opal-nvram.c +index 9db4398ded5d..1bceb95f422d 100644 +--- a/arch/powerpc/platforms/powernv/opal-nvram.c ++++ b/arch/powerpc/platforms/powernv/opal-nvram.c +@@ -11,6 +11,7 @@ + + #define DEBUG + ++#include <linux/delay.h> + #include <linux/kernel.h> + #include <linux/init.h> + #include <linux/of.h> +@@ -56,9 +57,17 @@ static ssize_t opal_nvram_write(char *buf, size_t count, loff_t *index) + + while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { + rc = opal_write_nvram(__pa(buf), count, off); +- if (rc == OPAL_BUSY_EVENT) ++ if (rc == OPAL_BUSY_EVENT) { ++ msleep(OPAL_BUSY_DELAY_MS); + opal_poll_events(NULL); ++ } else if (rc == OPAL_BUSY) { ++ msleep(OPAL_BUSY_DELAY_MS); ++ } + } ++ ++ if (rc) ++ return -EIO; ++ + *index += count; + return count; + } +diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c +index 0ee4a469a4ae..d11f3c14c21e 100644 +--- a/arch/powerpc/platforms/pseries/lpar.c ++++ b/arch/powerpc/platforms/pseries/lpar.c +@@ -726,15 +726,18 @@ static int pseries_lpar_resize_hpt(unsigned long shift) + return 0; + } + +-/* Actually only used for radix, so far */ + static int pseries_lpar_register_process_table(unsigned long base, + unsigned long page_size, unsigned long table_size) + { + long rc; +- unsigned long flags = PROC_TABLE_NEW; ++ unsigned long flags = 0; + ++ if (table_size) ++ flags |= PROC_TABLE_NEW; + if (radix_enabled()) + flags |= PROC_TABLE_RADIX | PROC_TABLE_GTSE; ++ else ++ flags |= PROC_TABLE_HPT_SLB; + for (;;) { + rc = plpar_hcall_norets(H_REGISTER_PROC_TBL, flags, base, + page_size, table_size); +@@ -760,6 +763,7 @@ void __init hpte_init_pseries(void) + mmu_hash_ops.flush_hash_range = pSeries_lpar_flush_hash_range; + mmu_hash_ops.hpte_clear_all = pseries_hpte_clear_all; + mmu_hash_ops.hugepage_invalidate = pSeries_lpar_hugepage_invalidate; ++ register_process_table = pseries_lpar_register_process_table; + + if (firmware_has_feature(FW_FEATURE_HPT_RESIZE)) + mmu_hash_ops.resize_hpt = pseries_lpar_resize_hpt; +diff --git a/arch/powerpc/sysdev/xive/native.c b/arch/powerpc/sysdev/xive/native.c +index d22aeb0b69e1..b48454be5b98 100644 +--- a/arch/powerpc/sysdev/xive/native.c ++++ b/arch/powerpc/sysdev/xive/native.c +@@ -389,6 +389,10 @@ static void xive_native_setup_cpu(unsigned int cpu, struct xive_cpu *xc) + if (xive_pool_vps == XIVE_INVALID_VP) + return; + ++ /* Check if pool VP already active, if it is, pull it */ ++ if (in_be32(xive_tima + TM_QW2_HV_POOL + TM_WORD2) & TM_QW2W2_VP) ++ in_be64(xive_tima + TM_SPC_PULL_POOL_CTX); ++ + /* Enable the pool VP */ + vp = xive_pool_vps + cpu; + pr_debug("CPU %d setting up pool VP 0x%x\n", cpu, vp); +diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig +index eaee7087886f..6e91e0d422ea 100644 +--- a/arch/s390/Kconfig ++++ b/arch/s390/Kconfig +@@ -289,12 +289,12 @@ config MARCH_Z13 + older machines. + + config MARCH_Z14 +- bool "IBM z14" ++ bool "IBM z14 ZR1 and z14" + select HAVE_MARCH_Z14_FEATURES + help +- Select this to enable optimizations for IBM z14 (3906 series). +- The kernel will be slightly faster but will not work on older +- machines. ++ Select this to enable optimizations for IBM z14 ZR1 and z14 (3907 ++ and 3906 series). The kernel will be slightly faster but will not ++ work on older machines. + + endchoice + +diff --git a/arch/s390/hypfs/inode.c b/arch/s390/hypfs/inode.c +index 43bbe63e2992..06b513d192b9 100644 +--- a/arch/s390/hypfs/inode.c ++++ b/arch/s390/hypfs/inode.c +@@ -320,7 +320,7 @@ static void hypfs_kill_super(struct super_block *sb) + + if (sb->s_root) + hypfs_delete_tree(sb->s_root); +- if (sb_info->update_file) ++ if (sb_info && sb_info->update_file) + hypfs_remove(sb_info->update_file); + kfree(sb->s_fs_info); + sb->s_fs_info = NULL; +diff --git a/arch/s390/kernel/perf_cpum_cf_events.c b/arch/s390/kernel/perf_cpum_cf_events.c +index c5bc3f209652..5ee27dc9a10c 100644 +--- a/arch/s390/kernel/perf_cpum_cf_events.c ++++ b/arch/s390/kernel/perf_cpum_cf_events.c +@@ -583,6 +583,7 @@ __init const struct attribute_group **cpumf_cf_event_group(void) + model = cpumcf_z13_pmu_event_attr; + break; + case 0x3906: ++ case 0x3907: + model = cpumcf_z14_pmu_event_attr; + break; + default: +diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c +index a6a91f01a17a..ce5ff4c4d435 100644 +--- a/arch/s390/kernel/setup.c ++++ b/arch/s390/kernel/setup.c +@@ -819,6 +819,7 @@ static int __init setup_hwcaps(void) + strcpy(elf_platform, "z13"); + break; + case 0x3906: ++ case 0x3907: + strcpy(elf_platform, "z14"); + break; + } +diff --git a/arch/um/os-Linux/file.c b/arch/um/os-Linux/file.c +index 2db18cbbb0ea..c0197097c86e 100644 +--- a/arch/um/os-Linux/file.c ++++ b/arch/um/os-Linux/file.c +@@ -12,6 +12,7 @@ + #include <sys/mount.h> + #include <sys/socket.h> + #include <sys/stat.h> ++#include <sys/sysmacros.h> + #include <sys/un.h> + #include <sys/types.h> + #include <os.h> +diff --git a/arch/um/os-Linux/signal.c b/arch/um/os-Linux/signal.c +index a86d7cc2c2d8..bf0acb8aad8b 100644 +--- a/arch/um/os-Linux/signal.c ++++ b/arch/um/os-Linux/signal.c +@@ -16,6 +16,7 @@ + #include <os.h> + #include <sysdep/mcontext.h> + #include <um_malloc.h> ++#include <sys/ucontext.h> + + void (*sig_info[NSIG])(int, struct siginfo *, struct uml_pt_regs *) = { + [SIGTRAP] = relay_signal, +@@ -159,7 +160,7 @@ static void (*handlers[_NSIG])(int sig, struct siginfo *si, mcontext_t *mc) = { + + static void hard_handler(int sig, siginfo_t *si, void *p) + { +- struct ucontext *uc = p; ++ ucontext_t *uc = p; + mcontext_t *mc = &uc->uc_mcontext; + unsigned long pending = 1UL << sig; + +diff --git a/arch/x86/um/stub_segv.c b/arch/x86/um/stub_segv.c +index 1518d2805ae8..27361cbb7ca9 100644 +--- a/arch/x86/um/stub_segv.c ++++ b/arch/x86/um/stub_segv.c +@@ -6,11 +6,12 @@ + #include <sysdep/stub.h> + #include <sysdep/faultinfo.h> + #include <sysdep/mcontext.h> ++#include <sys/ucontext.h> + + void __attribute__ ((__section__ (".__syscall_stub"))) + stub_segv_handler(int sig, siginfo_t *info, void *p) + { +- struct ucontext *uc = p; ++ ucontext_t *uc = p; + + GET_FAULTINFO_FROM_MC(*((struct faultinfo *) STUB_DATA), + &uc->uc_mcontext); +diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c +index 3c2c2530737e..c36d23aa6c35 100644 +--- a/arch/x86/xen/enlighten_pv.c ++++ b/arch/x86/xen/enlighten_pv.c +@@ -1259,10 +1259,6 @@ asmlinkage __visible void __init xen_start_kernel(void) + */ + __userpte_alloc_gfp &= ~__GFP_HIGHMEM; + +- /* Work out if we support NX */ +- get_cpu_cap(&boot_cpu_data); +- x86_configure_nx(); +- + /* Get mfn list */ + xen_build_dynamic_phys_to_machine(); + +@@ -1272,6 +1268,10 @@ asmlinkage __visible void __init xen_start_kernel(void) + */ + xen_setup_gdt(0); + ++ /* Work out if we support NX */ ++ get_cpu_cap(&boot_cpu_data); ++ x86_configure_nx(); ++ + xen_init_irq_ops(); + + /* Let's presume PV guests always boot on vCPU with id 0. */ +diff --git a/drivers/acpi/nfit/core.c b/drivers/acpi/nfit/core.c +index 9f8f39d49396..984ec6b288df 100644 +--- a/drivers/acpi/nfit/core.c ++++ b/drivers/acpi/nfit/core.c +@@ -196,7 +196,7 @@ static int xlat_nvdimm_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd + * In the _LSI, _LSR, _LSW case the locked status is + * communicated via the read/write commands + */ +- if (nfit_mem->has_lsi) ++ if (nfit_mem->has_lsr) + break; + + if (status >> 16 & ND_CONFIG_LOCKED) +@@ -483,7 +483,7 @@ int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, + min_t(u32, 256, in_buf.buffer.length), true); + + /* call the BIOS, prefer the named methods over _DSM if available */ +- if (nvdimm && cmd == ND_CMD_GET_CONFIG_SIZE && nfit_mem->has_lsi) ++ if (nvdimm && cmd == ND_CMD_GET_CONFIG_SIZE && nfit_mem->has_lsr) + out_obj = acpi_label_info(handle); + else if (nvdimm && cmd == ND_CMD_GET_CONFIG_DATA && nfit_mem->has_lsr) { + struct nd_cmd_get_config_data_hdr *p = buf; +@@ -1250,8 +1250,11 @@ static ssize_t scrub_show(struct device *dev, + if (nd_desc) { + struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); + ++ mutex_lock(&acpi_desc->init_mutex); + rc = sprintf(buf, "%d%s", acpi_desc->scrub_count, +- (work_busy(&acpi_desc->work)) ? "+\n" : "\n"); ++ work_busy(&acpi_desc->work) ++ && !acpi_desc->cancel ? "+\n" : "\n"); ++ mutex_unlock(&acpi_desc->init_mutex); + } + device_unlock(dev); + return rc; +@@ -1654,12 +1657,23 @@ static void acpi_nvdimm_notify(acpi_handle handle, u32 event, void *data) + device_unlock(dev->parent); + } + ++static bool acpi_nvdimm_has_method(struct acpi_device *adev, char *method) ++{ ++ acpi_handle handle; ++ acpi_status status; ++ ++ status = acpi_get_handle(adev->handle, method, &handle); ++ ++ if (ACPI_SUCCESS(status)) ++ return true; ++ return false; ++} ++ + static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, + struct nfit_mem *nfit_mem, u32 device_handle) + { + struct acpi_device *adev, *adev_dimm; + struct device *dev = acpi_desc->dev; +- union acpi_object *obj; + unsigned long dsm_mask; + const guid_t *guid; + int i; +@@ -1732,25 +1746,15 @@ static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, + 1ULL << i)) + set_bit(i, &nfit_mem->dsm_mask); + +- obj = acpi_label_info(adev_dimm->handle); +- if (obj) { +- ACPI_FREE(obj); +- nfit_mem->has_lsi = 1; +- dev_dbg(dev, "%s: has _LSI\n", dev_name(&adev_dimm->dev)); +- } +- +- obj = acpi_label_read(adev_dimm->handle, 0, 0); +- if (obj) { +- ACPI_FREE(obj); +- nfit_mem->has_lsr = 1; ++ if (acpi_nvdimm_has_method(adev_dimm, "_LSI") ++ && acpi_nvdimm_has_method(adev_dimm, "_LSR")) { + dev_dbg(dev, "%s: has _LSR\n", dev_name(&adev_dimm->dev)); ++ nfit_mem->has_lsr = true; + } + +- obj = acpi_label_write(adev_dimm->handle, 0, 0, NULL); +- if (obj) { +- ACPI_FREE(obj); +- nfit_mem->has_lsw = 1; ++ if (nfit_mem->has_lsr && acpi_nvdimm_has_method(adev_dimm, "_LSW")) { + dev_dbg(dev, "%s: has _LSW\n", dev_name(&adev_dimm->dev)); ++ nfit_mem->has_lsw = true; + } + + return 0; +@@ -1839,10 +1843,10 @@ static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc) + cmd_mask |= nfit_mem->dsm_mask & NVDIMM_STANDARD_CMDMASK; + } + +- if (nfit_mem->has_lsi) ++ if (nfit_mem->has_lsr) { + set_bit(ND_CMD_GET_CONFIG_SIZE, &cmd_mask); +- if (nfit_mem->has_lsr) + set_bit(ND_CMD_GET_CONFIG_DATA, &cmd_mask); ++ } + if (nfit_mem->has_lsw) + set_bit(ND_CMD_SET_CONFIG_DATA, &cmd_mask); + +@@ -2579,7 +2583,7 @@ static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc, + struct acpi_nfit_system_address *spa = nfit_spa->spa; + struct nd_blk_region_desc *ndbr_desc; + struct nfit_mem *nfit_mem; +- int blk_valid = 0, rc; ++ int rc; + + if (!nvdimm) { + dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n", +@@ -2599,15 +2603,14 @@ static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc, + if (!nfit_mem || !nfit_mem->bdw) { + dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n", + spa->range_index, nvdimm_name(nvdimm)); +- } else { +- mapping->size = nfit_mem->bdw->capacity; +- mapping->start = nfit_mem->bdw->start_address; +- ndr_desc->num_lanes = nfit_mem->bdw->windows; +- blk_valid = 1; ++ break; + } + ++ mapping->size = nfit_mem->bdw->capacity; ++ mapping->start = nfit_mem->bdw->start_address; ++ ndr_desc->num_lanes = nfit_mem->bdw->windows; + ndr_desc->mapping = mapping; +- ndr_desc->num_mappings = blk_valid; ++ ndr_desc->num_mappings = 1; + ndbr_desc = to_blk_region_desc(ndr_desc); + ndbr_desc->enable = acpi_nfit_blk_region_enable; + ndbr_desc->do_io = acpi_desc->blk_do_io; +diff --git a/drivers/acpi/nfit/nfit.h b/drivers/acpi/nfit/nfit.h +index 50d36e166d70..ac9c49463731 100644 +--- a/drivers/acpi/nfit/nfit.h ++++ b/drivers/acpi/nfit/nfit.h +@@ -171,9 +171,8 @@ struct nfit_mem { + struct resource *flush_wpq; + unsigned long dsm_mask; + int family; +- u32 has_lsi:1; +- u32 has_lsr:1; +- u32 has_lsw:1; ++ bool has_lsr; ++ bool has_lsw; + }; + + struct acpi_nfit_desc { +diff --git a/drivers/acpi/video_detect.c b/drivers/acpi/video_detect.c +index 601e5d372887..43587ac680e4 100644 +--- a/drivers/acpi/video_detect.c ++++ b/drivers/acpi/video_detect.c +@@ -219,6 +219,15 @@ static const struct dmi_system_id video_detect_dmi_table[] = { + "3570R/370R/470R/450R/510R/4450RV"), + }, + }, ++ { ++ /* https://bugzilla.redhat.com/show_bug.cgi?id=1557060 */ ++ .callback = video_detect_force_video, ++ .ident = "SAMSUNG 670Z5E", ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD."), ++ DMI_MATCH(DMI_PRODUCT_NAME, "670Z5E"), ++ }, ++ }, + { + /* https://bugzilla.redhat.com/show_bug.cgi?id=1094948 */ + .callback = video_detect_force_video, +diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c +index ee302ccdfbc8..453116fd4362 100644 +--- a/drivers/base/regmap/regmap.c ++++ b/drivers/base/regmap/regmap.c +@@ -1831,7 +1831,7 @@ int regmap_raw_write(struct regmap *map, unsigned int reg, + return -EINVAL; + if (val_len % map->format.val_bytes) + return -EINVAL; +- if (map->max_raw_write && map->max_raw_write > val_len) ++ if (map->max_raw_write && map->max_raw_write < val_len) + return -E2BIG; + + map->lock(map->lock_arg); +diff --git a/drivers/bluetooth/hci_bcm.c b/drivers/bluetooth/hci_bcm.c +index 1a81f6b8c2ce..942ac63f0b12 100644 +--- a/drivers/bluetooth/hci_bcm.c ++++ b/drivers/bluetooth/hci_bcm.c +@@ -126,6 +126,10 @@ struct bcm_data { + static DEFINE_MUTEX(bcm_device_lock); + static LIST_HEAD(bcm_device_list); + ++static int irq_polarity = -1; ++module_param(irq_polarity, int, 0444); ++MODULE_PARM_DESC(irq_polarity, "IRQ polarity 0: active-high 1: active-low"); ++ + static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed) + { + if (hu->serdev) +@@ -975,11 +979,17 @@ static int bcm_acpi_probe(struct bcm_device *dev) + } + acpi_dev_free_resource_list(&resources); + +- dmi_id = dmi_first_match(bcm_active_low_irq_dmi_table); +- if (dmi_id) { +- dev_warn(dev->dev, "%s: Overwriting IRQ polarity to active low", +- dmi_id->ident); +- dev->irq_active_low = true; ++ if (irq_polarity != -1) { ++ dev->irq_active_low = irq_polarity; ++ dev_warn(dev->dev, "Overwriting IRQ polarity to active %s by module-param\n", ++ dev->irq_active_low ? "low" : "high"); ++ } else { ++ dmi_id = dmi_first_match(bcm_active_low_irq_dmi_table); ++ if (dmi_id) { ++ dev_warn(dev->dev, "%s: Overwriting IRQ polarity to active low", ++ dmi_id->ident); ++ dev->irq_active_low = true; ++ } + } + + return 0; +diff --git a/drivers/char/random.c b/drivers/char/random.c +index e5b3d3ba4660..38729baed6ee 100644 +--- a/drivers/char/random.c ++++ b/drivers/char/random.c +@@ -427,8 +427,9 @@ struct crng_state primary_crng = { + * its value (from 0->1->2). + */ + static int crng_init = 0; +-#define crng_ready() (likely(crng_init > 0)) ++#define crng_ready() (likely(crng_init > 1)) + static int crng_init_cnt = 0; ++static unsigned long crng_global_init_time = 0; + #define CRNG_INIT_CNT_THRESH (2*CHACHA20_KEY_SIZE) + static void _extract_crng(struct crng_state *crng, + __u32 out[CHACHA20_BLOCK_WORDS]); +@@ -732,7 +733,7 @@ static void credit_entropy_bits(struct entropy_store *r, int nbits) + + static int credit_entropy_bits_safe(struct entropy_store *r, int nbits) + { +- const int nbits_max = (int)(~0U >> (ENTROPY_SHIFT + 1)); ++ const int nbits_max = r->poolinfo->poolwords * 32; + + if (nbits < 0) + return -EINVAL; +@@ -786,6 +787,10 @@ static void crng_initialize(struct crng_state *crng) + crng->init_time = jiffies - CRNG_RESEED_INTERVAL - 1; + } + ++/* ++ * crng_fast_load() can be called by code in the interrupt service ++ * path. So we can't afford to dilly-dally. ++ */ + static int crng_fast_load(const char *cp, size_t len) + { + unsigned long flags; +@@ -793,7 +798,7 @@ static int crng_fast_load(const char *cp, size_t len) + + if (!spin_trylock_irqsave(&primary_crng.lock, flags)) + return 0; +- if (crng_ready()) { ++ if (crng_init != 0) { + spin_unlock_irqrestore(&primary_crng.lock, flags); + return 0; + } +@@ -812,6 +817,51 @@ static int crng_fast_load(const char *cp, size_t len) + return 1; + } + ++/* ++ * crng_slow_load() is called by add_device_randomness, which has two ++ * attributes. (1) We can't trust the buffer passed to it is ++ * guaranteed to be unpredictable (so it might not have any entropy at ++ * all), and (2) it doesn't have the performance constraints of ++ * crng_fast_load(). ++ * ++ * So we do something more comprehensive which is guaranteed to touch ++ * all of the primary_crng's state, and which uses a LFSR with a ++ * period of 255 as part of the mixing algorithm. Finally, we do ++ * *not* advance crng_init_cnt since buffer we may get may be something ++ * like a fixed DMI table (for example), which might very well be ++ * unique to the machine, but is otherwise unvarying. ++ */ ++static int crng_slow_load(const char *cp, size_t len) ++{ ++ unsigned long flags; ++ static unsigned char lfsr = 1; ++ unsigned char tmp; ++ unsigned i, max = CHACHA20_KEY_SIZE; ++ const char * src_buf = cp; ++ char * dest_buf = (char *) &primary_crng.state[4]; ++ ++ if (!spin_trylock_irqsave(&primary_crng.lock, flags)) ++ return 0; ++ if (crng_init != 0) { ++ spin_unlock_irqrestore(&primary_crng.lock, flags); ++ return 0; ++ } ++ if (len > max) ++ max = len; ++ ++ for (i = 0; i < max ; i++) { ++ tmp = lfsr; ++ lfsr >>= 1; ++ if (tmp & 1) ++ lfsr ^= 0xE1; ++ tmp = dest_buf[i % CHACHA20_KEY_SIZE]; ++ dest_buf[i % CHACHA20_KEY_SIZE] ^= src_buf[i % len] ^ lfsr; ++ lfsr += (tmp << 3) | (tmp >> 5); ++ } ++ spin_unlock_irqrestore(&primary_crng.lock, flags); ++ return 1; ++} ++ + static void crng_reseed(struct crng_state *crng, struct entropy_store *r) + { + unsigned long flags; +@@ -830,7 +880,7 @@ static void crng_reseed(struct crng_state *crng, struct entropy_store *r) + _crng_backtrack_protect(&primary_crng, buf.block, + CHACHA20_KEY_SIZE); + } +- spin_lock_irqsave(&primary_crng.lock, flags); ++ spin_lock_irqsave(&crng->lock, flags); + for (i = 0; i < 8; i++) { + unsigned long rv; + if (!arch_get_random_seed_long(&rv) && +@@ -840,7 +890,7 @@ static void crng_reseed(struct crng_state *crng, struct entropy_store *r) + } + memzero_explicit(&buf, sizeof(buf)); + crng->init_time = jiffies; +- spin_unlock_irqrestore(&primary_crng.lock, flags); ++ spin_unlock_irqrestore(&crng->lock, flags); + if (crng == &primary_crng && crng_init < 2) { + invalidate_batched_entropy(); + crng_init = 2; +@@ -855,8 +905,9 @@ static void _extract_crng(struct crng_state *crng, + { + unsigned long v, flags; + +- if (crng_init > 1 && +- time_after(jiffies, crng->init_time + CRNG_RESEED_INTERVAL)) ++ if (crng_ready() && ++ (time_after(crng_global_init_time, crng->init_time) || ++ time_after(jiffies, crng->init_time + CRNG_RESEED_INTERVAL))) + crng_reseed(crng, crng == &primary_crng ? &input_pool : NULL); + spin_lock_irqsave(&crng->lock, flags); + if (arch_get_random_long(&v)) +@@ -981,10 +1032,8 @@ void add_device_randomness(const void *buf, unsigned int size) + unsigned long time = random_get_entropy() ^ jiffies; + unsigned long flags; + +- if (!crng_ready()) { +- crng_fast_load(buf, size); +- return; +- } ++ if (!crng_ready() && size) ++ crng_slow_load(buf, size); + + trace_add_device_randomness(size, _RET_IP_); + spin_lock_irqsave(&input_pool.lock, flags); +@@ -1141,7 +1190,7 @@ void add_interrupt_randomness(int irq, int irq_flags) + fast_mix(fast_pool); + add_interrupt_bench(cycles); + +- if (!crng_ready()) { ++ if (unlikely(crng_init == 0)) { + if ((fast_pool->count >= 64) && + crng_fast_load((char *) fast_pool->pool, + sizeof(fast_pool->pool))) { +@@ -1691,6 +1740,7 @@ static int rand_initialize(void) + init_std_data(&input_pool); + init_std_data(&blocking_pool); + crng_initialize(&primary_crng); ++ crng_global_init_time = jiffies; + + #ifdef CONFIG_NUMA + pool = kcalloc(nr_node_ids, sizeof(*pool), GFP_KERNEL|__GFP_NOFAIL); +@@ -1877,6 +1927,14 @@ static long random_ioctl(struct file *f, unsigned int cmd, unsigned long arg) + input_pool.entropy_count = 0; + blocking_pool.entropy_count = 0; + return 0; ++ case RNDRESEEDCRNG: ++ if (!capable(CAP_SYS_ADMIN)) ++ return -EPERM; ++ if (crng_init < 2) ++ return -ENODATA; ++ crng_reseed(&primary_crng, NULL); ++ crng_global_init_time = jiffies - 1; ++ return 0; + default: + return -EINVAL; + } +@@ -2214,7 +2272,7 @@ void add_hwgenerator_randomness(const char *buffer, size_t count, + { + struct entropy_store *poolp = &input_pool; + +- if (!crng_ready()) { ++ if (unlikely(crng_init == 0)) { + crng_fast_load(buffer, count); + return; + } +diff --git a/drivers/char/tpm/tpm-interface.c b/drivers/char/tpm/tpm-interface.c +index 9e80a953d693..248c04090dea 100644 +--- a/drivers/char/tpm/tpm-interface.c ++++ b/drivers/char/tpm/tpm-interface.c +@@ -969,6 +969,10 @@ int tpm_do_selftest(struct tpm_chip *chip) + loops = jiffies_to_msecs(duration) / delay_msec; + + rc = tpm_continue_selftest(chip); ++ if (rc == TPM_ERR_INVALID_POSTINIT) { ++ chip->flags |= TPM_CHIP_FLAG_ALWAYS_POWERED; ++ dev_info(&chip->dev, "TPM not ready (%d)\n", rc); ++ } + /* This may fail if there was no TPM driver during a suspend/resume + * cycle; some may return 10 (BAD_ORDINAL), others 28 (FAILEDSELFTEST) + */ +diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c +index a07f6451694a..fa0d5c8611a0 100644 +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -602,9 +602,7 @@ static void bcm2835_pll_off(struct clk_hw *hw) + const struct bcm2835_pll_data *data = pll->data; + + spin_lock(&cprman->regs_lock); +- cprman_write(cprman, data->cm_ctrl_reg, +- cprman_read(cprman, data->cm_ctrl_reg) | +- CM_PLL_ANARST); ++ cprman_write(cprman, data->cm_ctrl_reg, CM_PLL_ANARST); + cprman_write(cprman, data->a2w_ctrl_reg, + cprman_read(cprman, data->a2w_ctrl_reg) | + A2W_PLL_CTRL_PWRDN); +@@ -640,6 +638,10 @@ static int bcm2835_pll_on(struct clk_hw *hw) + cpu_relax(); + } + ++ cprman_write(cprman, data->a2w_ctrl_reg, ++ cprman_read(cprman, data->a2w_ctrl_reg) | ++ A2W_PLL_CTRL_PRST_DISABLE); ++ + return 0; + } + +diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c +index 8e7f16fd87c9..deca7527f92f 100644 +--- a/drivers/clk/mediatek/clk-mt2701.c ++++ b/drivers/clk/mediatek/clk-mt2701.c +@@ -148,6 +148,7 @@ static const struct mtk_fixed_factor top_fixed_divs[] = { + FACTOR(CLK_TOP_CLK26M_D8, "clk26m_d8", "clk26m", 1, 8), + FACTOR(CLK_TOP_32K_INTERNAL, "32k_internal", "clk26m", 1, 793), + FACTOR(CLK_TOP_32K_EXTERNAL, "32k_external", "rtc32k", 1, 1), ++ FACTOR(CLK_TOP_AXISEL_D4, "axisel_d4", "axi_sel", 1, 4), + }; + + static const char * const axi_parents[] = { +@@ -857,13 +858,13 @@ static const struct mtk_gate peri_clks[] = { + GATE_PERI0(CLK_PERI_USB1, "usb1_ck", "usb20_sel", 11), + GATE_PERI0(CLK_PERI_USB0, "usb0_ck", "usb20_sel", 10), + GATE_PERI0(CLK_PERI_PWM, "pwm_ck", "axi_sel", 9), +- GATE_PERI0(CLK_PERI_PWM7, "pwm7_ck", "axi_sel", 8), +- GATE_PERI0(CLK_PERI_PWM6, "pwm6_ck", "axi_sel", 7), +- GATE_PERI0(CLK_PERI_PWM5, "pwm5_ck", "axi_sel", 6), +- GATE_PERI0(CLK_PERI_PWM4, "pwm4_ck", "axi_sel", 5), +- GATE_PERI0(CLK_PERI_PWM3, "pwm3_ck", "axi_sel", 4), +- GATE_PERI0(CLK_PERI_PWM2, "pwm2_ck", "axi_sel", 3), +- GATE_PERI0(CLK_PERI_PWM1, "pwm1_ck", "axi_sel", 2), ++ GATE_PERI0(CLK_PERI_PWM7, "pwm7_ck", "axisel_d4", 8), ++ GATE_PERI0(CLK_PERI_PWM6, "pwm6_ck", "axisel_d4", 7), ++ GATE_PERI0(CLK_PERI_PWM5, "pwm5_ck", "axisel_d4", 6), ++ GATE_PERI0(CLK_PERI_PWM4, "pwm4_ck", "axisel_d4", 5), ++ GATE_PERI0(CLK_PERI_PWM3, "pwm3_ck", "axisel_d4", 4), ++ GATE_PERI0(CLK_PERI_PWM2, "pwm2_ck", "axisel_d4", 3), ++ GATE_PERI0(CLK_PERI_PWM1, "pwm1_ck", "axisel_d4", 2), + GATE_PERI0(CLK_PERI_THERM, "therm_ck", "axi_sel", 1), + GATE_PERI0(CLK_PERI_NFI, "nfi_ck", "nfi2x_sel", 0), + +diff --git a/drivers/clk/mvebu/armada-38x.c b/drivers/clk/mvebu/armada-38x.c +index 394aa6f03f01..9ff4ea63932d 100644 +--- a/drivers/clk/mvebu/armada-38x.c ++++ b/drivers/clk/mvebu/armada-38x.c +@@ -46,11 +46,11 @@ static u32 __init armada_38x_get_tclk_freq(void __iomem *sar) + } + + static const u32 armada_38x_cpu_frequencies[] __initconst = { +- 0, 0, 0, 0, +- 1066 * 1000 * 1000, 0, 0, 0, ++ 666 * 1000 * 1000, 0, 800 * 1000 * 1000, 0, ++ 1066 * 1000 * 1000, 0, 1200 * 1000 * 1000, 0, + 1332 * 1000 * 1000, 0, 0, 0, + 1600 * 1000 * 1000, 0, 0, 0, +- 1866 * 1000 * 1000, ++ 1866 * 1000 * 1000, 0, 0, 2000 * 1000 * 1000, + }; + + static u32 __init armada_38x_get_cpu_freq(void __iomem *sar) +@@ -76,11 +76,11 @@ static const struct coreclk_ratio armada_38x_coreclk_ratios[] __initconst = { + }; + + static const int armada_38x_cpu_l2_ratios[32][2] __initconst = { +- {0, 1}, {0, 1}, {0, 1}, {0, 1}, +- {1, 2}, {0, 1}, {0, 1}, {0, 1}, +- {1, 2}, {0, 1}, {0, 1}, {0, 1}, ++ {1, 2}, {0, 1}, {1, 2}, {0, 1}, ++ {1, 2}, {0, 1}, {1, 2}, {0, 1}, + {1, 2}, {0, 1}, {0, 1}, {0, 1}, + {1, 2}, {0, 1}, {0, 1}, {0, 1}, ++ {1, 2}, {0, 1}, {0, 1}, {1, 2}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, +@@ -91,7 +91,7 @@ static const int armada_38x_cpu_ddr_ratios[32][2] __initconst = { + {1, 2}, {0, 1}, {0, 1}, {0, 1}, + {1, 2}, {0, 1}, {0, 1}, {0, 1}, + {1, 2}, {0, 1}, {0, 1}, {0, 1}, +- {1, 2}, {0, 1}, {0, 1}, {0, 1}, ++ {1, 2}, {0, 1}, {0, 1}, {7, 15}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, +diff --git a/drivers/clk/renesas/clk-sh73a0.c b/drivers/clk/renesas/clk-sh73a0.c +index eea38f6ea77e..3892346c4fcc 100644 +--- a/drivers/clk/renesas/clk-sh73a0.c ++++ b/drivers/clk/renesas/clk-sh73a0.c +@@ -46,7 +46,7 @@ struct div4_clk { + unsigned int shift; + }; + +-static struct div4_clk div4_clks[] = { ++static const struct div4_clk div4_clks[] = { + { "zg", "pll0", CPG_FRQCRA, 16 }, + { "m3", "pll1", CPG_FRQCRA, 12 }, + { "b", "pll1", CPG_FRQCRA, 8 }, +@@ -79,7 +79,7 @@ sh73a0_cpg_register_clock(struct device_node *np, struct sh73a0_cpg *cpg, + { + const struct clk_div_table *table = NULL; + unsigned int shift, reg, width; +- const char *parent_name; ++ const char *parent_name = NULL; + unsigned int mult = 1; + unsigned int div = 1; + +@@ -135,7 +135,7 @@ sh73a0_cpg_register_clock(struct device_node *np, struct sh73a0_cpg *cpg, + shift = 24; + width = 5; + } else { +- struct div4_clk *c; ++ const struct div4_clk *c; + + for (c = div4_clks; c->name; c++) { + if (!strcmp(name, c->name)) { +diff --git a/drivers/clk/tegra/clk-emc.c b/drivers/clk/tegra/clk-emc.c +index 11a5066e5c27..5234acd30e89 100644 +--- a/drivers/clk/tegra/clk-emc.c ++++ b/drivers/clk/tegra/clk-emc.c +@@ -515,7 +515,7 @@ struct clk *tegra_clk_register_emc(void __iomem *base, struct device_node *np, + + init.name = "emc"; + init.ops = &tegra_clk_emc_ops; +- init.flags = 0; ++ init.flags = CLK_IS_CRITICAL; + init.parent_names = emc_parent_clk_names; + init.num_parents = ARRAY_SIZE(emc_parent_clk_names); + +diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c +index c02711927d79..2acba2986bc6 100644 +--- a/drivers/clk/tegra/clk-tegra-periph.c ++++ b/drivers/clk/tegra/clk-tegra-periph.c +@@ -830,7 +830,7 @@ static struct tegra_periph_init_data gate_clks[] = { + GATE("xusb_host", "xusb_host_src", 89, 0, tegra_clk_xusb_host, 0), + GATE("xusb_ss", "xusb_ss_src", 156, 0, tegra_clk_xusb_ss, 0), + GATE("xusb_dev", "xusb_dev_src", 95, 0, tegra_clk_xusb_dev, 0), +- GATE("emc", "emc_mux", 57, 0, tegra_clk_emc, CLK_IGNORE_UNUSED), ++ GATE("emc", "emc_mux", 57, 0, tegra_clk_emc, CLK_IS_CRITICAL), + GATE("sata_cold", "clk_m", 129, TEGRA_PERIPH_ON_APB, tegra_clk_sata_cold, 0), + GATE("ispa", "isp", 23, 0, tegra_clk_ispa, 0), + GATE("ispb", "isp", 3, 0, tegra_clk_ispb, 0), +diff --git a/drivers/clk/tegra/clk-tegra-super-gen4.c b/drivers/clk/tegra/clk-tegra-super-gen4.c +index 10047107c1dc..89d6b47a27a8 100644 +--- a/drivers/clk/tegra/clk-tegra-super-gen4.c ++++ b/drivers/clk/tegra/clk-tegra-super-gen4.c +@@ -125,7 +125,8 @@ static void __init tegra_sclk_init(void __iomem *clk_base, + /* SCLK */ + dt_clk = tegra_lookup_dt_id(tegra_clk_sclk, tegra_clks); + if (dt_clk) { +- clk = clk_register_divider(NULL, "sclk", "sclk_mux", 0, ++ clk = clk_register_divider(NULL, "sclk", "sclk_mux", ++ CLK_IS_CRITICAL, + clk_base + SCLK_DIVIDER, 0, 8, + 0, &sysrate_lock); + *dt_clk = clk; +@@ -137,7 +138,8 @@ static void __init tegra_sclk_init(void __iomem *clk_base, + clk = tegra_clk_register_super_mux("sclk", + gen_info->sclk_parents, + gen_info->num_sclk_parents, +- CLK_SET_RATE_PARENT, ++ CLK_SET_RATE_PARENT | ++ CLK_IS_CRITICAL, + clk_base + SCLK_BURST_POLICY, + 0, 4, 0, 0, NULL); + *dt_clk = clk; +@@ -151,7 +153,7 @@ static void __init tegra_sclk_init(void __iomem *clk_base, + clk_base + SYSTEM_CLK_RATE, 4, 2, 0, + &sysrate_lock); + clk = clk_register_gate(NULL, "hclk", "hclk_div", +- CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + clk_base + SYSTEM_CLK_RATE, + 7, CLK_GATE_SET_TO_DISABLE, &sysrate_lock); + *dt_clk = clk; +diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c +index 63087d17c3e2..c3945c683f60 100644 +--- a/drivers/clk/tegra/clk-tegra114.c ++++ b/drivers/clk/tegra/clk-tegra114.c +@@ -955,8 +955,7 @@ static void __init tegra114_pll_init(void __iomem *clk_base, + + /* PLLM */ + clk = tegra_clk_register_pllm("pll_m", "pll_ref", clk_base, pmc, +- CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE, +- &pll_m_params, NULL); ++ CLK_SET_RATE_GATE, &pll_m_params, NULL); + clks[TEGRA114_CLK_PLL_M] = clk; + + /* PLLM_OUT1 */ +diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c +index e81ea5b11577..230f9a2c1abf 100644 +--- a/drivers/clk/tegra/clk-tegra124.c ++++ b/drivers/clk/tegra/clk-tegra124.c +@@ -1089,8 +1089,7 @@ static void __init tegra124_pll_init(void __iomem *clk_base, + + /* PLLM */ + clk = tegra_clk_register_pllm("pll_m", "pll_ref", clk_base, pmc, +- CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE, +- &pll_m_params, NULL); ++ CLK_SET_RATE_GATE, &pll_m_params, NULL); + clk_register_clkdev(clk, "pll_m", NULL); + clks[TEGRA124_CLK_PLL_M] = clk; + +@@ -1099,7 +1098,7 @@ static void __init tegra124_pll_init(void __iomem *clk_base, + clk_base + PLLM_OUT, 0, TEGRA_DIVIDER_ROUND_UP, + 8, 8, 1, NULL); + clk = tegra_clk_register_pll_out("pll_m_out1", "pll_m_out1_div", +- clk_base + PLLM_OUT, 1, 0, CLK_IGNORE_UNUSED | ++ clk_base + PLLM_OUT, 1, 0, + CLK_SET_RATE_PARENT, 0, NULL); + clk_register_clkdev(clk, "pll_m_out1", NULL); + clks[TEGRA124_CLK_PLL_M_OUT1] = clk; +@@ -1272,7 +1271,7 @@ static struct tegra_clk_init_table common_init_table[] __initdata = { + { TEGRA124_CLK_HOST1X, TEGRA124_CLK_PLL_P, 136000000, 1 }, + { TEGRA124_CLK_DSIALP, TEGRA124_CLK_PLL_P, 68000000, 0 }, + { TEGRA124_CLK_DSIBLP, TEGRA124_CLK_PLL_P, 68000000, 0 }, +- { TEGRA124_CLK_SCLK, TEGRA124_CLK_PLL_P_OUT2, 102000000, 1 }, ++ { TEGRA124_CLK_SCLK, TEGRA124_CLK_PLL_P_OUT2, 102000000, 0 }, + { TEGRA124_CLK_DFLL_SOC, TEGRA124_CLK_PLL_P, 51000000, 1 }, + { TEGRA124_CLK_DFLL_REF, TEGRA124_CLK_PLL_P, 51000000, 1 }, + { TEGRA124_CLK_PLL_C, TEGRA124_CLK_CLK_MAX, 768000000, 0 }, +diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c +index cbd5a2e5c569..e3392ca2c2fc 100644 +--- a/drivers/clk/tegra/clk-tegra20.c ++++ b/drivers/clk/tegra/clk-tegra20.c +@@ -576,6 +576,7 @@ static struct tegra_clk tegra20_clks[tegra_clk_max] __initdata = { + [tegra_clk_afi] = { .dt_id = TEGRA20_CLK_AFI, .present = true }, + [tegra_clk_fuse] = { .dt_id = TEGRA20_CLK_FUSE, .present = true }, + [tegra_clk_kfuse] = { .dt_id = TEGRA20_CLK_KFUSE, .present = true }, ++ [tegra_clk_emc] = { .dt_id = TEGRA20_CLK_EMC, .present = true }, + }; + + static unsigned long tegra20_clk_measure_input_freq(void) +@@ -651,8 +652,7 @@ static void tegra20_pll_init(void) + + /* PLLM */ + clk = tegra_clk_register_pll("pll_m", "pll_ref", clk_base, NULL, +- CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE, +- &pll_m_params, NULL); ++ CLK_SET_RATE_GATE, &pll_m_params, NULL); + clks[TEGRA20_CLK_PLL_M] = clk; + + /* PLLM_OUT1 */ +@@ -660,7 +660,7 @@ static void tegra20_pll_init(void) + clk_base + PLLM_OUT, 0, TEGRA_DIVIDER_ROUND_UP, + 8, 8, 1, NULL); + clk = tegra_clk_register_pll_out("pll_m_out1", "pll_m_out1_div", +- clk_base + PLLM_OUT, 1, 0, CLK_IGNORE_UNUSED | ++ clk_base + PLLM_OUT, 1, 0, + CLK_SET_RATE_PARENT, 0, NULL); + clks[TEGRA20_CLK_PLL_M_OUT1] = clk; + +@@ -723,7 +723,8 @@ static void tegra20_super_clk_init(void) + + /* SCLK */ + clk = tegra_clk_register_super_mux("sclk", sclk_parents, +- ARRAY_SIZE(sclk_parents), CLK_SET_RATE_PARENT, ++ ARRAY_SIZE(sclk_parents), ++ CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + clk_base + SCLK_BURST_POLICY, 0, 4, 0, 0, NULL); + clks[TEGRA20_CLK_SCLK] = clk; + +@@ -814,9 +815,6 @@ static void __init tegra20_periph_clk_init(void) + CLK_SET_RATE_NO_REPARENT, + clk_base + CLK_SOURCE_EMC, + 30, 2, 0, &emc_lock); +- clk = tegra_clk_register_periph_gate("emc", "emc_mux", 0, clk_base, 0, +- 57, periph_clk_enb_refcnt); +- clks[TEGRA20_CLK_EMC] = clk; + + clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC, + &emc_lock); +@@ -1019,13 +1017,12 @@ static struct tegra_clk_init_table init_table[] __initdata = { + { TEGRA20_CLK_PLL_P_OUT2, TEGRA20_CLK_CLK_MAX, 48000000, 1 }, + { TEGRA20_CLK_PLL_P_OUT3, TEGRA20_CLK_CLK_MAX, 72000000, 1 }, + { TEGRA20_CLK_PLL_P_OUT4, TEGRA20_CLK_CLK_MAX, 24000000, 1 }, +- { TEGRA20_CLK_PLL_C, TEGRA20_CLK_CLK_MAX, 600000000, 1 }, +- { TEGRA20_CLK_PLL_C_OUT1, TEGRA20_CLK_CLK_MAX, 216000000, 1 }, +- { TEGRA20_CLK_SCLK, TEGRA20_CLK_PLL_C_OUT1, 0, 1 }, +- { TEGRA20_CLK_HCLK, TEGRA20_CLK_CLK_MAX, 0, 1 }, +- { TEGRA20_CLK_PCLK, TEGRA20_CLK_CLK_MAX, 60000000, 1 }, ++ { TEGRA20_CLK_PLL_C, TEGRA20_CLK_CLK_MAX, 600000000, 0 }, ++ { TEGRA20_CLK_PLL_C_OUT1, TEGRA20_CLK_CLK_MAX, 216000000, 0 }, ++ { TEGRA20_CLK_SCLK, TEGRA20_CLK_PLL_C_OUT1, 0, 0 }, ++ { TEGRA20_CLK_HCLK, TEGRA20_CLK_CLK_MAX, 0, 0 }, ++ { TEGRA20_CLK_PCLK, TEGRA20_CLK_CLK_MAX, 60000000, 0 }, + { TEGRA20_CLK_CSITE, TEGRA20_CLK_CLK_MAX, 0, 1 }, +- { TEGRA20_CLK_EMC, TEGRA20_CLK_CLK_MAX, 0, 1 }, + { TEGRA20_CLK_CCLK, TEGRA20_CLK_CLK_MAX, 0, 1 }, + { TEGRA20_CLK_UARTA, TEGRA20_CLK_PLL_P, 0, 0 }, + { TEGRA20_CLK_UARTB, TEGRA20_CLK_PLL_P, 0, 0 }, +diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c +index 9e6260869eb9..25cc6e0905be 100644 +--- a/drivers/clk/tegra/clk-tegra210.c ++++ b/drivers/clk/tegra/clk-tegra210.c +@@ -3025,7 +3025,7 @@ static struct tegra_clk_init_table init_table[] __initdata = { + { TEGRA210_CLK_I2S4, TEGRA210_CLK_PLL_A_OUT0, 11289600, 0 }, + { TEGRA210_CLK_HOST1X, TEGRA210_CLK_PLL_P, 136000000, 1 }, + { TEGRA210_CLK_SCLK_MUX, TEGRA210_CLK_PLL_P, 0, 1 }, +- { TEGRA210_CLK_SCLK, TEGRA210_CLK_CLK_MAX, 102000000, 1 }, ++ { TEGRA210_CLK_SCLK, TEGRA210_CLK_CLK_MAX, 102000000, 0 }, + { TEGRA210_CLK_DFLL_SOC, TEGRA210_CLK_PLL_P, 51000000, 1 }, + { TEGRA210_CLK_DFLL_REF, TEGRA210_CLK_PLL_P, 51000000, 1 }, + { TEGRA210_CLK_SBC4, TEGRA210_CLK_PLL_P, 12000000, 1 }, +@@ -3040,7 +3040,6 @@ static struct tegra_clk_init_table init_table[] __initdata = { + { TEGRA210_CLK_XUSB_DEV_SRC, TEGRA210_CLK_PLL_P_OUT_XUSB, 102000000, 0 }, + { TEGRA210_CLK_SATA, TEGRA210_CLK_PLL_P, 104000000, 0 }, + { TEGRA210_CLK_SATA_OOB, TEGRA210_CLK_PLL_P, 204000000, 0 }, +- { TEGRA210_CLK_EMC, TEGRA210_CLK_CLK_MAX, 0, 1 }, + { TEGRA210_CLK_MSELECT, TEGRA210_CLK_CLK_MAX, 0, 1 }, + { TEGRA210_CLK_CSITE, TEGRA210_CLK_CLK_MAX, 0, 1 }, + /* TODO find a way to enable this on-demand */ +diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c +index bee84c554932..8428895ad475 100644 +--- a/drivers/clk/tegra/clk-tegra30.c ++++ b/drivers/clk/tegra/clk-tegra30.c +@@ -819,6 +819,7 @@ static struct tegra_clk tegra30_clks[tegra_clk_max] __initdata = { + [tegra_clk_pll_a] = { .dt_id = TEGRA30_CLK_PLL_A, .present = true }, + [tegra_clk_pll_a_out0] = { .dt_id = TEGRA30_CLK_PLL_A_OUT0, .present = true }, + [tegra_clk_cec] = { .dt_id = TEGRA30_CLK_CEC, .present = true }, ++ [tegra_clk_emc] = { .dt_id = TEGRA30_CLK_EMC, .present = true }, + }; + + static const char *pll_e_parents[] = { "pll_ref", "pll_p" }; +@@ -843,8 +844,7 @@ static void __init tegra30_pll_init(void) + + /* PLLM */ + clk = tegra_clk_register_pll("pll_m", "pll_ref", clk_base, pmc_base, +- CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE, +- &pll_m_params, NULL); ++ CLK_SET_RATE_GATE, &pll_m_params, NULL); + clks[TEGRA30_CLK_PLL_M] = clk; + + /* PLLM_OUT1 */ +@@ -852,7 +852,7 @@ static void __init tegra30_pll_init(void) + clk_base + PLLM_OUT, 0, TEGRA_DIVIDER_ROUND_UP, + 8, 8, 1, NULL); + clk = tegra_clk_register_pll_out("pll_m_out1", "pll_m_out1_div", +- clk_base + PLLM_OUT, 1, 0, CLK_IGNORE_UNUSED | ++ clk_base + PLLM_OUT, 1, 0, + CLK_SET_RATE_PARENT, 0, NULL); + clks[TEGRA30_CLK_PLL_M_OUT1] = clk; + +@@ -990,7 +990,7 @@ static void __init tegra30_super_clk_init(void) + /* SCLK */ + clk = tegra_clk_register_super_mux("sclk", sclk_parents, + ARRAY_SIZE(sclk_parents), +- CLK_SET_RATE_PARENT, ++ CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + clk_base + SCLK_BURST_POLICY, + 0, 4, 0, 0, NULL); + clks[TEGRA30_CLK_SCLK] = clk; +@@ -1060,9 +1060,6 @@ static void __init tegra30_periph_clk_init(void) + CLK_SET_RATE_NO_REPARENT, + clk_base + CLK_SOURCE_EMC, + 30, 2, 0, &emc_lock); +- clk = tegra_clk_register_periph_gate("emc", "emc_mux", 0, clk_base, 0, +- 57, periph_clk_enb_refcnt); +- clks[TEGRA30_CLK_EMC] = clk; + + clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC, + &emc_lock); +@@ -1252,10 +1249,7 @@ static struct tegra_clk_init_table init_table[] __initdata = { + { TEGRA30_CLK_SDMMC1, TEGRA30_CLK_PLL_P, 48000000, 0 }, + { TEGRA30_CLK_SDMMC2, TEGRA30_CLK_PLL_P, 48000000, 0 }, + { TEGRA30_CLK_SDMMC3, TEGRA30_CLK_PLL_P, 48000000, 0 }, +- { TEGRA30_CLK_PLL_M, TEGRA30_CLK_CLK_MAX, 0, 1 }, +- { TEGRA30_CLK_PCLK, TEGRA30_CLK_CLK_MAX, 0, 1 }, + { TEGRA30_CLK_CSITE, TEGRA30_CLK_CLK_MAX, 0, 1 }, +- { TEGRA30_CLK_EMC, TEGRA30_CLK_CLK_MAX, 0, 1 }, + { TEGRA30_CLK_MSELECT, TEGRA30_CLK_CLK_MAX, 0, 1 }, + { TEGRA30_CLK_SBC1, TEGRA30_CLK_PLL_P, 100000000, 0 }, + { TEGRA30_CLK_SBC2, TEGRA30_CLK_PLL_P, 100000000, 0 }, +diff --git a/drivers/cpufreq/armada-37xx-cpufreq.c b/drivers/cpufreq/armada-37xx-cpufreq.c +index c6ebc88a7d8d..72a2975499db 100644 +--- a/drivers/cpufreq/armada-37xx-cpufreq.c ++++ b/drivers/cpufreq/armada-37xx-cpufreq.c +@@ -202,6 +202,7 @@ static int __init armada37xx_cpufreq_driver_init(void) + cur_frequency = clk_get_rate(clk); + if (!cur_frequency) { + dev_err(cpu_dev, "Failed to get clock rate for CPU\n"); ++ clk_put(clk); + return -EINVAL; + } + +@@ -210,6 +211,7 @@ static int __init armada37xx_cpufreq_driver_init(void) + return -EINVAL; + + armada37xx_cpufreq_dvfs_setup(nb_pm_base, clk, dvfs->divider); ++ clk_put(clk); + + for (load_lvl = ARMADA_37XX_DVFS_LOAD_0; load_lvl < LOAD_LEVEL_NR; + load_lvl++) { +diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c +index a1c3025f9df7..dcb1cb9a4572 100644 +--- a/drivers/cpufreq/cppc_cpufreq.c ++++ b/drivers/cpufreq/cppc_cpufreq.c +@@ -20,6 +20,7 @@ + #include <linux/cpu.h> + #include <linux/cpufreq.h> + #include <linux/dmi.h> ++#include <linux/time.h> + #include <linux/vmalloc.h> + + #include <asm/unaligned.h> +@@ -162,6 +163,8 @@ static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy) + policy->cpuinfo.max_freq = cppc_dmi_max_khz; + + policy->cpuinfo.transition_latency = cppc_get_transition_latency(cpu_num); ++ policy->transition_delay_us = cppc_get_transition_latency(cpu_num) / ++ NSEC_PER_USEC; + policy->shared_type = cpu->shared_type; + + if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) +diff --git a/drivers/dax/device.c b/drivers/dax/device.c +index 2137dbc29877..383779707404 100644 +--- a/drivers/dax/device.c ++++ b/drivers/dax/device.c +@@ -19,6 +19,7 @@ + #include <linux/dax.h> + #include <linux/fs.h> + #include <linux/mm.h> ++#include <linux/mman.h> + #include "dax-private.h" + #include "dax.h" + +@@ -534,6 +535,7 @@ static const struct file_operations dax_fops = { + .release = dax_release, + .get_unmapped_area = dax_get_unmapped_area, + .mmap = dax_mmap, ++ .mmap_supported_flags = MAP_SYNC, + }; + + static void dev_dax_release(struct device *dev) +diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c +index c00e3923d7d8..94236ec9d410 100644 +--- a/drivers/dma/at_xdmac.c ++++ b/drivers/dma/at_xdmac.c +@@ -1471,10 +1471,10 @@ at_xdmac_tx_status(struct dma_chan *chan, dma_cookie_t cookie, + for (retry = 0; retry < AT_XDMAC_RESIDUE_MAX_RETRIES; retry++) { + check_nda = at_xdmac_chan_read(atchan, AT_XDMAC_CNDA) & 0xfffffffc; + rmb(); +- initd = !!(at_xdmac_chan_read(atchan, AT_XDMAC_CC) & AT_XDMAC_CC_INITD); +- rmb(); + cur_ubc = at_xdmac_chan_read(atchan, AT_XDMAC_CUBC); + rmb(); ++ initd = !!(at_xdmac_chan_read(atchan, AT_XDMAC_CC) & AT_XDMAC_CC_INITD); ++ rmb(); + cur_nda = at_xdmac_chan_read(atchan, AT_XDMAC_CNDA) & 0xfffffffc; + rmb(); + +diff --git a/drivers/extcon/extcon-intel-cht-wc.c b/drivers/extcon/extcon-intel-cht-wc.c +index 7c4bc8c44c3f..b7e9ea377d70 100644 +--- a/drivers/extcon/extcon-intel-cht-wc.c ++++ b/drivers/extcon/extcon-intel-cht-wc.c +@@ -66,6 +66,8 @@ + + #define CHT_WC_VBUS_GPIO_CTLO 0x6e2d + #define CHT_WC_VBUS_GPIO_CTLO_OUTPUT BIT(0) ++#define CHT_WC_VBUS_GPIO_CTLO_DRV_OD BIT(4) ++#define CHT_WC_VBUS_GPIO_CTLO_DIR_OUT BIT(5) + + enum cht_wc_usb_id { + USB_ID_OTG, +@@ -183,14 +185,15 @@ static void cht_wc_extcon_set_5v_boost(struct cht_wc_extcon_data *ext, + { + int ret, val; + +- val = enable ? CHT_WC_VBUS_GPIO_CTLO_OUTPUT : 0; +- + /* + * The 5V boost converter is enabled through a gpio on the PMIC, since + * there currently is no gpio driver we access the gpio reg directly. + */ +- ret = regmap_update_bits(ext->regmap, CHT_WC_VBUS_GPIO_CTLO, +- CHT_WC_VBUS_GPIO_CTLO_OUTPUT, val); ++ val = CHT_WC_VBUS_GPIO_CTLO_DRV_OD | CHT_WC_VBUS_GPIO_CTLO_DIR_OUT; ++ if (enable) ++ val |= CHT_WC_VBUS_GPIO_CTLO_OUTPUT; ++ ++ ret = regmap_write(ext->regmap, CHT_WC_VBUS_GPIO_CTLO, val); + if (ret) + dev_err(ext->dev, "Error writing Vbus GPIO CTLO: %d\n", ret); + } +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c +index c53095b3b0fb..1ae5ae8c45a4 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c +@@ -569,6 +569,7 @@ static const struct amdgpu_px_quirk amdgpu_px_quirk_list[] = { + { 0x1002, 0x6900, 0x1002, 0x0124, AMDGPU_PX_QUIRK_FORCE_ATPX }, + { 0x1002, 0x6900, 0x1028, 0x0812, AMDGPU_PX_QUIRK_FORCE_ATPX }, + { 0x1002, 0x6900, 0x1028, 0x0813, AMDGPU_PX_QUIRK_FORCE_ATPX }, ++ { 0x1002, 0x67DF, 0x1028, 0x0774, AMDGPU_PX_QUIRK_FORCE_ATPX }, + { 0, 0, 0, 0, 0 }, + }; + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c +index 59089e027f4d..92be7f6de197 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c +@@ -233,8 +233,10 @@ void amdgpu_bo_list_get_list(struct amdgpu_bo_list *list, + for (i = 0; i < list->num_entries; i++) { + unsigned priority = list->array[i].priority; + +- list_add_tail(&list->array[i].tv.head, +- &bucket[priority]); ++ if (!list->array[i].robj->parent) ++ list_add_tail(&list->array[i].tv.head, ++ &bucket[priority]); ++ + list->array[i].user_pages = NULL; + } + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +index e80fc38141b5..b03b2983de1e 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +@@ -542,7 +542,7 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p, + INIT_LIST_HEAD(&duplicates); + amdgpu_vm_get_pd_bo(&fpriv->vm, &p->validated, &p->vm_pd); + +- if (p->uf_entry.robj) ++ if (p->uf_entry.robj && !p->uf_entry.robj->parent) + list_add(&p->uf_entry.tv.head, &p->validated); + + while (1) { +diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c +index 6e8278e689b1..0066da3e79bb 100644 +--- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c ++++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c +@@ -866,7 +866,7 @@ static void cik_sdma_ring_emit_pipeline_sync(struct amdgpu_ring *ring) + amdgpu_ring_write(ring, addr & 0xfffffffc); + amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff); + amdgpu_ring_write(ring, seq); /* reference */ +- amdgpu_ring_write(ring, 0xfffffff); /* mask */ ++ amdgpu_ring_write(ring, 0xffffffff); /* mask */ + amdgpu_ring_write(ring, (0xfff << 16) | 4); /* retry count, poll interval */ + } + +diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c +index d4787ad4d346..bd844edad6b7 100644 +--- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c ++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c +@@ -844,7 +844,7 @@ static void sdma_v2_4_ring_emit_pipeline_sync(struct amdgpu_ring *ring) + amdgpu_ring_write(ring, addr & 0xfffffffc); + amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff); + amdgpu_ring_write(ring, seq); /* reference */ +- amdgpu_ring_write(ring, 0xfffffff); /* mask */ ++ amdgpu_ring_write(ring, 0xffffffff); /* mask */ + amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) | + SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(4)); /* retry count, poll interval */ + } +diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c +index 521978c40537..fa63c564cf91 100644 +--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c +@@ -1110,7 +1110,7 @@ static void sdma_v3_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring) + amdgpu_ring_write(ring, addr & 0xfffffffc); + amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff); + amdgpu_ring_write(ring, seq); /* reference */ +- amdgpu_ring_write(ring, 0xfffffff); /* mask */ ++ amdgpu_ring_write(ring, 0xffffffff); /* mask */ + amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) | + SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(4)); /* retry count, poll interval */ + } +diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +index 91cf95a8c39c..036798b52f67 100644 +--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +@@ -1113,7 +1113,7 @@ static void sdma_v4_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring) + amdgpu_ring_write(ring, addr & 0xfffffffc); + amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff); + amdgpu_ring_write(ring, seq); /* reference */ +- amdgpu_ring_write(ring, 0xfffffff); /* mask */ ++ amdgpu_ring_write(ring, 0xffffffff); /* mask */ + amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) | + SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(4)); /* retry count, poll interval */ + } +diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c +index 2095173aaabf..3598151652d7 100644 +--- a/drivers/gpu/drm/amd/amdgpu/si.c ++++ b/drivers/gpu/drm/amd/amdgpu/si.c +@@ -1231,6 +1231,71 @@ static void si_detect_hw_virtualization(struct amdgpu_device *adev) + adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE; + } + ++static int si_get_pcie_lanes(struct amdgpu_device *adev) ++{ ++ u32 link_width_cntl; ++ ++ if (adev->flags & AMD_IS_APU) ++ return 0; ++ ++ link_width_cntl = RREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL); ++ ++ switch ((link_width_cntl & LC_LINK_WIDTH_RD_MASK) >> LC_LINK_WIDTH_RD_SHIFT) { ++ case LC_LINK_WIDTH_X1: ++ return 1; ++ case LC_LINK_WIDTH_X2: ++ return 2; ++ case LC_LINK_WIDTH_X4: ++ return 4; ++ case LC_LINK_WIDTH_X8: ++ return 8; ++ case LC_LINK_WIDTH_X0: ++ case LC_LINK_WIDTH_X16: ++ default: ++ return 16; ++ } ++} ++ ++static void si_set_pcie_lanes(struct amdgpu_device *adev, int lanes) ++{ ++ u32 link_width_cntl, mask; ++ ++ if (adev->flags & AMD_IS_APU) ++ return; ++ ++ switch (lanes) { ++ case 0: ++ mask = LC_LINK_WIDTH_X0; ++ break; ++ case 1: ++ mask = LC_LINK_WIDTH_X1; ++ break; ++ case 2: ++ mask = LC_LINK_WIDTH_X2; ++ break; ++ case 4: ++ mask = LC_LINK_WIDTH_X4; ++ break; ++ case 8: ++ mask = LC_LINK_WIDTH_X8; ++ break; ++ case 16: ++ mask = LC_LINK_WIDTH_X16; ++ break; ++ default: ++ DRM_ERROR("invalid pcie lane request: %d\n", lanes); ++ return; ++ } ++ ++ link_width_cntl = RREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL); ++ link_width_cntl &= ~LC_LINK_WIDTH_MASK; ++ link_width_cntl |= mask << LC_LINK_WIDTH_SHIFT; ++ link_width_cntl |= (LC_RECONFIG_NOW | ++ LC_RECONFIG_ARC_MISSING_ESCAPE); ++ ++ WREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl); ++} ++ + static const struct amdgpu_asic_funcs si_asic_funcs = + { + .read_disabled_bios = &si_read_disabled_bios, +@@ -1241,6 +1306,8 @@ static const struct amdgpu_asic_funcs si_asic_funcs = + .get_xclk = &si_get_xclk, + .set_uvd_clocks = &si_set_uvd_clocks, + .set_vce_clocks = NULL, ++ .get_pcie_lanes = &si_get_pcie_lanes, ++ .set_pcie_lanes = &si_set_pcie_lanes, + .get_config_memsize = &si_get_config_memsize, + }; + +diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c b/drivers/gpu/drm/amd/amdgpu/si_dpm.c +index 22f0b7ff3ac9..b1a3ca585ed1 100644 +--- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c ++++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c +@@ -6370,9 +6370,9 @@ static void si_set_pcie_lane_width_in_smc(struct amdgpu_device *adev, + { + u32 lane_width; + u32 new_lane_width = +- (amdgpu_new_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT; ++ ((amdgpu_new_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT) + 1; + u32 current_lane_width = +- (amdgpu_current_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT; ++ ((amdgpu_current_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT) + 1; + + if (new_lane_width != current_lane_width) { + amdgpu_set_pcie_lanes(adev, new_lane_width); +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +index 63c67346d316..8a6e6fbc78cd 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -4776,33 +4776,6 @@ static int dm_update_planes_state(struct dc *dc, + return ret; + } + +-static int dm_atomic_check_plane_state_fb(struct drm_atomic_state *state, +- struct drm_crtc *crtc) +-{ +- struct drm_plane *plane; +- struct drm_crtc_state *crtc_state; +- +- WARN_ON(!drm_atomic_get_new_crtc_state(state, crtc)); +- +- drm_for_each_plane_mask(plane, state->dev, crtc->state->plane_mask) { +- struct drm_plane_state *plane_state = +- drm_atomic_get_plane_state(state, plane); +- +- if (IS_ERR(plane_state)) +- return -EDEADLK; +- +- crtc_state = drm_atomic_get_crtc_state(plane_state->state, crtc); +- if (IS_ERR(crtc_state)) +- return PTR_ERR(crtc_state); +- +- if (crtc->primary == plane && crtc_state->active) { +- if (!plane_state->fb) +- return -EINVAL; +- } +- } +- return 0; +-} +- + static int amdgpu_dm_atomic_check(struct drm_device *dev, + struct drm_atomic_state *state) + { +@@ -4826,10 +4799,6 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev, + goto fail; + + for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { +- ret = dm_atomic_check_plane_state_fb(state, crtc); +- if (ret) +- goto fail; +- + if (!drm_atomic_crtc_needs_modeset(new_crtc_state) && + !new_crtc_state->color_mgmt_changed) + continue; +diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c +index 83bae207371d..b3c30abcb8f1 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c ++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c +@@ -736,6 +736,8 @@ static void dce110_stream_encoder_update_hdmi_info_packets( + if (info_frame->avi.valid) { + const uint32_t *content = + (const uint32_t *) &info_frame->avi.sb[0]; ++ /*we need turn on clock before programming AFMT block*/ ++ REG_UPDATE(AFMT_CNTL, AFMT_AUDIO_CLOCK_EN, 1); + + REG_WRITE(AFMT_AVI_INFO0, content[0]); + +diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h +index c6197d990818..d35b93f5ecfc 100644 +--- a/drivers/gpu/drm/i915/gvt/gvt.h ++++ b/drivers/gpu/drm/i915/gvt/gvt.h +@@ -308,7 +308,10 @@ struct intel_gvt { + wait_queue_head_t service_thread_wq; + unsigned long service_request; + +- struct engine_mmio *engine_mmio_list; ++ struct { ++ struct engine_mmio *mmio; ++ int ctx_mmio_count[I915_NUM_ENGINES]; ++ } engine_mmio_list; + + struct dentry *debugfs_root; + }; +diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c b/drivers/gpu/drm/i915/gvt/mmio_context.c +index 152df3d0291e..c44dba338c57 100644 +--- a/drivers/gpu/drm/i915/gvt/mmio_context.c ++++ b/drivers/gpu/drm/i915/gvt/mmio_context.c +@@ -50,6 +50,8 @@ + #define RING_GFX_MODE(base) _MMIO((base) + 0x29c) + #define VF_GUARDBAND _MMIO(0x83a4) + ++#define GEN9_MOCS_SIZE 64 ++ + /* Raw offset is appened to each line for convenience. */ + static struct engine_mmio gen8_engine_mmio_list[] __cacheline_aligned = { + {RCS, GFX_MODE_GEN7, 0xffff, false}, /* 0x229c */ +@@ -152,8 +154,8 @@ static struct engine_mmio gen9_engine_mmio_list[] __cacheline_aligned = { + + static struct { + bool initialized; +- u32 control_table[I915_NUM_ENGINES][64]; +- u32 l3cc_table[32]; ++ u32 control_table[I915_NUM_ENGINES][GEN9_MOCS_SIZE]; ++ u32 l3cc_table[GEN9_MOCS_SIZE / 2]; + } gen9_render_mocs; + + static void load_render_mocs(struct drm_i915_private *dev_priv) +@@ -170,7 +172,7 @@ static void load_render_mocs(struct drm_i915_private *dev_priv) + + for (ring_id = 0; ring_id < ARRAY_SIZE(regs); ring_id++) { + offset.reg = regs[ring_id]; +- for (i = 0; i < 64; i++) { ++ for (i = 0; i < GEN9_MOCS_SIZE; i++) { + gen9_render_mocs.control_table[ring_id][i] = + I915_READ_FW(offset); + offset.reg += 4; +@@ -178,7 +180,7 @@ static void load_render_mocs(struct drm_i915_private *dev_priv) + } + + offset.reg = 0xb020; +- for (i = 0; i < 32; i++) { ++ for (i = 0; i < GEN9_MOCS_SIZE / 2; i++) { + gen9_render_mocs.l3cc_table[i] = + I915_READ_FW(offset); + offset.reg += 4; +@@ -186,6 +188,153 @@ static void load_render_mocs(struct drm_i915_private *dev_priv) + gen9_render_mocs.initialized = true; + } + ++static int ++restore_context_mmio_for_inhibit(struct intel_vgpu *vgpu, ++ struct drm_i915_gem_request *req) ++{ ++ u32 *cs; ++ int ret; ++ struct engine_mmio *mmio; ++ struct intel_gvt *gvt = vgpu->gvt; ++ int ring_id = req->engine->id; ++ int count = gvt->engine_mmio_list.ctx_mmio_count[ring_id]; ++ ++ if (count == 0) ++ return 0; ++ ++ ret = req->engine->emit_flush(req, EMIT_BARRIER); ++ if (ret) ++ return ret; ++ ++ cs = intel_ring_begin(req, count * 2 + 2); ++ if (IS_ERR(cs)) ++ return PTR_ERR(cs); ++ ++ *cs++ = MI_LOAD_REGISTER_IMM(count); ++ for (mmio = gvt->engine_mmio_list.mmio; ++ i915_mmio_reg_valid(mmio->reg); mmio++) { ++ if (mmio->ring_id != ring_id || ++ !mmio->in_context) ++ continue; ++ ++ *cs++ = i915_mmio_reg_offset(mmio->reg); ++ *cs++ = vgpu_vreg_t(vgpu, mmio->reg) | ++ (mmio->mask << 16); ++ gvt_dbg_core("add lri reg pair 0x%x:0x%x in inhibit ctx, vgpu:%d, rind_id:%d\n", ++ *(cs-2), *(cs-1), vgpu->id, ring_id); ++ } ++ ++ *cs++ = MI_NOOP; ++ intel_ring_advance(req, cs); ++ ++ ret = req->engine->emit_flush(req, EMIT_BARRIER); ++ if (ret) ++ return ret; ++ ++ return 0; ++} ++ ++static int ++restore_render_mocs_control_for_inhibit(struct intel_vgpu *vgpu, ++ struct drm_i915_gem_request *req) ++{ ++ unsigned int index; ++ u32 *cs; ++ ++ cs = intel_ring_begin(req, 2 * GEN9_MOCS_SIZE + 2); ++ if (IS_ERR(cs)) ++ return PTR_ERR(cs); ++ ++ *cs++ = MI_LOAD_REGISTER_IMM(GEN9_MOCS_SIZE); ++ ++ for (index = 0; index < GEN9_MOCS_SIZE; index++) { ++ *cs++ = i915_mmio_reg_offset(GEN9_GFX_MOCS(index)); ++ *cs++ = vgpu_vreg_t(vgpu, GEN9_GFX_MOCS(index)); ++ gvt_dbg_core("add lri reg pair 0x%x:0x%x in inhibit ctx, vgpu:%d, rind_id:%d\n", ++ *(cs-2), *(cs-1), vgpu->id, req->engine->id); ++ ++ } ++ ++ *cs++ = MI_NOOP; ++ intel_ring_advance(req, cs); ++ ++ return 0; ++} ++ ++static int ++restore_render_mocs_l3cc_for_inhibit(struct intel_vgpu *vgpu, ++ struct drm_i915_gem_request *req) ++{ ++ unsigned int index; ++ u32 *cs; ++ ++ cs = intel_ring_begin(req, 2 * GEN9_MOCS_SIZE / 2 + 2); ++ if (IS_ERR(cs)) ++ return PTR_ERR(cs); ++ ++ *cs++ = MI_LOAD_REGISTER_IMM(GEN9_MOCS_SIZE / 2); ++ ++ for (index = 0; index < GEN9_MOCS_SIZE / 2; index++) { ++ *cs++ = i915_mmio_reg_offset(GEN9_LNCFCMOCS(index)); ++ *cs++ = vgpu_vreg_t(vgpu, GEN9_LNCFCMOCS(index)); ++ gvt_dbg_core("add lri reg pair 0x%x:0x%x in inhibit ctx, vgpu:%d, rind_id:%d\n", ++ *(cs-2), *(cs-1), vgpu->id, req->engine->id); ++ ++ } ++ ++ *cs++ = MI_NOOP; ++ intel_ring_advance(req, cs); ++ ++ return 0; ++} ++ ++/* ++ * Use lri command to initialize the mmio which is in context state image for ++ * inhibit context, it contains tracked engine mmio, render_mocs and ++ * render_mocs_l3cc. ++ */ ++int intel_vgpu_restore_inhibit_context(struct intel_vgpu *vgpu, ++ struct drm_i915_gem_request *req) ++{ ++ int ret; ++ u32 *cs; ++ ++ cs = intel_ring_begin(req, 2); ++ if (IS_ERR(cs)) ++ return PTR_ERR(cs); ++ ++ *cs++ = MI_ARB_ON_OFF | MI_ARB_DISABLE; ++ *cs++ = MI_NOOP; ++ intel_ring_advance(req, cs); ++ ++ ret = restore_context_mmio_for_inhibit(vgpu, req); ++ if (ret) ++ goto out; ++ ++ /* no MOCS register in context except render engine */ ++ if (req->engine->id != RCS) ++ goto out; ++ ++ ret = restore_render_mocs_control_for_inhibit(vgpu, req); ++ if (ret) ++ goto out; ++ ++ ret = restore_render_mocs_l3cc_for_inhibit(vgpu, req); ++ if (ret) ++ goto out; ++ ++out: ++ cs = intel_ring_begin(req, 2); ++ if (IS_ERR(cs)) ++ return PTR_ERR(cs); ++ ++ *cs++ = MI_ARB_ON_OFF | MI_ARB_ENABLE; ++ *cs++ = MI_NOOP; ++ intel_ring_advance(req, cs); ++ ++ return ret; ++} ++ + static void handle_tlb_pending_event(struct intel_vgpu *vgpu, int ring_id) + { + struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; +@@ -252,11 +401,14 @@ static void switch_mocs(struct intel_vgpu *pre, struct intel_vgpu *next, + if (WARN_ON(ring_id >= ARRAY_SIZE(regs))) + return; + ++ if (IS_KABYLAKE(dev_priv) && ring_id == RCS) ++ return; ++ + if (!pre && !gen9_render_mocs.initialized) + load_render_mocs(dev_priv); + + offset.reg = regs[ring_id]; +- for (i = 0; i < 64; i++) { ++ for (i = 0; i < GEN9_MOCS_SIZE; i++) { + if (pre) + old_v = vgpu_vreg_t(pre, offset); + else +@@ -274,7 +426,7 @@ static void switch_mocs(struct intel_vgpu *pre, struct intel_vgpu *next, + + if (ring_id == RCS) { + l3_offset.reg = 0xb020; +- for (i = 0; i < 32; i++) { ++ for (i = 0; i < GEN9_MOCS_SIZE / 2; i++) { + if (pre) + old_v = vgpu_vreg_t(pre, l3_offset); + else +@@ -294,6 +446,16 @@ static void switch_mocs(struct intel_vgpu *pre, struct intel_vgpu *next, + + #define CTX_CONTEXT_CONTROL_VAL 0x03 + ++bool is_inhibit_context(struct i915_gem_context *ctx, int ring_id) ++{ ++ u32 *reg_state = ctx->engine[ring_id].lrc_reg_state; ++ u32 inhibit_mask = ++ _MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT); ++ ++ return inhibit_mask == ++ (reg_state[CTX_CONTEXT_CONTROL_VAL] & inhibit_mask); ++} ++ + /* Switch ring mmio values (context). */ + static void switch_mmio(struct intel_vgpu *pre, + struct intel_vgpu *next, +@@ -301,9 +463,6 @@ static void switch_mmio(struct intel_vgpu *pre, + { + struct drm_i915_private *dev_priv; + struct intel_vgpu_submission *s; +- u32 *reg_state, ctx_ctrl; +- u32 inhibit_mask = +- _MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT); + struct engine_mmio *mmio; + u32 old_v, new_v; + +@@ -311,10 +470,18 @@ static void switch_mmio(struct intel_vgpu *pre, + if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) + switch_mocs(pre, next, ring_id); + +- for (mmio = dev_priv->gvt->engine_mmio_list; ++ for (mmio = dev_priv->gvt->engine_mmio_list.mmio; + i915_mmio_reg_valid(mmio->reg); mmio++) { + if (mmio->ring_id != ring_id) + continue; ++ /* ++ * No need to do save or restore of the mmio which is in context ++ * state image on kabylake, it's initialized by lri command and ++ * save or restore with context together. ++ */ ++ if (IS_KABYLAKE(dev_priv) && mmio->in_context) ++ continue; ++ + // save + if (pre) { + vgpu_vreg_t(pre, mmio->reg) = I915_READ_FW(mmio->reg); +@@ -328,16 +495,13 @@ static void switch_mmio(struct intel_vgpu *pre, + // restore + if (next) { + s = &next->submission; +- reg_state = +- s->shadow_ctx->engine[ring_id].lrc_reg_state; +- ctx_ctrl = reg_state[CTX_CONTEXT_CONTROL_VAL]; + /* +- * if it is an inhibit context, load in_context mmio +- * into HW by mmio write. If it is not, skip this mmio +- * write. ++ * No need to restore the mmio which is in context state ++ * image if it's not inhibit context, it will restore ++ * itself. + */ + if (mmio->in_context && +- (ctx_ctrl & inhibit_mask) != inhibit_mask) ++ !is_inhibit_context(s->shadow_ctx, ring_id)) + continue; + + if (mmio->mask) +@@ -408,8 +572,16 @@ void intel_gvt_switch_mmio(struct intel_vgpu *pre, + */ + void intel_gvt_init_engine_mmio_context(struct intel_gvt *gvt) + { ++ struct engine_mmio *mmio; ++ + if (IS_SKYLAKE(gvt->dev_priv) || IS_KABYLAKE(gvt->dev_priv)) +- gvt->engine_mmio_list = gen9_engine_mmio_list; ++ gvt->engine_mmio_list.mmio = gen9_engine_mmio_list; + else +- gvt->engine_mmio_list = gen8_engine_mmio_list; ++ gvt->engine_mmio_list.mmio = gen8_engine_mmio_list; ++ ++ for (mmio = gvt->engine_mmio_list.mmio; ++ i915_mmio_reg_valid(mmio->reg); mmio++) { ++ if (mmio->in_context) ++ gvt->engine_mmio_list.ctx_mmio_count[mmio->ring_id]++; ++ } + } +diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.h b/drivers/gpu/drm/i915/gvt/mmio_context.h +index ca2c6a745673..0b1d98536653 100644 +--- a/drivers/gpu/drm/i915/gvt/mmio_context.h ++++ b/drivers/gpu/drm/i915/gvt/mmio_context.h +@@ -49,4 +49,9 @@ void intel_gvt_switch_mmio(struct intel_vgpu *pre, + + void intel_gvt_init_engine_mmio_context(struct intel_gvt *gvt); + ++bool is_inhibit_context(struct i915_gem_context *ctx, int ring_id); ++ ++int intel_vgpu_restore_inhibit_context(struct intel_vgpu *vgpu, ++ struct drm_i915_gem_request *req); ++ + #endif +diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c +index d74d6f05c62c..88b7b47695bd 100644 +--- a/drivers/gpu/drm/i915/gvt/scheduler.c ++++ b/drivers/gpu/drm/i915/gvt/scheduler.c +@@ -275,6 +275,11 @@ static int copy_workload_to_ring_buffer(struct intel_vgpu_workload *workload) + struct intel_vgpu *vgpu = workload->vgpu; + void *shadow_ring_buffer_va; + u32 *cs; ++ struct drm_i915_gem_request *req = workload->req; ++ ++ if (IS_KABYLAKE(req->i915) && ++ is_inhibit_context(req->ctx, req->engine->id)) ++ intel_vgpu_restore_inhibit_context(vgpu, req); + + /* allocate shadow ring buffer */ + cs = intel_ring_begin(workload->req, workload->rb_len / sizeof(u32)); +diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c +index 2f5209de0391..f1cd4f0ffc62 100644 +--- a/drivers/gpu/drm/i915/i915_drv.c ++++ b/drivers/gpu/drm/i915/i915_drv.c +@@ -1599,15 +1599,12 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation) + { + struct drm_i915_private *dev_priv = to_i915(dev); + struct pci_dev *pdev = dev_priv->drm.pdev; +- bool fw_csr; + int ret; + + disable_rpm_wakeref_asserts(dev_priv); + + intel_display_set_init_power(dev_priv, false); + +- fw_csr = !IS_GEN9_LP(dev_priv) && !hibernation && +- suspend_to_idle(dev_priv) && dev_priv->csr.dmc_payload; + /* + * In case of firmware assisted context save/restore don't manually + * deinit the power domains. This also means the CSR/DMC firmware will +@@ -1615,8 +1612,11 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation) + * also enable deeper system power states that would be blocked if the + * firmware was inactive. + */ +- if (!fw_csr) ++ if (IS_GEN9_LP(dev_priv) || hibernation || !suspend_to_idle(dev_priv) || ++ dev_priv->csr.dmc_payload == NULL) { + intel_power_domains_suspend(dev_priv); ++ dev_priv->power_domains_suspended = true; ++ } + + ret = 0; + if (IS_GEN9_LP(dev_priv)) +@@ -1628,8 +1628,10 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation) + + if (ret) { + DRM_ERROR("Suspend complete failed: %d\n", ret); +- if (!fw_csr) ++ if (dev_priv->power_domains_suspended) { + intel_power_domains_init_hw(dev_priv, true); ++ dev_priv->power_domains_suspended = false; ++ } + + goto out; + } +@@ -1650,8 +1652,6 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation) + if (!(hibernation && INTEL_GEN(dev_priv) < 6)) + pci_set_power_state(pdev, PCI_D3hot); + +- dev_priv->suspended_to_idle = suspend_to_idle(dev_priv); +- + out: + enable_rpm_wakeref_asserts(dev_priv); + +@@ -1818,8 +1818,7 @@ static int i915_drm_resume_early(struct drm_device *dev) + intel_uncore_resume_early(dev_priv); + + if (IS_GEN9_LP(dev_priv)) { +- if (!dev_priv->suspended_to_idle) +- gen9_sanitize_dc_state(dev_priv); ++ gen9_sanitize_dc_state(dev_priv); + bxt_disable_dc9(dev_priv); + } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { + hsw_disable_pc8(dev_priv); +@@ -1827,8 +1826,7 @@ static int i915_drm_resume_early(struct drm_device *dev) + + intel_uncore_sanitize(dev_priv); + +- if (IS_GEN9_LP(dev_priv) || +- !(dev_priv->suspended_to_idle && dev_priv->csr.dmc_payload)) ++ if (dev_priv->power_domains_suspended) + intel_power_domains_init_hw(dev_priv, true); + else + intel_display_set_init_power(dev_priv, true); +@@ -1838,7 +1836,7 @@ static int i915_drm_resume_early(struct drm_device *dev) + enable_rpm_wakeref_asserts(dev_priv); + + out: +- dev_priv->suspended_to_idle = false; ++ dev_priv->power_domains_suspended = false; + + return ret; + } +diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h +index d307429a5ae0..55c6d9077a8a 100644 +--- a/drivers/gpu/drm/i915/i915_drv.h ++++ b/drivers/gpu/drm/i915/i915_drv.h +@@ -2099,7 +2099,7 @@ struct drm_i915_private { + u32 bxt_phy_grc; + + u32 suspend_count; +- bool suspended_to_idle; ++ bool power_domains_suspended; + struct i915_suspend_saved_registers regfile; + struct vlv_s0ix_state vlv_s0ix_state; + +diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h +index 33eb0c5b1d32..175d552c8bae 100644 +--- a/drivers/gpu/drm/i915/i915_reg.h ++++ b/drivers/gpu/drm/i915/i915_reg.h +@@ -6236,6 +6236,12 @@ enum { + #define _SPATILEOFF (VLV_DISPLAY_BASE + 0x721a4) + #define _SPACONSTALPHA (VLV_DISPLAY_BASE + 0x721a8) + #define SP_CONST_ALPHA_ENABLE (1<<31) ++#define _SPACLRC0 (VLV_DISPLAY_BASE + 0x721d0) ++#define SP_CONTRAST(x) ((x) << 18) /* u3.6 */ ++#define SP_BRIGHTNESS(x) ((x) & 0xff) /* s8 */ ++#define _SPACLRC1 (VLV_DISPLAY_BASE + 0x721d4) ++#define SP_SH_SIN(x) (((x) & 0x7ff) << 16) /* s4.7 */ ++#define SP_SH_COS(x) (x) /* u3.7 */ + #define _SPAGAMC (VLV_DISPLAY_BASE + 0x721f4) + + #define _SPBCNTR (VLV_DISPLAY_BASE + 0x72280) +@@ -6249,6 +6255,8 @@ enum { + #define _SPBKEYMAXVAL (VLV_DISPLAY_BASE + 0x722a0) + #define _SPBTILEOFF (VLV_DISPLAY_BASE + 0x722a4) + #define _SPBCONSTALPHA (VLV_DISPLAY_BASE + 0x722a8) ++#define _SPBCLRC0 (VLV_DISPLAY_BASE + 0x722d0) ++#define _SPBCLRC1 (VLV_DISPLAY_BASE + 0x722d4) + #define _SPBGAMC (VLV_DISPLAY_BASE + 0x722f4) + + #define _MMIO_VLV_SPR(pipe, plane_id, reg_a, reg_b) \ +@@ -6265,6 +6273,8 @@ enum { + #define SPKEYMAXVAL(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMAXVAL, _SPBKEYMAXVAL) + #define SPTILEOFF(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPATILEOFF, _SPBTILEOFF) + #define SPCONSTALPHA(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACONSTALPHA, _SPBCONSTALPHA) ++#define SPCLRC0(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACLRC0, _SPBCLRC0) ++#define SPCLRC1(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACLRC1, _SPBCLRC1) + #define SPGAMC(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAGAMC, _SPBGAMC) + + /* +diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c +index dd485f59eb1d..fb95074a67ff 100644 +--- a/drivers/gpu/drm/i915/intel_sprite.c ++++ b/drivers/gpu/drm/i915/intel_sprite.c +@@ -346,44 +346,87 @@ skl_plane_get_hw_state(struct intel_plane *plane) + } + + static void +-chv_update_csc(struct intel_plane *plane, uint32_t format) ++chv_update_csc(const struct intel_plane_state *plane_state) + { ++ struct intel_plane *plane = to_intel_plane(plane_state->base.plane); + struct drm_i915_private *dev_priv = to_i915(plane->base.dev); ++ const struct drm_framebuffer *fb = plane_state->base.fb; + enum plane_id plane_id = plane->id; + + /* Seems RGB data bypasses the CSC always */ +- if (!format_is_yuv(format)) ++ if (!format_is_yuv(fb->format->format)) + return; + + /* +- * BT.601 limited range YCbCr -> full range RGB ++ * BT.601 full range YCbCr -> full range RGB + * +- * |r| | 6537 4769 0| |cr | +- * |g| = |-3330 4769 -1605| x |y-64| +- * |b| | 0 4769 8263| |cb | ++ * |r| | 5743 4096 0| |cr| ++ * |g| = |-2925 4096 -1410| x |y | ++ * |b| | 0 4096 7258| |cb| + * +- * Cb and Cr apparently come in as signed already, so no +- * need for any offset. For Y we need to remove the offset. ++ * Cb and Cr apparently come in as signed already, ++ * and we get full range data in on account of CLRC0/1 + */ +- I915_WRITE_FW(SPCSCYGOFF(plane_id), SPCSC_OOFF(0) | SPCSC_IOFF(-64)); ++ I915_WRITE_FW(SPCSCYGOFF(plane_id), SPCSC_OOFF(0) | SPCSC_IOFF(0)); + I915_WRITE_FW(SPCSCCBOFF(plane_id), SPCSC_OOFF(0) | SPCSC_IOFF(0)); + I915_WRITE_FW(SPCSCCROFF(plane_id), SPCSC_OOFF(0) | SPCSC_IOFF(0)); + +- I915_WRITE_FW(SPCSCC01(plane_id), SPCSC_C1(4769) | SPCSC_C0(6537)); +- I915_WRITE_FW(SPCSCC23(plane_id), SPCSC_C1(-3330) | SPCSC_C0(0)); +- I915_WRITE_FW(SPCSCC45(plane_id), SPCSC_C1(-1605) | SPCSC_C0(4769)); +- I915_WRITE_FW(SPCSCC67(plane_id), SPCSC_C1(4769) | SPCSC_C0(0)); +- I915_WRITE_FW(SPCSCC8(plane_id), SPCSC_C0(8263)); ++ I915_WRITE_FW(SPCSCC01(plane_id), SPCSC_C1(4096) | SPCSC_C0(5743)); ++ I915_WRITE_FW(SPCSCC23(plane_id), SPCSC_C1(-2925) | SPCSC_C0(0)); ++ I915_WRITE_FW(SPCSCC45(plane_id), SPCSC_C1(-1410) | SPCSC_C0(4096)); ++ I915_WRITE_FW(SPCSCC67(plane_id), SPCSC_C1(4096) | SPCSC_C0(0)); ++ I915_WRITE_FW(SPCSCC8(plane_id), SPCSC_C0(7258)); + +- I915_WRITE_FW(SPCSCYGICLAMP(plane_id), SPCSC_IMAX(940) | SPCSC_IMIN(64)); +- I915_WRITE_FW(SPCSCCBICLAMP(plane_id), SPCSC_IMAX(448) | SPCSC_IMIN(-448)); +- I915_WRITE_FW(SPCSCCRICLAMP(plane_id), SPCSC_IMAX(448) | SPCSC_IMIN(-448)); ++ I915_WRITE_FW(SPCSCYGICLAMP(plane_id), SPCSC_IMAX(1023) | SPCSC_IMIN(0)); ++ I915_WRITE_FW(SPCSCCBICLAMP(plane_id), SPCSC_IMAX(512) | SPCSC_IMIN(-512)); ++ I915_WRITE_FW(SPCSCCRICLAMP(plane_id), SPCSC_IMAX(512) | SPCSC_IMIN(-512)); + + I915_WRITE_FW(SPCSCYGOCLAMP(plane_id), SPCSC_OMAX(1023) | SPCSC_OMIN(0)); + I915_WRITE_FW(SPCSCCBOCLAMP(plane_id), SPCSC_OMAX(1023) | SPCSC_OMIN(0)); + I915_WRITE_FW(SPCSCCROCLAMP(plane_id), SPCSC_OMAX(1023) | SPCSC_OMIN(0)); + } + ++#define SIN_0 0 ++#define COS_0 1 ++ ++static void ++vlv_update_clrc(const struct intel_plane_state *plane_state) ++{ ++ struct intel_plane *plane = to_intel_plane(plane_state->base.plane); ++ struct drm_i915_private *dev_priv = to_i915(plane->base.dev); ++ const struct drm_framebuffer *fb = plane_state->base.fb; ++ enum pipe pipe = plane->pipe; ++ enum plane_id plane_id = plane->id; ++ int contrast, brightness, sh_scale, sh_sin, sh_cos; ++ ++ if (format_is_yuv(fb->format->format)) { ++ /* ++ * Expand limited range to full range: ++ * Contrast is applied first and is used to expand Y range. ++ * Brightness is applied second and is used to remove the ++ * offset from Y. Saturation/hue is used to expand CbCr range. ++ */ ++ contrast = DIV_ROUND_CLOSEST(255 << 6, 235 - 16); ++ brightness = -DIV_ROUND_CLOSEST(16 * 255, 235 - 16); ++ sh_scale = DIV_ROUND_CLOSEST(128 << 7, 240 - 128); ++ sh_sin = SIN_0 * sh_scale; ++ sh_cos = COS_0 * sh_scale; ++ } else { ++ /* Pass-through everything. */ ++ contrast = 1 << 6; ++ brightness = 0; ++ sh_scale = 1 << 7; ++ sh_sin = SIN_0 * sh_scale; ++ sh_cos = COS_0 * sh_scale; ++ } ++ ++ /* FIXME these register are single buffered :( */ ++ I915_WRITE_FW(SPCLRC0(pipe, plane_id), ++ SP_CONTRAST(contrast) | SP_BRIGHTNESS(brightness)); ++ I915_WRITE_FW(SPCLRC1(pipe, plane_id), ++ SP_SH_SIN(sh_sin) | SP_SH_COS(sh_cos)); ++} ++ + static u32 vlv_sprite_ctl(const struct intel_crtc_state *crtc_state, + const struct intel_plane_state *plane_state) + { +@@ -477,8 +520,10 @@ vlv_update_plane(struct intel_plane *plane, + + spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); + ++ vlv_update_clrc(plane_state); ++ + if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) +- chv_update_csc(plane, fb->format->format); ++ chv_update_csc(plane_state); + + if (key->flags) { + I915_WRITE_FW(SPKEYMINVAL(pipe, plane_id), key->min_value); +diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c +index 7828a5e10629..0bbc23175d49 100644 +--- a/drivers/gpu/drm/radeon/radeon_device.c ++++ b/drivers/gpu/drm/radeon/radeon_device.c +@@ -139,6 +139,10 @@ static struct radeon_px_quirk radeon_px_quirk_list[] = { + * https://bugs.freedesktop.org/show_bug.cgi?id=101491 + */ + { PCI_VENDOR_ID_ATI, 0x6741, 0x1043, 0x2122, RADEON_PX_QUIRK_DISABLE_PX }, ++ /* Asus K73TK laptop with AMD A6-3420M APU and Radeon 7670m GPU ++ * https://bugzilla.kernel.org/show_bug.cgi?id=51381#c52 ++ */ ++ { PCI_VENDOR_ID_ATI, 0x6840, 0x1043, 0x2123, RADEON_PX_QUIRK_DISABLE_PX }, + { 0, 0, 0, 0, 0 }, + }; + +diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c +index 97a0a639dad9..90d5b41007bf 100644 +--- a/drivers/gpu/drm/radeon/si_dpm.c ++++ b/drivers/gpu/drm/radeon/si_dpm.c +@@ -5912,9 +5912,9 @@ static void si_set_pcie_lane_width_in_smc(struct radeon_device *rdev, + { + u32 lane_width; + u32 new_lane_width = +- (radeon_new_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT; ++ ((radeon_new_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT) + 1; + u32 current_lane_width = +- (radeon_current_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT; ++ ((radeon_current_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT) + 1; + + if (new_lane_width != current_lane_width) { + radeon_set_pcie_lanes(rdev, new_lane_width); +diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +index ba7505292b78..7b224e08cbf1 100644 +--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c ++++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +@@ -1414,6 +1414,9 @@ static int vop_initial(struct vop *vop) + usleep_range(10, 20); + reset_control_deassert(ahb_rst); + ++ VOP_INTR_SET_TYPE(vop, clear, INTR_MASK, 1); ++ VOP_INTR_SET_TYPE(vop, enable, INTR_MASK, 0); ++ + memcpy(vop->regsbak, vop->regs, vop->len); + + VOP_REG_SET(vop, misc, global_regdone_en, 1); +@@ -1569,17 +1572,9 @@ static int vop_bind(struct device *dev, struct device *master, void *data) + + mutex_init(&vop->vsync_mutex); + +- ret = devm_request_irq(dev, vop->irq, vop_isr, +- IRQF_SHARED, dev_name(dev), vop); +- if (ret) +- return ret; +- +- /* IRQ is initially disabled; it gets enabled in power_on */ +- disable_irq(vop->irq); +- + ret = vop_create_crtc(vop); + if (ret) +- goto err_enable_irq; ++ return ret; + + pm_runtime_enable(&pdev->dev); + +@@ -1590,13 +1585,19 @@ static int vop_bind(struct device *dev, struct device *master, void *data) + goto err_disable_pm_runtime; + } + ++ ret = devm_request_irq(dev, vop->irq, vop_isr, ++ IRQF_SHARED, dev_name(dev), vop); ++ if (ret) ++ goto err_disable_pm_runtime; ++ ++ /* IRQ is initially disabled; it gets enabled in power_on */ ++ disable_irq(vop->irq); ++ + return 0; + + err_disable_pm_runtime: + pm_runtime_disable(&pdev->dev); + vop_destroy_crtc(vop); +-err_enable_irq: +- enable_irq(vop->irq); /* To balance out the disable_irq above */ + return ret; + } + +diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c +index c2560aae5542..4fc08c38bc0e 100644 +--- a/drivers/hid/hid-core.c ++++ b/drivers/hid/hid-core.c +@@ -1365,7 +1365,7 @@ u8 *hid_alloc_report_buf(struct hid_report *report, gfp_t flags) + * of implement() working on 8 byte chunks + */ + +- int len = hid_report_len(report) + 7; ++ u32 len = hid_report_len(report) + 7; + + return kmalloc(len, flags); + } +@@ -1430,7 +1430,7 @@ void __hid_request(struct hid_device *hid, struct hid_report *report, + { + char *buf; + int ret; +- int len; ++ u32 len; + + buf = hid_alloc_report_buf(report, GFP_KERNEL); + if (!buf) +@@ -1456,14 +1456,14 @@ void __hid_request(struct hid_device *hid, struct hid_report *report, + } + EXPORT_SYMBOL_GPL(__hid_request); + +-int hid_report_raw_event(struct hid_device *hid, int type, u8 *data, int size, ++int hid_report_raw_event(struct hid_device *hid, int type, u8 *data, u32 size, + int interrupt) + { + struct hid_report_enum *report_enum = hid->report_enum + type; + struct hid_report *report; + struct hid_driver *hdrv; + unsigned int a; +- int rsize, csize = size; ++ u32 rsize, csize = size; + u8 *cdata = data; + int ret = 0; + +@@ -1521,7 +1521,7 @@ EXPORT_SYMBOL_GPL(hid_report_raw_event); + * + * This is data entry for lower layers. + */ +-int hid_input_report(struct hid_device *hid, int type, u8 *data, int size, int interrupt) ++int hid_input_report(struct hid_device *hid, int type, u8 *data, u32 size, int interrupt) + { + struct hid_report_enum *report_enum; + struct hid_driver *hdrv; +diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h +index 9454ac134ce2..c631d2c8988d 100644 +--- a/drivers/hid/hid-ids.h ++++ b/drivers/hid/hid-ids.h +@@ -519,6 +519,9 @@ + #define I2C_VENDOR_ID_HANTICK 0x0911 + #define I2C_PRODUCT_ID_HANTICK_5288 0x5288 + ++#define I2C_VENDOR_ID_RAYD 0x2386 ++#define I2C_PRODUCT_ID_RAYD_3118 0x3118 ++ + #define USB_VENDOR_ID_HANWANG 0x0b57 + #define USB_DEVICE_ID_HANWANG_TABLET_FIRST 0x5000 + #define USB_DEVICE_ID_HANWANG_TABLET_LAST 0x8fff +diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c +index 04d01b57d94c..0b9e06569bf5 100644 +--- a/drivers/hid/hid-input.c ++++ b/drivers/hid/hid-input.c +@@ -387,7 +387,8 @@ static int hidinput_get_battery_property(struct power_supply *psy, + break; + + case POWER_SUPPLY_PROP_CAPACITY: +- if (dev->battery_report_type == HID_FEATURE_REPORT) { ++ if (dev->battery_status != HID_BATTERY_REPORTED && ++ !dev->battery_avoid_query) { + value = hidinput_query_battery_capacity(dev); + if (value < 0) + return value; +@@ -403,17 +404,17 @@ static int hidinput_get_battery_property(struct power_supply *psy, + break; + + case POWER_SUPPLY_PROP_STATUS: +- if (!dev->battery_reported && +- dev->battery_report_type == HID_FEATURE_REPORT) { ++ if (dev->battery_status != HID_BATTERY_REPORTED && ++ !dev->battery_avoid_query) { + value = hidinput_query_battery_capacity(dev); + if (value < 0) + return value; + + dev->battery_capacity = value; +- dev->battery_reported = true; ++ dev->battery_status = HID_BATTERY_QUERIED; + } + +- if (!dev->battery_reported) ++ if (dev->battery_status == HID_BATTERY_UNKNOWN) + val->intval = POWER_SUPPLY_STATUS_UNKNOWN; + else if (dev->battery_capacity == 100) + val->intval = POWER_SUPPLY_STATUS_FULL; +@@ -486,6 +487,14 @@ static int hidinput_setup_battery(struct hid_device *dev, unsigned report_type, + dev->battery_report_type = report_type; + dev->battery_report_id = field->report->id; + ++ /* ++ * Stylus is normally not connected to the device and thus we ++ * can't query the device and get meaningful battery strength. ++ * We have to wait for the device to report it on its own. ++ */ ++ dev->battery_avoid_query = report_type == HID_INPUT_REPORT && ++ field->physical == HID_DG_STYLUS; ++ + dev->battery = power_supply_register(&dev->dev, psy_desc, &psy_cfg); + if (IS_ERR(dev->battery)) { + error = PTR_ERR(dev->battery); +@@ -530,9 +539,10 @@ static void hidinput_update_battery(struct hid_device *dev, int value) + + capacity = hidinput_scale_battery_capacity(dev, value); + +- if (!dev->battery_reported || capacity != dev->battery_capacity) { ++ if (dev->battery_status != HID_BATTERY_REPORTED || ++ capacity != dev->battery_capacity) { + dev->battery_capacity = capacity; +- dev->battery_reported = true; ++ dev->battery_status = HID_BATTERY_REPORTED; + power_supply_changed(dev->battery); + } + } +@@ -1368,7 +1378,8 @@ static void hidinput_led_worker(struct work_struct *work) + led_work); + struct hid_field *field; + struct hid_report *report; +- int len, ret; ++ int ret; ++ u32 len; + __u8 *buf; + + field = hidinput_get_led_field(hid); +diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c +index 3b4739bde05d..2e1736ba2444 100644 +--- a/drivers/hid/hid-multitouch.c ++++ b/drivers/hid/hid-multitouch.c +@@ -370,7 +370,8 @@ static const struct attribute_group mt_attribute_group = { + static void mt_get_feature(struct hid_device *hdev, struct hid_report *report) + { + struct mt_device *td = hid_get_drvdata(hdev); +- int ret, size = hid_report_len(report); ++ int ret; ++ u32 size = hid_report_len(report); + u8 *buf; + + /* +@@ -1183,7 +1184,7 @@ static void mt_set_input_mode(struct hid_device *hdev) + struct hid_report_enum *re; + struct mt_class *cls = &td->mtclass; + char *buf; +- int report_len; ++ u32 report_len; + + if (td->inputmode < 0) + return; +diff --git a/drivers/hid/hid-rmi.c b/drivers/hid/hid-rmi.c +index c6c05df3e8d2..9c9362149641 100644 +--- a/drivers/hid/hid-rmi.c ++++ b/drivers/hid/hid-rmi.c +@@ -89,8 +89,8 @@ struct rmi_data { + u8 *writeReport; + u8 *readReport; + +- int input_report_size; +- int output_report_size; ++ u32 input_report_size; ++ u32 output_report_size; + + unsigned long flags; + +diff --git a/drivers/hid/hidraw.c b/drivers/hid/hidraw.c +index fbfcc8009432..b39844adea47 100644 +--- a/drivers/hid/hidraw.c ++++ b/drivers/hid/hidraw.c +@@ -192,6 +192,11 @@ static ssize_t hidraw_get_report(struct file *file, char __user *buffer, size_t + int ret = 0, len; + unsigned char report_number; + ++ if (!hidraw_table[minor] || !hidraw_table[minor]->exist) { ++ ret = -ENODEV; ++ goto out; ++ } ++ + dev = hidraw_table[minor]->hid; + + if (!dev->ll_driver->raw_request) { +diff --git a/drivers/hid/i2c-hid/i2c-hid.c b/drivers/hid/i2c-hid/i2c-hid.c +index 7230243b94d3..fd9f70a8b813 100644 +--- a/drivers/hid/i2c-hid/i2c-hid.c ++++ b/drivers/hid/i2c-hid/i2c-hid.c +@@ -47,6 +47,7 @@ + /* quirks to control the device */ + #define I2C_HID_QUIRK_SET_PWR_WAKEUP_DEV BIT(0) + #define I2C_HID_QUIRK_NO_IRQ_AFTER_RESET BIT(1) ++#define I2C_HID_QUIRK_RESEND_REPORT_DESCR BIT(2) + + /* flags */ + #define I2C_HID_STARTED 0 +@@ -144,10 +145,10 @@ struct i2c_hid { + * register of the HID + * descriptor. */ + unsigned int bufsize; /* i2c buffer size */ +- char *inbuf; /* Input buffer */ +- char *rawbuf; /* Raw Input buffer */ +- char *cmdbuf; /* Command buffer */ +- char *argsbuf; /* Command arguments buffer */ ++ u8 *inbuf; /* Input buffer */ ++ u8 *rawbuf; /* Raw Input buffer */ ++ u8 *cmdbuf; /* Command buffer */ ++ u8 *argsbuf; /* Command arguments buffer */ + + unsigned long flags; /* device flags */ + unsigned long quirks; /* Various quirks */ +@@ -171,6 +172,8 @@ static const struct i2c_hid_quirks { + I2C_HID_QUIRK_SET_PWR_WAKEUP_DEV }, + { I2C_VENDOR_ID_HANTICK, I2C_PRODUCT_ID_HANTICK_5288, + I2C_HID_QUIRK_NO_IRQ_AFTER_RESET }, ++ { I2C_VENDOR_ID_RAYD, I2C_PRODUCT_ID_RAYD_3118, ++ I2C_HID_QUIRK_RESEND_REPORT_DESCR }, + { 0, 0 } + }; + +@@ -455,7 +458,8 @@ static int i2c_hid_hwreset(struct i2c_client *client) + + static void i2c_hid_get_input(struct i2c_hid *ihid) + { +- int ret, ret_size; ++ int ret; ++ u32 ret_size; + int size = le16_to_cpu(ihid->hdesc.wMaxInputLength); + + if (size > ihid->bufsize) +@@ -480,7 +484,7 @@ static void i2c_hid_get_input(struct i2c_hid *ihid) + return; + } + +- if (ret_size > size) { ++ if ((ret_size > size) || (ret_size <= 2)) { + dev_err(&ihid->client->dev, "%s: incomplete report (%d/%d)\n", + __func__, size, ret_size); + return; +@@ -1219,6 +1223,16 @@ static int i2c_hid_resume(struct device *dev) + if (ret) + return ret; + ++ /* RAYDIUM device (2386:3118) need to re-send report descr cmd ++ * after resume, after this it will be back normal. ++ * otherwise it issues too many incomplete reports. ++ */ ++ if (ihid->quirks & I2C_HID_QUIRK_RESEND_REPORT_DESCR) { ++ ret = i2c_hid_command(client, &hid_report_descr_cmd, NULL, 0); ++ if (ret) ++ return ret; ++ } ++ + if (hid->driver && hid->driver->reset_resume) { + ret = hid->driver->reset_resume(hid); + return ret; +diff --git a/drivers/hid/wacom_sys.c b/drivers/hid/wacom_sys.c +index 409543160af7..b54ef1ffcbec 100644 +--- a/drivers/hid/wacom_sys.c ++++ b/drivers/hid/wacom_sys.c +@@ -219,7 +219,7 @@ static void wacom_feature_mapping(struct hid_device *hdev, + unsigned int equivalent_usage = wacom_equivalent_usage(usage->hid); + u8 *data; + int ret; +- int n; ++ u32 n; + + switch (equivalent_usage) { + case HID_DG_CONTACTMAX: +@@ -519,7 +519,7 @@ static int wacom_set_device_mode(struct hid_device *hdev, + u8 *rep_data; + struct hid_report *r; + struct hid_report_enum *re; +- int length; ++ u32 length; + int error = -ENOMEM, limit = 0; + + if (wacom_wac->mode_report < 0) +diff --git a/drivers/hid/wacom_wac.c b/drivers/hid/wacom_wac.c +index 90c38a0523e9..44b2c7b0838c 100644 +--- a/drivers/hid/wacom_wac.c ++++ b/drivers/hid/wacom_wac.c +@@ -689,6 +689,45 @@ static int wacom_intuos_get_tool_type(int tool_id) + return tool_type; + } + ++static void wacom_exit_report(struct wacom_wac *wacom) ++{ ++ struct input_dev *input = wacom->pen_input; ++ struct wacom_features *features = &wacom->features; ++ unsigned char *data = wacom->data; ++ int idx = (features->type == INTUOS) ? (data[1] & 0x01) : 0; ++ ++ /* ++ * Reset all states otherwise we lose the initial states ++ * when in-prox next time ++ */ ++ input_report_abs(input, ABS_X, 0); ++ input_report_abs(input, ABS_Y, 0); ++ input_report_abs(input, ABS_DISTANCE, 0); ++ input_report_abs(input, ABS_TILT_X, 0); ++ input_report_abs(input, ABS_TILT_Y, 0); ++ if (wacom->tool[idx] >= BTN_TOOL_MOUSE) { ++ input_report_key(input, BTN_LEFT, 0); ++ input_report_key(input, BTN_MIDDLE, 0); ++ input_report_key(input, BTN_RIGHT, 0); ++ input_report_key(input, BTN_SIDE, 0); ++ input_report_key(input, BTN_EXTRA, 0); ++ input_report_abs(input, ABS_THROTTLE, 0); ++ input_report_abs(input, ABS_RZ, 0); ++ } else { ++ input_report_abs(input, ABS_PRESSURE, 0); ++ input_report_key(input, BTN_STYLUS, 0); ++ input_report_key(input, BTN_STYLUS2, 0); ++ input_report_key(input, BTN_TOUCH, 0); ++ input_report_abs(input, ABS_WHEEL, 0); ++ if (features->type >= INTUOS3S) ++ input_report_abs(input, ABS_Z, 0); ++ } ++ input_report_key(input, wacom->tool[idx], 0); ++ input_report_abs(input, ABS_MISC, 0); /* reset tool id */ ++ input_event(input, EV_MSC, MSC_SERIAL, wacom->serial[idx]); ++ wacom->id[idx] = 0; ++} ++ + static int wacom_intuos_inout(struct wacom_wac *wacom) + { + struct wacom_features *features = &wacom->features; +@@ -741,36 +780,7 @@ static int wacom_intuos_inout(struct wacom_wac *wacom) + if (!wacom->id[idx]) + return 1; + +- /* +- * Reset all states otherwise we lose the initial states +- * when in-prox next time +- */ +- input_report_abs(input, ABS_X, 0); +- input_report_abs(input, ABS_Y, 0); +- input_report_abs(input, ABS_DISTANCE, 0); +- input_report_abs(input, ABS_TILT_X, 0); +- input_report_abs(input, ABS_TILT_Y, 0); +- if (wacom->tool[idx] >= BTN_TOOL_MOUSE) { +- input_report_key(input, BTN_LEFT, 0); +- input_report_key(input, BTN_MIDDLE, 0); +- input_report_key(input, BTN_RIGHT, 0); +- input_report_key(input, BTN_SIDE, 0); +- input_report_key(input, BTN_EXTRA, 0); +- input_report_abs(input, ABS_THROTTLE, 0); +- input_report_abs(input, ABS_RZ, 0); +- } else { +- input_report_abs(input, ABS_PRESSURE, 0); +- input_report_key(input, BTN_STYLUS, 0); +- input_report_key(input, BTN_STYLUS2, 0); +- input_report_key(input, BTN_TOUCH, 0); +- input_report_abs(input, ABS_WHEEL, 0); +- if (features->type >= INTUOS3S) +- input_report_abs(input, ABS_Z, 0); +- } +- input_report_key(input, wacom->tool[idx], 0); +- input_report_abs(input, ABS_MISC, 0); /* reset tool id */ +- input_event(input, EV_MSC, MSC_SERIAL, wacom->serial[idx]); +- wacom->id[idx] = 0; ++ wacom_exit_report(wacom); + return 2; + } + +@@ -1226,6 +1236,12 @@ static void wacom_intuos_pro2_bt_pen(struct wacom_wac *wacom) + if (!valid) + continue; + ++ if (!prox) { ++ wacom->shared->stylus_in_proximity = false; ++ wacom_exit_report(wacom); ++ input_sync(pen_input); ++ return; ++ } + if (range) { + /* Fix rotation alignment: userspace expects zero at left */ + int16_t rotation = (int16_t)get_unaligned_le16(&frame[9]); +diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c +index 692b34125866..e0d59e9ff3c6 100644 +--- a/drivers/i2c/busses/i2c-i801.c ++++ b/drivers/i2c/busses/i2c-i801.c +@@ -966,8 +966,6 @@ static void i801_enable_host_notify(struct i2c_adapter *adapter) + if (!(priv->features & FEATURE_HOST_NOTIFY)) + return; + +- priv->original_slvcmd = inb_p(SMBSLVCMD(priv)); +- + if (!(SMBSLVCMD_HST_NTFY_INTREN & priv->original_slvcmd)) + outb_p(SMBSLVCMD_HST_NTFY_INTREN | priv->original_slvcmd, + SMBSLVCMD(priv)); +@@ -1615,6 +1613,10 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id) + outb_p(inb_p(SMBAUXCTL(priv)) & + ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv)); + ++ /* Remember original Host Notify setting */ ++ if (priv->features & FEATURE_HOST_NOTIFY) ++ priv->original_slvcmd = inb_p(SMBSLVCMD(priv)); ++ + /* Default timeout in interrupt mode: 200 ms */ + priv->adapter.timeout = HZ / 5; + +@@ -1699,6 +1701,15 @@ static void i801_remove(struct pci_dev *dev) + */ + } + ++static void i801_shutdown(struct pci_dev *dev) ++{ ++ struct i801_priv *priv = pci_get_drvdata(dev); ++ ++ /* Restore config registers to avoid hard hang on some systems */ ++ i801_disable_host_notify(priv); ++ pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg); ++} ++ + #ifdef CONFIG_PM + static int i801_suspend(struct device *dev) + { +@@ -1728,6 +1739,7 @@ static struct pci_driver i801_driver = { + .id_table = i801_ids, + .probe = i801_probe, + .remove = i801_remove, ++ .shutdown = i801_shutdown, + .driver = { + .pm = &i801_pm_ops, + }, +diff --git a/drivers/infiniband/core/ucma.c b/drivers/infiniband/core/ucma.c +index d933336d7e01..5c21ae237f82 100644 +--- a/drivers/infiniband/core/ucma.c ++++ b/drivers/infiniband/core/ucma.c +@@ -1241,6 +1241,9 @@ static int ucma_set_ib_path(struct ucma_context *ctx, + if (!optlen) + return -EINVAL; + ++ if (!ctx->cm_id->device) ++ return -EINVAL; ++ + memset(&sa_path, 0, sizeof(sa_path)); + + sa_path.rec_type = SA_PATH_REC_TYPE_IB; +diff --git a/drivers/infiniband/core/verbs.c b/drivers/infiniband/core/verbs.c +index 93025d2009b8..c715123742a4 100644 +--- a/drivers/infiniband/core/verbs.c ++++ b/drivers/infiniband/core/verbs.c +@@ -2194,7 +2194,14 @@ static void __ib_drain_sq(struct ib_qp *qp) + struct ib_cq *cq = qp->send_cq; + struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; + struct ib_drain_cqe sdrain; +- struct ib_send_wr swr = {}, *bad_swr; ++ struct ib_send_wr *bad_swr; ++ struct ib_rdma_wr swr = { ++ .wr = { ++ .next = NULL, ++ { .wr_cqe = &sdrain.cqe, }, ++ .opcode = IB_WR_RDMA_WRITE, ++ }, ++ }; + int ret; + + ret = ib_modify_qp(qp, &attr, IB_QP_STATE); +@@ -2203,11 +2210,10 @@ static void __ib_drain_sq(struct ib_qp *qp) + return; + } + +- swr.wr_cqe = &sdrain.cqe; + sdrain.cqe.done = ib_drain_qp_done; + init_completion(&sdrain.done); + +- ret = ib_post_send(qp, &swr, &bad_swr); ++ ret = ib_post_send(qp, &swr.wr, &bad_swr); + if (ret) { + WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); + return; +diff --git a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/mr.c +index 3e0b3f0238d6..6857c61bdee1 100644 +--- a/drivers/infiniband/hw/mlx5/mr.c ++++ b/drivers/infiniband/hw/mlx5/mr.c +@@ -1223,6 +1223,8 @@ struct ib_mr *mlx5_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, + return ERR_PTR(-EINVAL); + + mr = mlx5_ib_alloc_implicit_mr(to_mpd(pd), access_flags); ++ if (IS_ERR(mr)) ++ return ERR_CAST(mr); + return &mr->ibmr; + } + #endif +diff --git a/drivers/infiniband/sw/rxe/rxe_verbs.c b/drivers/infiniband/sw/rxe/rxe_verbs.c +index f4bab2cd0ec2..45594091353c 100644 +--- a/drivers/infiniband/sw/rxe/rxe_verbs.c ++++ b/drivers/infiniband/sw/rxe/rxe_verbs.c +@@ -711,9 +711,8 @@ static int init_send_wqe(struct rxe_qp *qp, struct ib_send_wr *ibwr, + memcpy(wqe->dma.sge, ibwr->sg_list, + num_sge * sizeof(struct ib_sge)); + +- wqe->iova = (mask & WR_ATOMIC_MASK) ? +- atomic_wr(ibwr)->remote_addr : +- rdma_wr(ibwr)->remote_addr; ++ wqe->iova = mask & WR_ATOMIC_MASK ? atomic_wr(ibwr)->remote_addr : ++ mask & WR_READ_OR_WRITE_MASK ? rdma_wr(ibwr)->remote_addr : 0; + wqe->mask = mask; + wqe->dma.length = length; + wqe->dma.resid = length; +diff --git a/drivers/infiniband/ulp/srp/ib_srp.c b/drivers/infiniband/ulp/srp/ib_srp.c +index b48843833d69..4a1a489ce8bb 100644 +--- a/drivers/infiniband/ulp/srp/ib_srp.c ++++ b/drivers/infiniband/ulp/srp/ib_srp.c +@@ -2974,9 +2974,11 @@ static int srp_abort(struct scsi_cmnd *scmnd) + ret = FAST_IO_FAIL; + else + ret = FAILED; +- srp_free_req(ch, req, scmnd, 0); +- scmnd->result = DID_ABORT << 16; +- scmnd->scsi_done(scmnd); ++ if (ret == SUCCESS) { ++ srp_free_req(ch, req, scmnd, 0); ++ scmnd->result = DID_ABORT << 16; ++ scmnd->scsi_done(scmnd); ++ } + + return ret; + } +@@ -3871,12 +3873,10 @@ static ssize_t srp_create_target(struct device *dev, + num_online_nodes()); + const int ch_end = ((node_idx + 1) * target->ch_count / + num_online_nodes()); +- const int cv_start = (node_idx * ibdev->num_comp_vectors / +- num_online_nodes() + target->comp_vector) +- % ibdev->num_comp_vectors; +- const int cv_end = ((node_idx + 1) * ibdev->num_comp_vectors / +- num_online_nodes() + target->comp_vector) +- % ibdev->num_comp_vectors; ++ const int cv_start = node_idx * ibdev->num_comp_vectors / ++ num_online_nodes(); ++ const int cv_end = (node_idx + 1) * ibdev->num_comp_vectors / ++ num_online_nodes(); + int cpu_idx = 0; + + for_each_online_cpu(cpu) { +diff --git a/drivers/infiniband/ulp/srpt/ib_srpt.c b/drivers/infiniband/ulp/srpt/ib_srpt.c +index 0373b7c40902..f1be280e701a 100644 +--- a/drivers/infiniband/ulp/srpt/ib_srpt.c ++++ b/drivers/infiniband/ulp/srpt/ib_srpt.c +@@ -838,16 +838,20 @@ static int srpt_post_recv(struct srpt_device *sdev, struct srpt_rdma_ch *ch, + */ + static int srpt_zerolength_write(struct srpt_rdma_ch *ch) + { +- struct ib_send_wr wr, *bad_wr; ++ struct ib_send_wr *bad_wr; ++ struct ib_rdma_wr wr = { ++ .wr = { ++ .next = NULL, ++ { .wr_cqe = &ch->zw_cqe, }, ++ .opcode = IB_WR_RDMA_WRITE, ++ .send_flags = IB_SEND_SIGNALED, ++ } ++ }; + + pr_debug("%s-%d: queued zerolength write\n", ch->sess_name, + ch->qp->qp_num); + +- memset(&wr, 0, sizeof(wr)); +- wr.opcode = IB_WR_RDMA_WRITE; +- wr.wr_cqe = &ch->zw_cqe; +- wr.send_flags = IB_SEND_SIGNALED; +- return ib_post_send(ch->qp, &wr, &bad_wr); ++ return ib_post_send(ch->qp, &wr.wr, &bad_wr); + } + + static void srpt_zerolength_write_done(struct ib_cq *cq, struct ib_wc *wc) +diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c +index 99bc9bd64b9e..9124a625fe83 100644 +--- a/drivers/iommu/intel-svm.c ++++ b/drivers/iommu/intel-svm.c +@@ -396,6 +396,7 @@ int intel_svm_bind_mm(struct device *dev, int *pasid, int flags, struct svm_dev_ + pasid_max - 1, GFP_KERNEL); + if (ret < 0) { + kfree(svm); ++ kfree(sdev); + goto out; + } + svm->pasid = ret; +diff --git a/drivers/irqchip/irq-gic-common.c b/drivers/irqchip/irq-gic-common.c +index 30017df5b54c..01e673c680cd 100644 +--- a/drivers/irqchip/irq-gic-common.c ++++ b/drivers/irqchip/irq-gic-common.c +@@ -21,6 +21,8 @@ + + #include "irq-gic-common.h" + ++static DEFINE_RAW_SPINLOCK(irq_controller_lock); ++ + static const struct gic_kvm_info *gic_kvm_info; + + const struct gic_kvm_info *gic_get_kvm_info(void) +@@ -53,11 +55,13 @@ int gic_configure_irq(unsigned int irq, unsigned int type, + u32 confoff = (irq / 16) * 4; + u32 val, oldval; + int ret = 0; ++ unsigned long flags; + + /* + * Read current configuration register, and insert the config + * for "irq", depending on "type". + */ ++ raw_spin_lock_irqsave(&irq_controller_lock, flags); + val = oldval = readl_relaxed(base + GIC_DIST_CONFIG + confoff); + if (type & IRQ_TYPE_LEVEL_MASK) + val &= ~confmask; +@@ -65,8 +69,10 @@ int gic_configure_irq(unsigned int irq, unsigned int type, + val |= confmask; + + /* If the current configuration is the same, then we are done */ +- if (val == oldval) ++ if (val == oldval) { ++ raw_spin_unlock_irqrestore(&irq_controller_lock, flags); + return 0; ++ } + + /* + * Write back the new configuration, and possibly re-enable +@@ -84,6 +90,7 @@ int gic_configure_irq(unsigned int irq, unsigned int type, + pr_warn("GIC: PPI%d is secure or misconfigured\n", + irq - 16); + } ++ raw_spin_unlock_irqrestore(&irq_controller_lock, flags); + + if (sync_access) + sync_access(); +diff --git a/drivers/md/dm-crypt.c b/drivers/md/dm-crypt.c +index 8168f737590e..e7b4a0256949 100644 +--- a/drivers/md/dm-crypt.c ++++ b/drivers/md/dm-crypt.c +@@ -148,6 +148,8 @@ struct crypt_config { + mempool_t *tag_pool; + unsigned tag_pool_max_sectors; + ++ struct percpu_counter n_allocated_pages; ++ + struct bio_set *bs; + struct mutex bio_alloc_lock; + +@@ -219,6 +221,12 @@ struct crypt_config { + #define MAX_TAG_SIZE 480 + #define POOL_ENTRY_SIZE 512 + ++static DEFINE_SPINLOCK(dm_crypt_clients_lock); ++static unsigned dm_crypt_clients_n = 0; ++static volatile unsigned long dm_crypt_pages_per_client; ++#define DM_CRYPT_MEMORY_PERCENT 2 ++#define DM_CRYPT_MIN_PAGES_PER_CLIENT (BIO_MAX_PAGES * 16) ++ + static void clone_init(struct dm_crypt_io *, struct bio *); + static void kcryptd_queue_crypt(struct dm_crypt_io *io); + static struct scatterlist *crypt_get_sg_data(struct crypt_config *cc, +@@ -2155,6 +2163,43 @@ static int crypt_wipe_key(struct crypt_config *cc) + return r; + } + ++static void crypt_calculate_pages_per_client(void) ++{ ++ unsigned long pages = (totalram_pages - totalhigh_pages) * DM_CRYPT_MEMORY_PERCENT / 100; ++ ++ if (!dm_crypt_clients_n) ++ return; ++ ++ pages /= dm_crypt_clients_n; ++ if (pages < DM_CRYPT_MIN_PAGES_PER_CLIENT) ++ pages = DM_CRYPT_MIN_PAGES_PER_CLIENT; ++ dm_crypt_pages_per_client = pages; ++} ++ ++static void *crypt_page_alloc(gfp_t gfp_mask, void *pool_data) ++{ ++ struct crypt_config *cc = pool_data; ++ struct page *page; ++ ++ if (unlikely(percpu_counter_compare(&cc->n_allocated_pages, dm_crypt_pages_per_client) >= 0) && ++ likely(gfp_mask & __GFP_NORETRY)) ++ return NULL; ++ ++ page = alloc_page(gfp_mask); ++ if (likely(page != NULL)) ++ percpu_counter_add(&cc->n_allocated_pages, 1); ++ ++ return page; ++} ++ ++static void crypt_page_free(void *page, void *pool_data) ++{ ++ struct crypt_config *cc = pool_data; ++ ++ __free_page(page); ++ percpu_counter_sub(&cc->n_allocated_pages, 1); ++} ++ + static void crypt_dtr(struct dm_target *ti) + { + struct crypt_config *cc = ti->private; +@@ -2181,6 +2226,10 @@ static void crypt_dtr(struct dm_target *ti) + mempool_destroy(cc->req_pool); + mempool_destroy(cc->tag_pool); + ++ if (cc->page_pool) ++ WARN_ON(percpu_counter_sum(&cc->n_allocated_pages) != 0); ++ percpu_counter_destroy(&cc->n_allocated_pages); ++ + if (cc->iv_gen_ops && cc->iv_gen_ops->dtr) + cc->iv_gen_ops->dtr(cc); + +@@ -2197,6 +2246,12 @@ static void crypt_dtr(struct dm_target *ti) + + /* Must zero key material before freeing */ + kzfree(cc); ++ ++ spin_lock(&dm_crypt_clients_lock); ++ WARN_ON(!dm_crypt_clients_n); ++ dm_crypt_clients_n--; ++ crypt_calculate_pages_per_client(); ++ spin_unlock(&dm_crypt_clients_lock); + } + + static int crypt_ctr_ivmode(struct dm_target *ti, const char *ivmode) +@@ -2644,6 +2699,15 @@ static int crypt_ctr(struct dm_target *ti, unsigned int argc, char **argv) + + ti->private = cc; + ++ spin_lock(&dm_crypt_clients_lock); ++ dm_crypt_clients_n++; ++ crypt_calculate_pages_per_client(); ++ spin_unlock(&dm_crypt_clients_lock); ++ ++ ret = percpu_counter_init(&cc->n_allocated_pages, 0, GFP_KERNEL); ++ if (ret < 0) ++ goto bad; ++ + /* Optional parameters need to be read before cipher constructor */ + if (argc > 5) { + ret = crypt_ctr_optional(ti, argc - 5, &argv[5]); +@@ -2698,7 +2762,7 @@ static int crypt_ctr(struct dm_target *ti, unsigned int argc, char **argv) + ALIGN(sizeof(struct dm_crypt_io) + cc->dmreq_start + additional_req_size, + ARCH_KMALLOC_MINALIGN); + +- cc->page_pool = mempool_create_page_pool(BIO_MAX_PAGES, 0); ++ cc->page_pool = mempool_create(BIO_MAX_PAGES, crypt_page_alloc, crypt_page_free, cc); + if (!cc->page_pool) { + ti->error = "Cannot allocate page mempool"; + goto bad; +diff --git a/drivers/md/dm-raid.c b/drivers/md/dm-raid.c +index c1d1034ff7b7..335ebd46a986 100644 +--- a/drivers/md/dm-raid.c ++++ b/drivers/md/dm-raid.c +@@ -3408,7 +3408,8 @@ static sector_t rs_get_progress(struct raid_set *rs, unsigned long recovery, + set_bit(RT_FLAG_RS_IN_SYNC, &rs->runtime_flags); + + } else { +- if (!test_bit(MD_RECOVERY_INTR, &recovery) && ++ if (!test_bit(__CTR_FLAG_NOSYNC, &rs->ctr_flags) && ++ !test_bit(MD_RECOVERY_INTR, &recovery) && + (test_bit(MD_RECOVERY_NEEDED, &recovery) || + test_bit(MD_RECOVERY_RESHAPE, &recovery) || + test_bit(MD_RECOVERY_RUNNING, &recovery))) +diff --git a/drivers/md/dm.c b/drivers/md/dm.c +index 353ea0ede091..038c7572fdd4 100644 +--- a/drivers/md/dm.c ++++ b/drivers/md/dm.c +@@ -1477,6 +1477,23 @@ static int __send_write_zeroes(struct clone_info *ci, struct dm_target *ti) + return __send_changing_extent_only(ci, ti, get_num_write_zeroes_bios, NULL); + } + ++static bool __process_abnormal_io(struct clone_info *ci, struct dm_target *ti, ++ int *result) ++{ ++ struct bio *bio = ci->bio; ++ ++ if (bio_op(bio) == REQ_OP_DISCARD) ++ *result = __send_discard(ci, ti); ++ else if (bio_op(bio) == REQ_OP_WRITE_SAME) ++ *result = __send_write_same(ci, ti); ++ else if (bio_op(bio) == REQ_OP_WRITE_ZEROES) ++ *result = __send_write_zeroes(ci, ti); ++ else ++ return false; ++ ++ return true; ++} ++ + /* + * Select the correct strategy for processing a non-flush bio. + */ +@@ -1491,12 +1508,8 @@ static int __split_and_process_non_flush(struct clone_info *ci) + if (!dm_target_is_valid(ti)) + return -EIO; + +- if (unlikely(bio_op(bio) == REQ_OP_DISCARD)) +- return __send_discard(ci, ti); +- else if (unlikely(bio_op(bio) == REQ_OP_WRITE_SAME)) +- return __send_write_same(ci, ti); +- else if (unlikely(bio_op(bio) == REQ_OP_WRITE_ZEROES)) +- return __send_write_zeroes(ci, ti); ++ if (unlikely(__process_abnormal_io(ci, ti, &r))) ++ return r; + + if (bio_op(bio) == REQ_OP_ZONE_REPORT) + len = ci->sector_count; +@@ -1617,9 +1630,12 @@ static blk_qc_t __process_bio(struct mapped_device *md, + goto out; + } + +- tio = alloc_tio(&ci, ti, 0, GFP_NOIO); + ci.bio = bio; + ci.sector_count = bio_sectors(bio); ++ if (unlikely(__process_abnormal_io(&ci, ti, &error))) ++ goto out; ++ ++ tio = alloc_tio(&ci, ti, 0, GFP_NOIO); + ret = __clone_and_map_simple_bio(&ci, tio, NULL); + } + out: +diff --git a/drivers/media/common/videobuf2/videobuf2-core.c b/drivers/media/common/videobuf2/videobuf2-core.c +index debe35fc66b4..d3f7bb33a54d 100644 +--- a/drivers/media/common/videobuf2/videobuf2-core.c ++++ b/drivers/media/common/videobuf2/videobuf2-core.c +@@ -1696,6 +1696,15 @@ static void __vb2_queue_cancel(struct vb2_queue *q) + for (i = 0; i < q->num_buffers; ++i) { + struct vb2_buffer *vb = q->bufs[i]; + ++ if (vb->state == VB2_BUF_STATE_PREPARED || ++ vb->state == VB2_BUF_STATE_QUEUED) { ++ unsigned int plane; ++ ++ for (plane = 0; plane < vb->num_planes; ++plane) ++ call_void_memop(vb, finish, ++ vb->planes[plane].mem_priv); ++ } ++ + if (vb->state != VB2_BUF_STATE_DEQUEUED) { + vb->state = VB2_BUF_STATE_PREPARED; + call_void_vb_qop(vb, buf_finish, vb); +diff --git a/drivers/media/platform/vivid/vivid-vid-common.c b/drivers/media/platform/vivid/vivid-vid-common.c +index a651527d80db..23888fdb94fb 100644 +--- a/drivers/media/platform/vivid/vivid-vid-common.c ++++ b/drivers/media/platform/vivid/vivid-vid-common.c +@@ -874,7 +874,8 @@ int vidioc_g_edid(struct file *file, void *_fh, + return -EINVAL; + if (edid->start_block + edid->blocks > dev->edid_blocks) + edid->blocks = dev->edid_blocks - edid->start_block; +- cec_set_edid_phys_addr(dev->edid, dev->edid_blocks * 128, adap->phys_addr); ++ if (adap) ++ cec_set_edid_phys_addr(dev->edid, dev->edid_blocks * 128, adap->phys_addr); + memcpy(edid->edid, dev->edid + edid->start_block * 128, edid->blocks * 128); + return 0; + } +diff --git a/drivers/media/platform/vsp1/vsp1_wpf.c b/drivers/media/platform/vsp1/vsp1_wpf.c +index f7f3b4b2c2de..8bd6b2f1af15 100644 +--- a/drivers/media/platform/vsp1/vsp1_wpf.c ++++ b/drivers/media/platform/vsp1/vsp1_wpf.c +@@ -452,7 +452,7 @@ static void wpf_configure(struct vsp1_entity *entity, + : VI6_WPF_SRCRPF_RPF_ACT_SUB(input->entity.index); + } + +- if (pipe->bru || pipe->num_inputs > 1) ++ if (pipe->bru) + srcrpf |= pipe->bru->type == VSP1_ENTITY_BRU + ? VI6_WPF_SRCRPF_VIRACT_MST + : VI6_WPF_SRCRPF_VIRACT2_MST; +diff --git a/drivers/media/rc/rc-main.c b/drivers/media/rc/rc-main.c +index 1db8d38fed7c..9b78818c0282 100644 +--- a/drivers/media/rc/rc-main.c ++++ b/drivers/media/rc/rc-main.c +@@ -1929,12 +1929,12 @@ void rc_unregister_device(struct rc_dev *dev) + if (!dev) + return; + +- del_timer_sync(&dev->timer_keyup); +- del_timer_sync(&dev->timer_repeat); +- + if (dev->driver_type == RC_DRIVER_IR_RAW) + ir_raw_event_unregister(dev); + ++ del_timer_sync(&dev->timer_keyup); ++ del_timer_sync(&dev->timer_repeat); ++ + rc_free_rx_device(dev); + + mutex_lock(&dev->lock); +diff --git a/drivers/misc/cxl/cxllib.c b/drivers/misc/cxl/cxllib.c +index 30ccba436b3b..55cd35d1a9cc 100644 +--- a/drivers/misc/cxl/cxllib.c ++++ b/drivers/misc/cxl/cxllib.c +@@ -208,49 +208,74 @@ int cxllib_get_PE_attributes(struct task_struct *task, + } + EXPORT_SYMBOL_GPL(cxllib_get_PE_attributes); + +-int cxllib_handle_fault(struct mm_struct *mm, u64 addr, u64 size, u64 flags) ++static int get_vma_info(struct mm_struct *mm, u64 addr, ++ u64 *vma_start, u64 *vma_end, ++ unsigned long *page_size) + { +- int rc; +- u64 dar; + struct vm_area_struct *vma = NULL; +- unsigned long page_size; +- +- if (mm == NULL) +- return -EFAULT; ++ int rc = 0; + + down_read(&mm->mmap_sem); + + vma = find_vma(mm, addr); + if (!vma) { +- pr_err("Can't find vma for addr %016llx\n", addr); + rc = -EFAULT; + goto out; + } +- /* get the size of the pages allocated */ +- page_size = vma_kernel_pagesize(vma); +- +- for (dar = (addr & ~(page_size - 1)); dar < (addr + size); dar += page_size) { +- if (dar < vma->vm_start || dar >= vma->vm_end) { +- vma = find_vma(mm, addr); +- if (!vma) { +- pr_err("Can't find vma for addr %016llx\n", addr); +- rc = -EFAULT; +- goto out; +- } +- /* get the size of the pages allocated */ +- page_size = vma_kernel_pagesize(vma); ++ *page_size = vma_kernel_pagesize(vma); ++ *vma_start = vma->vm_start; ++ *vma_end = vma->vm_end; ++out: ++ up_read(&mm->mmap_sem); ++ return rc; ++} ++ ++int cxllib_handle_fault(struct mm_struct *mm, u64 addr, u64 size, u64 flags) ++{ ++ int rc; ++ u64 dar, vma_start, vma_end; ++ unsigned long page_size; ++ ++ if (mm == NULL) ++ return -EFAULT; ++ ++ /* ++ * The buffer we have to process can extend over several pages ++ * and may also cover several VMAs. ++ * We iterate over all the pages. The page size could vary ++ * between VMAs. ++ */ ++ rc = get_vma_info(mm, addr, &vma_start, &vma_end, &page_size); ++ if (rc) ++ return rc; ++ ++ for (dar = (addr & ~(page_size - 1)); dar < (addr + size); ++ dar += page_size) { ++ if (dar < vma_start || dar >= vma_end) { ++ /* ++ * We don't hold the mm->mmap_sem semaphore ++ * while iterating, since the semaphore is ++ * required by one of the lower-level page ++ * fault processing functions and it could ++ * create a deadlock. ++ * ++ * It means the VMAs can be altered between 2 ++ * loop iterations and we could theoretically ++ * miss a page (however unlikely). But that's ++ * not really a problem, as the driver will ++ * retry access, get another page fault on the ++ * missing page and call us again. ++ */ ++ rc = get_vma_info(mm, dar, &vma_start, &vma_end, ++ &page_size); ++ if (rc) ++ return rc; + } + + rc = cxl_handle_mm_fault(mm, flags, dar); +- if (rc) { +- pr_err("cxl_handle_mm_fault failed %d", rc); +- rc = -EFAULT; +- goto out; +- } ++ if (rc) ++ return -EFAULT; + } +- rc = 0; +-out: +- up_read(&mm->mmap_sem); +- return rc; ++ return 0; + } + EXPORT_SYMBOL_GPL(cxllib_handle_fault); +diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c +index 2cfb963d9f37..9c6f639d8a57 100644 +--- a/drivers/mmc/core/block.c ++++ b/drivers/mmc/core/block.c +@@ -3087,6 +3087,7 @@ static void __exit mmc_blk_exit(void) + mmc_unregister_driver(&mmc_driver); + unregister_blkdev(MMC_BLOCK_MAJOR, "mmc"); + unregister_chrdev_region(mmc_rpmb_devt, MAX_DEVICES); ++ bus_unregister(&mmc_rpmb_bus_type); + } + + module_init(mmc_blk_init); +diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c +index 712e08d9a45e..a0168e9e4fce 100644 +--- a/drivers/mmc/host/jz4740_mmc.c ++++ b/drivers/mmc/host/jz4740_mmc.c +@@ -362,9 +362,9 @@ static void jz4740_mmc_set_irq_enabled(struct jz4740_mmc_host *host, + host->irq_mask &= ~irq; + else + host->irq_mask |= irq; +- spin_unlock_irqrestore(&host->lock, flags); + + writew(host->irq_mask, host->base + JZ_REG_MMC_IMASK); ++ spin_unlock_irqrestore(&host->lock, flags); + } + + static void jz4740_mmc_clock_enable(struct jz4740_mmc_host *host, +diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci-core.c +index 82c4f05f91d8..0a0852524491 100644 +--- a/drivers/mmc/host/sdhci-pci-core.c ++++ b/drivers/mmc/host/sdhci-pci-core.c +@@ -1318,7 +1318,7 @@ static void amd_enable_manual_tuning(struct pci_dev *pdev) + pci_write_config_dword(pdev, AMD_SD_MISC_CONTROL, val); + } + +-static int amd_execute_tuning(struct sdhci_host *host, u32 opcode) ++static int amd_execute_tuning_hs200(struct sdhci_host *host, u32 opcode) + { + struct sdhci_pci_slot *slot = sdhci_priv(host); + struct pci_dev *pdev = slot->chip->pdev; +@@ -1357,6 +1357,27 @@ static int amd_execute_tuning(struct sdhci_host *host, u32 opcode) + return 0; + } + ++static int amd_execute_tuning(struct mmc_host *mmc, u32 opcode) ++{ ++ struct sdhci_host *host = mmc_priv(mmc); ++ ++ /* AMD requires custom HS200 tuning */ ++ if (host->timing == MMC_TIMING_MMC_HS200) ++ return amd_execute_tuning_hs200(host, opcode); ++ ++ /* Otherwise perform standard SDHCI tuning */ ++ return sdhci_execute_tuning(mmc, opcode); ++} ++ ++static int amd_probe_slot(struct sdhci_pci_slot *slot) ++{ ++ struct mmc_host_ops *ops = &slot->host->mmc_host_ops; ++ ++ ops->execute_tuning = amd_execute_tuning; ++ ++ return 0; ++} ++ + static int amd_probe(struct sdhci_pci_chip *chip) + { + struct pci_dev *smbus_dev; +@@ -1391,12 +1412,12 @@ static const struct sdhci_ops amd_sdhci_pci_ops = { + .set_bus_width = sdhci_set_bus_width, + .reset = sdhci_reset, + .set_uhs_signaling = sdhci_set_uhs_signaling, +- .platform_execute_tuning = amd_execute_tuning, + }; + + static const struct sdhci_pci_fixes sdhci_amd = { + .probe = amd_probe, + .ops = &amd_sdhci_pci_ops, ++ .probe_slot = amd_probe_slot, + }; + + static const struct pci_device_id pci_ids[] = { +diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c +index 33494241245a..8fce18253465 100644 +--- a/drivers/mmc/host/tmio_mmc_core.c ++++ b/drivers/mmc/host/tmio_mmc_core.c +@@ -911,7 +911,7 @@ static void tmio_mmc_finish_request(struct tmio_mmc_host *host) + host->check_scc_error(host); + + /* If SET_BLOCK_COUNT, continue with main command */ +- if (host->mrq) { ++ if (host->mrq && !mrq->cmd->error) { + tmio_process_mrq(host, mrq); + return; + } +diff --git a/drivers/mtd/ubi/block.c b/drivers/mtd/ubi/block.c +index b1fc28f63882..d0b63bbf46a7 100644 +--- a/drivers/mtd/ubi/block.c ++++ b/drivers/mtd/ubi/block.c +@@ -244,7 +244,7 @@ static int ubiblock_open(struct block_device *bdev, fmode_t mode) + * in any case. + */ + if (mode & FMODE_WRITE) { +- ret = -EPERM; ++ ret = -EROFS; + goto out_unlock; + } + +diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c +index e941395de3ae..753494e042d5 100644 +--- a/drivers/mtd/ubi/build.c ++++ b/drivers/mtd/ubi/build.c +@@ -854,6 +854,17 @@ int ubi_attach_mtd_dev(struct mtd_info *mtd, int ubi_num, + return -EINVAL; + } + ++ /* ++ * Both UBI and UBIFS have been designed for SLC NAND and NOR flashes. ++ * MLC NAND is different and needs special care, otherwise UBI or UBIFS ++ * will die soon and you will lose all your data. ++ */ ++ if (mtd->type == MTD_MLCNANDFLASH) { ++ pr_err("ubi: refuse attaching mtd%d - MLC NAND is not supported\n", ++ mtd->index); ++ return -EINVAL; ++ } ++ + if (ubi_num == UBI_DEV_NUM_AUTO) { + /* Search for an empty slot in the @ubi_devices array */ + for (ubi_num = 0; ubi_num < UBI_MAX_DEVICES; ubi_num++) +diff --git a/drivers/mtd/ubi/fastmap-wl.c b/drivers/mtd/ubi/fastmap-wl.c +index 590d967011bb..98f7d6be8d1f 100644 +--- a/drivers/mtd/ubi/fastmap-wl.c ++++ b/drivers/mtd/ubi/fastmap-wl.c +@@ -362,7 +362,6 @@ static void ubi_fastmap_close(struct ubi_device *ubi) + { + int i; + +- flush_work(&ubi->fm_work); + return_unused_pool_pebs(ubi, &ubi->fm_pool); + return_unused_pool_pebs(ubi, &ubi->fm_wl_pool); + +diff --git a/drivers/nvdimm/dimm.c b/drivers/nvdimm/dimm.c +index f8913b8124b6..233907889f96 100644 +--- a/drivers/nvdimm/dimm.c ++++ b/drivers/nvdimm/dimm.c +@@ -67,9 +67,11 @@ static int nvdimm_probe(struct device *dev) + ndd->ns_next = nd_label_next_nsindex(ndd->ns_current); + nd_label_copy(ndd, to_next_namespace_index(ndd), + to_current_namespace_index(ndd)); +- rc = nd_label_reserve_dpa(ndd); +- if (ndd->ns_current >= 0) +- nvdimm_set_aliasing(dev); ++ if (ndd->ns_current >= 0) { ++ rc = nd_label_reserve_dpa(ndd); ++ if (rc == 0) ++ nvdimm_set_aliasing(dev); ++ } + nvdimm_clear_locked(dev); + nvdimm_bus_unlock(dev); + +diff --git a/drivers/nvdimm/dimm_devs.c b/drivers/nvdimm/dimm_devs.c +index 097794d9f786..175e200939b0 100644 +--- a/drivers/nvdimm/dimm_devs.c ++++ b/drivers/nvdimm/dimm_devs.c +@@ -88,9 +88,9 @@ int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd) + int nvdimm_init_config_data(struct nvdimm_drvdata *ndd) + { + struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); ++ int rc = validate_dimm(ndd), cmd_rc = 0; + struct nd_cmd_get_config_data_hdr *cmd; + struct nvdimm_bus_descriptor *nd_desc; +- int rc = validate_dimm(ndd); + u32 max_cmd_size, config_size; + size_t offset; + +@@ -124,9 +124,11 @@ int nvdimm_init_config_data(struct nvdimm_drvdata *ndd) + cmd->in_offset = offset; + rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), + ND_CMD_GET_CONFIG_DATA, cmd, +- cmd->in_length + sizeof(*cmd), NULL); +- if (rc || cmd->status) { +- rc = -ENXIO; ++ cmd->in_length + sizeof(*cmd), &cmd_rc); ++ if (rc < 0) ++ break; ++ if (cmd_rc < 0) { ++ rc = cmd_rc; + break; + } + memcpy(ndd->data + offset, cmd->out_buf, cmd->in_length); +@@ -140,9 +142,9 @@ int nvdimm_init_config_data(struct nvdimm_drvdata *ndd) + int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset, + void *buf, size_t len) + { +- int rc = validate_dimm(ndd); + size_t max_cmd_size, buf_offset; + struct nd_cmd_set_config_hdr *cmd; ++ int rc = validate_dimm(ndd), cmd_rc = 0; + struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); + struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; + +@@ -164,7 +166,6 @@ int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset, + for (buf_offset = 0; len; len -= cmd->in_length, + buf_offset += cmd->in_length) { + size_t cmd_size; +- u32 *status; + + cmd->in_offset = offset + buf_offset; + cmd->in_length = min(max_cmd_size, len); +@@ -172,12 +173,13 @@ int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset, + + /* status is output in the last 4-bytes of the command buffer */ + cmd_size = sizeof(*cmd) + cmd->in_length + sizeof(u32); +- status = ((void *) cmd) + cmd_size - sizeof(u32); + + rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), +- ND_CMD_SET_CONFIG_DATA, cmd, cmd_size, NULL); +- if (rc || *status) { +- rc = rc ? rc : -ENXIO; ++ ND_CMD_SET_CONFIG_DATA, cmd, cmd_size, &cmd_rc); ++ if (rc < 0) ++ break; ++ if (cmd_rc < 0) { ++ rc = cmd_rc; + break; + } + } +diff --git a/drivers/nvdimm/namespace_devs.c b/drivers/nvdimm/namespace_devs.c +index 658ada497be0..6747d899f46e 100644 +--- a/drivers/nvdimm/namespace_devs.c ++++ b/drivers/nvdimm/namespace_devs.c +@@ -1926,7 +1926,7 @@ static struct device *create_namespace_pmem(struct nd_region *nd_region, + } + + if (i < nd_region->ndr_mappings) { +- struct nvdimm_drvdata *ndd = to_ndd(&nd_region->mapping[i]); ++ struct nvdimm *nvdimm = nd_region->mapping[i].nvdimm; + + /* + * Give up if we don't find an instance of a uuid at each +@@ -1934,7 +1934,7 @@ static struct device *create_namespace_pmem(struct nd_region *nd_region, + * find a dimm with two instances of the same uuid. + */ + dev_err(&nd_region->dev, "%s missing label for %pUb\n", +- dev_name(ndd->dev), nd_label->uuid); ++ nvdimm_name(nvdimm), nd_label->uuid); + rc = -EINVAL; + goto err; + } +diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c +index e2198a2feeca..b45b375c0e6c 100644 +--- a/drivers/pci/hotplug/acpiphp_glue.c ++++ b/drivers/pci/hotplug/acpiphp_glue.c +@@ -541,6 +541,7 @@ static unsigned int get_slot_status(struct acpiphp_slot *slot) + { + unsigned long long sta = 0; + struct acpiphp_func *func; ++ u32 dvid; + + list_for_each_entry(func, &slot->funcs, sibling) { + if (func->flags & FUNC_HAS_STA) { +@@ -551,19 +552,27 @@ static unsigned int get_slot_status(struct acpiphp_slot *slot) + if (ACPI_SUCCESS(status) && sta) + break; + } else { +- u32 dvid; +- +- pci_bus_read_config_dword(slot->bus, +- PCI_DEVFN(slot->device, +- func->function), +- PCI_VENDOR_ID, &dvid); +- if (dvid != 0xffffffff) { ++ if (pci_bus_read_dev_vendor_id(slot->bus, ++ PCI_DEVFN(slot->device, func->function), ++ &dvid, 0)) { + sta = ACPI_STA_ALL; + break; + } + } + } + ++ if (!sta) { ++ /* ++ * Check for the slot itself since it may be that the ++ * ACPI slot is a device below PCIe upstream port so in ++ * that case it may not even be reachable yet. ++ */ ++ if (pci_bus_read_dev_vendor_id(slot->bus, ++ PCI_DEVFN(slot->device, 0), &dvid, 0)) { ++ sta = ACPI_STA_ALL; ++ } ++ } ++ + return (unsigned int)sta; + } + +diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c +index 46d47bd6ca1f..81241f981ad7 100644 +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -4815,9 +4815,13 @@ static void quirk_no_ext_tags(struct pci_dev *pdev) + + pci_walk_bus(bridge->bus, pci_configure_extended_tags, NULL); + } ++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0132, quirk_no_ext_tags); + DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0140, quirk_no_ext_tags); ++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0141, quirk_no_ext_tags); + DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0142, quirk_no_ext_tags); + DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0144, quirk_no_ext_tags); ++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0420, quirk_no_ext_tags); ++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0422, quirk_no_ext_tags); + + #ifdef CONFIG_PCI_ATS + /* +diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c +index aa857be692cf..d5ae307ef4e1 100644 +--- a/drivers/phy/allwinner/phy-sun4i-usb.c ++++ b/drivers/phy/allwinner/phy-sun4i-usb.c +@@ -410,11 +410,13 @@ static bool sun4i_usb_phy0_poll(struct sun4i_usb_phy_data *data) + return true; + + /* +- * The A31 companion pmic (axp221) does not generate vbus change +- * interrupts when the board is driving vbus, so we must poll ++ * The A31/A23/A33 companion pmics (AXP221/AXP223) do not ++ * generate vbus change interrupts when the board is driving ++ * vbus using the N_VBUSEN pin on the pmic, so we must poll + * when using the pmic for vbus-det _and_ we're driving vbus. + */ +- if (data->cfg->type == sun6i_a31_phy && ++ if ((data->cfg->type == sun6i_a31_phy || ++ data->cfg->type == sun8i_a33_phy) && + data->vbus_power_supply && data->phys[0].regulator_on) + return true; + +@@ -885,7 +887,7 @@ static const struct sun4i_usb_phy_cfg sun7i_a20_cfg = { + + static const struct sun4i_usb_phy_cfg sun8i_a23_cfg = { + .num_phys = 2, +- .type = sun4i_a10_phy, ++ .type = sun6i_a31_phy, + .disc_thresh = 3, + .phyctl_offset = REG_PHYCTL_A10, + .dedicated_clocks = true, +diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c +index f5d97e0ad52b..98b0a933a946 100644 +--- a/drivers/pwm/pwm-mediatek.c ++++ b/drivers/pwm/pwm-mediatek.c +@@ -29,7 +29,9 @@ + #define PWMGDUR 0x0c + #define PWMWAVENUM 0x28 + #define PWMDWIDTH 0x2c ++#define PWM45DWIDTH_FIXUP 0x30 + #define PWMTHRES 0x30 ++#define PWM45THRES_FIXUP 0x34 + + #define PWM_CLK_DIV_MAX 7 + +@@ -54,6 +56,7 @@ static const char * const mtk_pwm_clk_name[MTK_CLK_MAX] = { + + struct mtk_pwm_platform_data { + unsigned int num_pwms; ++ bool pwm45_fixup; + }; + + /** +@@ -66,6 +69,7 @@ struct mtk_pwm_chip { + struct pwm_chip chip; + void __iomem *regs; + struct clk *clks[MTK_CLK_MAX]; ++ const struct mtk_pwm_platform_data *soc; + }; + + static const unsigned int mtk_pwm_reg_offset[] = { +@@ -131,18 +135,25 @@ static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, + { + struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip); + struct clk *clk = pc->clks[MTK_CLK_PWM1 + pwm->hwpwm]; +- u32 resolution, clkdiv = 0; ++ u32 clkdiv = 0, cnt_period, cnt_duty, reg_width = PWMDWIDTH, ++ reg_thres = PWMTHRES; ++ u64 resolution; + int ret; + + ret = mtk_pwm_clk_enable(chip, pwm); + if (ret < 0) + return ret; + +- resolution = NSEC_PER_SEC / clk_get_rate(clk); ++ /* Using resolution in picosecond gets accuracy higher */ ++ resolution = (u64)NSEC_PER_SEC * 1000; ++ do_div(resolution, clk_get_rate(clk)); + +- while (period_ns / resolution > 8191) { ++ cnt_period = DIV_ROUND_CLOSEST_ULL((u64)period_ns * 1000, resolution); ++ while (cnt_period > 8191) { + resolution *= 2; + clkdiv++; ++ cnt_period = DIV_ROUND_CLOSEST_ULL((u64)period_ns * 1000, ++ resolution); + } + + if (clkdiv > PWM_CLK_DIV_MAX) { +@@ -151,9 +162,19 @@ static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, + return -EINVAL; + } + ++ if (pc->soc->pwm45_fixup && pwm->hwpwm > 2) { ++ /* ++ * PWM[4,5] has distinct offset for PWMDWIDTH and PWMTHRES ++ * from the other PWMs on MT7623. ++ */ ++ reg_width = PWM45DWIDTH_FIXUP; ++ reg_thres = PWM45THRES_FIXUP; ++ } ++ ++ cnt_duty = DIV_ROUND_CLOSEST_ULL((u64)duty_ns * 1000, resolution); + mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv); +- mtk_pwm_writel(pc, pwm->hwpwm, PWMDWIDTH, period_ns / resolution); +- mtk_pwm_writel(pc, pwm->hwpwm, PWMTHRES, duty_ns / resolution); ++ mtk_pwm_writel(pc, pwm->hwpwm, reg_width, cnt_period); ++ mtk_pwm_writel(pc, pwm->hwpwm, reg_thres, cnt_duty); + + mtk_pwm_clk_disable(chip, pwm); + +@@ -211,6 +232,7 @@ static int mtk_pwm_probe(struct platform_device *pdev) + data = of_device_get_match_data(&pdev->dev); + if (data == NULL) + return -EINVAL; ++ pc->soc = data; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + pc->regs = devm_ioremap_resource(&pdev->dev, res); +@@ -251,14 +273,17 @@ static int mtk_pwm_remove(struct platform_device *pdev) + + static const struct mtk_pwm_platform_data mt2712_pwm_data = { + .num_pwms = 8, ++ .pwm45_fixup = false, + }; + + static const struct mtk_pwm_platform_data mt7622_pwm_data = { + .num_pwms = 6, ++ .pwm45_fixup = false, + }; + + static const struct mtk_pwm_platform_data mt7623_pwm_data = { + .num_pwms = 5, ++ .pwm45_fixup = true, + }; + + static const struct of_device_id mtk_pwm_of_match[] = { +diff --git a/drivers/pwm/pwm-rcar.c b/drivers/pwm/pwm-rcar.c +index 1c85ecc9e7ac..0fcf94ffad32 100644 +--- a/drivers/pwm/pwm-rcar.c ++++ b/drivers/pwm/pwm-rcar.c +@@ -156,8 +156,12 @@ static int rcar_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, + if (div < 0) + return div; + +- /* Let the core driver set pwm->period if disabled and duty_ns == 0 */ +- if (!pwm_is_enabled(pwm) && !duty_ns) ++ /* ++ * Let the core driver set pwm->period if disabled and duty_ns == 0. ++ * But, this driver should prevent to set the new duty_ns if current ++ * duty_cycle is not set ++ */ ++ if (!pwm_is_enabled(pwm) && !duty_ns && !pwm->state.duty_cycle) + return 0; + + rcar_pwm_update(rp, RCAR_PWMCR_SYNC, RCAR_PWMCR_SYNC, RCAR_PWMCR); +diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c +index 435ce5ec648a..59bd749c2f25 100644 +--- a/drivers/soc/mediatek/mtk-scpsys.c ++++ b/drivers/soc/mediatek/mtk-scpsys.c +@@ -992,7 +992,7 @@ static int scpsys_probe(struct platform_device *pdev) + + pd_data = &scp->pd_data; + +- for (i = 0, sd = soc->subdomains ; i < soc->num_subdomains ; i++) { ++ for (i = 0, sd = soc->subdomains; i < soc->num_subdomains; i++, sd++) { + ret = pm_genpd_add_subdomain(pd_data->domains[sd->origin], + pd_data->domains[sd->subdomain]); + if (ret && IS_ENABLED(CONFIG_PM)) +diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c +index 4a11fc0d4136..b7936f815373 100644 +--- a/drivers/spi/spi-atmel.c ++++ b/drivers/spi/spi-atmel.c +@@ -1512,6 +1512,11 @@ static void atmel_spi_init(struct atmel_spi *as) + { + spi_writel(as, CR, SPI_BIT(SWRST)); + spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ ++ ++ /* It is recommended to enable FIFOs first thing after reset */ ++ if (as->fifo_size) ++ spi_writel(as, CR, SPI_BIT(FIFOEN)); ++ + if (as->caps.has_wdrbt) { + spi_writel(as, MR, SPI_BIT(WDRBT) | SPI_BIT(MODFDIS) + | SPI_BIT(MSTR)); +@@ -1522,9 +1527,6 @@ static void atmel_spi_init(struct atmel_spi *as) + if (as->use_pdc) + spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS)); + spi_writel(as, CR, SPI_BIT(SPIEN)); +- +- if (as->fifo_size) +- spi_writel(as, CR, SPI_BIT(FIFOEN)); + } + + static int atmel_spi_probe(struct platform_device *pdev) +diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c +index b33a727a0158..7b213faa0a2b 100644 +--- a/drivers/spi/spi.c ++++ b/drivers/spi/spi.c +@@ -779,8 +779,14 @@ static int spi_map_buf(struct spi_controller *ctlr, struct device *dev, + for (i = 0; i < sgs; i++) { + + if (vmalloced_buf || kmap_buf) { +- min = min_t(size_t, +- len, desc_len - offset_in_page(buf)); ++ /* ++ * Next scatterlist entry size is the minimum between ++ * the desc_len and the remaining buffer length that ++ * fits in a page. ++ */ ++ min = min_t(size_t, desc_len, ++ min_t(size_t, len, ++ PAGE_SIZE - offset_in_page(buf))); + if (vmalloced_buf) + vm_page = vmalloc_to_page(buf); + else +@@ -2254,12 +2260,6 @@ void spi_unregister_controller(struct spi_controller *ctlr) + mutex_lock(&board_lock); + found = idr_find(&spi_master_idr, id); + mutex_unlock(&board_lock); +- if (found != ctlr) { +- dev_dbg(&ctlr->dev, +- "attempting to delete unregistered controller [%s]\n", +- dev_name(&ctlr->dev)); +- return; +- } + if (ctlr->queued) { + if (spi_destroy_queue(ctlr)) + dev_err(&ctlr->dev, "queue remove failed\n"); +@@ -2272,7 +2272,8 @@ void spi_unregister_controller(struct spi_controller *ctlr) + device_unregister(&ctlr->dev); + /* free bus id */ + mutex_lock(&board_lock); +- idr_remove(&spi_master_idr, id); ++ if (found == ctlr) ++ idr_remove(&spi_master_idr, id); + mutex_unlock(&board_lock); + } + EXPORT_SYMBOL_GPL(spi_unregister_controller); +diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c +index 4f9f9dca5e6a..545ef024841d 100644 +--- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c ++++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c +@@ -1279,7 +1279,10 @@ const struct v4l2_file_operations atomisp_fops = { + .mmap = atomisp_mmap, + .unlocked_ioctl = video_ioctl2, + #ifdef CONFIG_COMPAT ++ /* ++ * There are problems with this code. Disable this for now. + .compat_ioctl32 = atomisp_compat_ioctl32, ++ */ + #endif + .poll = atomisp_poll, + }; +@@ -1291,7 +1294,10 @@ const struct v4l2_file_operations atomisp_file_fops = { + .mmap = atomisp_file_mmap, + .unlocked_ioctl = video_ioctl2, + #ifdef CONFIG_COMPAT ++ /* ++ * There are problems with this code. Disable this for now. + .compat_ioctl32 = atomisp_compat_ioctl32, ++ */ + #endif + .poll = atomisp_poll, + }; +diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c +index a67781b7a0b2..ee3a215b333a 100644 +--- a/drivers/thermal/imx_thermal.c ++++ b/drivers/thermal/imx_thermal.c +@@ -637,6 +637,9 @@ static int imx_thermal_probe(struct platform_device *pdev) + regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_POWER_DOWN); + regmap_write(map, TEMPSENSE0 + REG_SET, TEMPSENSE0_MEASURE_TEMP); + ++ data->irq_enabled = true; ++ data->mode = THERMAL_DEVICE_ENABLED; ++ + ret = devm_request_threaded_irq(&pdev->dev, data->irq, + imx_thermal_alarm_irq, imx_thermal_alarm_irq_thread, + 0, "imx_thermal", data); +@@ -649,9 +652,6 @@ static int imx_thermal_probe(struct platform_device *pdev) + return ret; + } + +- data->irq_enabled = true; +- data->mode = THERMAL_DEVICE_ENABLED; +- + return 0; + } + +diff --git a/drivers/thunderbolt/icm.c b/drivers/thunderbolt/icm.c +index ab02d13f40b7..3e12cb8a23cc 100644 +--- a/drivers/thunderbolt/icm.c ++++ b/drivers/thunderbolt/icm.c +@@ -383,6 +383,15 @@ static void remove_switch(struct tb_switch *sw) + tb_switch_remove(sw); + } + ++static void remove_xdomain(struct tb_xdomain *xd) ++{ ++ struct tb_switch *sw; ++ ++ sw = tb_to_switch(xd->dev.parent); ++ tb_port_at(xd->route, sw)->xdomain = NULL; ++ tb_xdomain_remove(xd); ++} ++ + static void + icm_fr_device_connected(struct tb *tb, const struct icm_pkg_header *hdr) + { +@@ -391,6 +400,7 @@ icm_fr_device_connected(struct tb *tb, const struct icm_pkg_header *hdr) + struct tb_switch *sw, *parent_sw; + struct icm *icm = tb_priv(tb); + bool authorized = false; ++ struct tb_xdomain *xd; + u8 link, depth; + u64 route; + int ret; +@@ -467,6 +477,13 @@ icm_fr_device_connected(struct tb *tb, const struct icm_pkg_header *hdr) + tb_switch_put(sw); + } + ++ /* Remove existing XDomain connection if found */ ++ xd = tb_xdomain_find_by_link_depth(tb, link, depth); ++ if (xd) { ++ remove_xdomain(xd); ++ tb_xdomain_put(xd); ++ } ++ + parent_sw = tb_switch_find_by_link_depth(tb, link, depth - 1); + if (!parent_sw) { + tb_err(tb, "failed to find parent switch for %u.%u\n", +@@ -529,15 +546,6 @@ icm_fr_device_disconnected(struct tb *tb, const struct icm_pkg_header *hdr) + tb_switch_put(sw); + } + +-static void remove_xdomain(struct tb_xdomain *xd) +-{ +- struct tb_switch *sw; +- +- sw = tb_to_switch(xd->dev.parent); +- tb_port_at(xd->route, sw)->xdomain = NULL; +- tb_xdomain_remove(xd); +-} +- + static void + icm_fr_xdomain_connected(struct tb *tb, const struct icm_pkg_header *hdr) + { +@@ -728,14 +736,14 @@ static bool icm_ar_is_supported(struct tb *tb) + static int icm_ar_get_mode(struct tb *tb) + { + struct tb_nhi *nhi = tb->nhi; +- int retries = 5; ++ int retries = 60; + u32 val; + + do { + val = ioread32(nhi->iobase + REG_FW_STS); + if (val & REG_FW_STS_NVM_AUTH_DONE) + break; +- msleep(30); ++ msleep(50); + } while (--retries); + + if (!retries) { +@@ -915,6 +923,9 @@ static int icm_firmware_reset(struct tb *tb, struct tb_nhi *nhi) + struct icm *icm = tb_priv(tb); + u32 val; + ++ if (!icm->upstream_port) ++ return -ENODEV; ++ + /* Put ARC to wait for CIO reset event to happen */ + val = ioread32(nhi->iobase + REG_FW_STS); + val |= REG_FW_STS_CIO_RESET_REQ; +@@ -1054,6 +1065,9 @@ static int icm_firmware_init(struct tb *tb) + break; + + default: ++ if (ret < 0) ++ return ret; ++ + tb_err(tb, "ICM firmware is in wrong mode: %u\n", ret); + return -ENODEV; + } +diff --git a/drivers/thunderbolt/nhi.c b/drivers/thunderbolt/nhi.c +index f45bcbc63738..80c33c7404f5 100644 +--- a/drivers/thunderbolt/nhi.c ++++ b/drivers/thunderbolt/nhi.c +@@ -1064,6 +1064,7 @@ static const struct dev_pm_ops nhi_pm_ops = { + * we just disable hotplug, the + * pci-tunnels stay alive. + */ ++ .thaw_noirq = nhi_resume_noirq, + .restore_noirq = nhi_resume_noirq, + .suspend = nhi_suspend, + .freeze = nhi_suspend, +diff --git a/drivers/thunderbolt/switch.c b/drivers/thunderbolt/switch.c +index da54ace4dd2f..1cc79785ce42 100644 +--- a/drivers/thunderbolt/switch.c ++++ b/drivers/thunderbolt/switch.c +@@ -716,6 +716,13 @@ static int tb_switch_set_authorized(struct tb_switch *sw, unsigned int val) + if (sw->authorized) + goto unlock; + ++ /* ++ * Make sure there is no PCIe rescan ongoing when a new PCIe ++ * tunnel is created. Otherwise the PCIe rescan code might find ++ * the new tunnel too early. ++ */ ++ pci_lock_rescan_remove(); ++ + switch (val) { + /* Approve switch */ + case 1: +@@ -735,6 +742,8 @@ static int tb_switch_set_authorized(struct tb_switch *sw, unsigned int val) + break; + } + ++ pci_unlock_rescan_remove(); ++ + if (!ret) { + sw->authorized = val; + /* Notify status change to the userspace */ +diff --git a/drivers/usb/core/generic.c b/drivers/usb/core/generic.c +index 83c14dda6300..bc8242bc4564 100644 +--- a/drivers/usb/core/generic.c ++++ b/drivers/usb/core/generic.c +@@ -210,8 +210,13 @@ static int generic_suspend(struct usb_device *udev, pm_message_t msg) + if (!udev->parent) + rc = hcd_bus_suspend(udev, msg); + +- /* Non-root devices don't need to do anything for FREEZE or PRETHAW */ +- else if (msg.event == PM_EVENT_FREEZE || msg.event == PM_EVENT_PRETHAW) ++ /* ++ * Non-root USB2 devices don't need to do anything for FREEZE ++ * or PRETHAW. USB3 devices don't support global suspend and ++ * needs to be selectively suspended. ++ */ ++ else if ((msg.event == PM_EVENT_FREEZE || msg.event == PM_EVENT_PRETHAW) ++ && (udev->speed < USB_SPEED_SUPER)) + rc = 0; + else + rc = usb_port_suspend(udev, msg); +diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c +index e94bf91cc58a..df4569df7eaf 100644 +--- a/drivers/usb/dwc3/core.c ++++ b/drivers/usb/dwc3/core.c +@@ -119,6 +119,9 @@ static void __dwc3_set_mode(struct work_struct *work) + if (dwc->dr_mode != USB_DR_MODE_OTG) + return; + ++ if (dwc->desired_dr_role == DWC3_GCTL_PRTCAP_OTG) ++ return; ++ + switch (dwc->current_dr_role) { + case DWC3_GCTL_PRTCAP_HOST: + dwc3_host_exit(dwc); +diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c +index 3ba11136ebf0..c961a94d136b 100644 +--- a/drivers/usb/dwc3/dwc3-pci.c ++++ b/drivers/usb/dwc3/dwc3-pci.c +@@ -222,7 +222,7 @@ static int dwc3_pci_probe(struct pci_dev *pci, + ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res)); + if (ret) { + dev_err(dev, "couldn't add resources to dwc3 device\n"); +- return ret; ++ goto err; + } + + dwc->pci = pci; +diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c +index 2bda4eb1e9ac..100454c514d5 100644 +--- a/drivers/usb/dwc3/gadget.c ++++ b/drivers/usb/dwc3/gadget.c +@@ -166,18 +166,8 @@ static void dwc3_ep_inc_deq(struct dwc3_ep *dep) + dwc3_ep_inc_trb(&dep->trb_dequeue); + } + +-/** +- * dwc3_gadget_giveback - call struct usb_request's ->complete callback +- * @dep: The endpoint to whom the request belongs to +- * @req: The request we're giving back +- * @status: completion code for the request +- * +- * Must be called with controller's lock held and interrupts disabled. This +- * function will unmap @req and call its ->complete() callback to notify upper +- * layers that it has completed. +- */ +-void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, +- int status) ++void dwc3_gadget_del_and_unmap_request(struct dwc3_ep *dep, ++ struct dwc3_request *req, int status) + { + struct dwc3 *dwc = dep->dwc; + +@@ -190,18 +180,35 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, + + if (req->trb) + usb_gadget_unmap_request_by_dev(dwc->sysdev, +- &req->request, req->direction); ++ &req->request, req->direction); + + req->trb = NULL; +- + trace_dwc3_gadget_giveback(req); + ++ if (dep->number > 1) ++ pm_runtime_put(dwc->dev); ++} ++ ++/** ++ * dwc3_gadget_giveback - call struct usb_request's ->complete callback ++ * @dep: The endpoint to whom the request belongs to ++ * @req: The request we're giving back ++ * @status: completion code for the request ++ * ++ * Must be called with controller's lock held and interrupts disabled. This ++ * function will unmap @req and call its ->complete() callback to notify upper ++ * layers that it has completed. ++ */ ++void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, ++ int status) ++{ ++ struct dwc3 *dwc = dep->dwc; ++ ++ dwc3_gadget_del_and_unmap_request(dep, req, status); ++ + spin_unlock(&dwc->lock); + usb_gadget_giveback_request(&dep->endpoint, &req->request); + spin_lock(&dwc->lock); +- +- if (dep->number > 1) +- pm_runtime_put(dwc->dev); + } + + /** +@@ -1227,7 +1234,7 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep) + if (req->trb) + memset(req->trb, 0, sizeof(struct dwc3_trb)); + dep->queued_requests--; +- dwc3_gadget_giveback(dep, req, ret); ++ dwc3_gadget_del_and_unmap_request(dep, req, ret); + return ret; + } + +diff --git a/drivers/usb/gadget/function/f_midi.c b/drivers/usb/gadget/function/f_midi.c +index 4eb96b91cc40..e8f35db42394 100644 +--- a/drivers/usb/gadget/function/f_midi.c ++++ b/drivers/usb/gadget/function/f_midi.c +@@ -404,7 +404,8 @@ static int f_midi_set_alt(struct usb_function *f, unsigned intf, unsigned alt) + if (err) { + ERROR(midi, "%s: couldn't enqueue request: %d\n", + midi->out_ep->name, err); +- free_ep_req(midi->out_ep, req); ++ if (req->buf != NULL) ++ free_ep_req(midi->out_ep, req); + return err; + } + } +diff --git a/drivers/usb/gadget/u_f.h b/drivers/usb/gadget/u_f.h +index c3fbef2bb5db..09f90447fed5 100644 +--- a/drivers/usb/gadget/u_f.h ++++ b/drivers/usb/gadget/u_f.h +@@ -61,7 +61,9 @@ struct usb_request *alloc_ep_req(struct usb_ep *ep, size_t len); + /* Frees a usb_request previously allocated by alloc_ep_req() */ + static inline void free_ep_req(struct usb_ep *ep, struct usb_request *req) + { ++ WARN_ON(req->buf == NULL); + kfree(req->buf); ++ req->buf = NULL; + usb_ep_free_request(ep, req); + } + +diff --git a/drivers/usb/gadget/udc/core.c b/drivers/usb/gadget/udc/core.c +index 1f8b19d9cf97..6a266687ca99 100644 +--- a/drivers/usb/gadget/udc/core.c ++++ b/drivers/usb/gadget/udc/core.c +@@ -238,6 +238,9 @@ EXPORT_SYMBOL_GPL(usb_ep_free_request); + * arranges to poll once per interval, and the gadget driver usually will + * have queued some data to transfer at that time. + * ++ * Note that @req's ->complete() callback must never be called from ++ * within usb_ep_queue() as that can create deadlock situations. ++ * + * Returns zero, or a negative error code. Endpoints that are not enabled + * report errors; errors will also be + * reported when the usb peripheral is disconnected. +diff --git a/drivers/usb/musb/musb_gadget_ep0.c b/drivers/usb/musb/musb_gadget_ep0.c +index 18da4873e52e..91a5027b5c1f 100644 +--- a/drivers/usb/musb/musb_gadget_ep0.c ++++ b/drivers/usb/musb/musb_gadget_ep0.c +@@ -89,15 +89,19 @@ static int service_tx_status_request( + } + + is_in = epnum & USB_DIR_IN; +- if (is_in) { +- epnum &= 0x0f; ++ epnum &= 0x0f; ++ if (epnum >= MUSB_C_NUM_EPS) { ++ handled = -EINVAL; ++ break; ++ } ++ ++ if (is_in) + ep = &musb->endpoints[epnum].ep_in; +- } else { ++ else + ep = &musb->endpoints[epnum].ep_out; +- } + regs = musb->endpoints[epnum].regs; + +- if (epnum >= MUSB_C_NUM_EPS || !ep->desc) { ++ if (!ep->desc) { + handled = -EINVAL; + break; + } +diff --git a/drivers/watchdog/f71808e_wdt.c b/drivers/watchdog/f71808e_wdt.c +index 3a33c5344bd5..9a1c761258ce 100644 +--- a/drivers/watchdog/f71808e_wdt.c ++++ b/drivers/watchdog/f71808e_wdt.c +@@ -496,7 +496,7 @@ static bool watchdog_is_running(void) + + is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0)) + && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF) +- & F71808FG_FLAG_WD_EN); ++ & BIT(F71808FG_FLAG_WD_EN)); + + superio_exit(watchdog.sioaddr); + +diff --git a/fs/autofs4/root.c b/fs/autofs4/root.c +index 82e8f6edfb48..b12e37f27530 100644 +--- a/fs/autofs4/root.c ++++ b/fs/autofs4/root.c +@@ -749,7 +749,7 @@ static int autofs4_dir_mkdir(struct inode *dir, + + autofs4_del_active(dentry); + +- inode = autofs4_get_inode(dir->i_sb, S_IFDIR | 0555); ++ inode = autofs4_get_inode(dir->i_sb, S_IFDIR | mode); + if (!inode) + return -ENOMEM; + d_add(dentry, inode); +diff --git a/fs/ceph/inode.c b/fs/ceph/inode.c +index c6ec5aa46100..236313efd347 100644 +--- a/fs/ceph/inode.c ++++ b/fs/ceph/inode.c +@@ -660,13 +660,15 @@ void ceph_fill_file_time(struct inode *inode, int issued, + CEPH_CAP_FILE_BUFFER| + CEPH_CAP_AUTH_EXCL| + CEPH_CAP_XATTR_EXCL)) { +- if (timespec_compare(ctime, &inode->i_ctime) > 0) { ++ if (ci->i_version == 0 || ++ timespec_compare(ctime, &inode->i_ctime) > 0) { + dout("ctime %ld.%09ld -> %ld.%09ld inc w/ cap\n", + inode->i_ctime.tv_sec, inode->i_ctime.tv_nsec, + ctime->tv_sec, ctime->tv_nsec); + inode->i_ctime = *ctime; + } +- if (ceph_seq_cmp(time_warp_seq, ci->i_time_warp_seq) > 0) { ++ if (ci->i_version == 0 || ++ ceph_seq_cmp(time_warp_seq, ci->i_time_warp_seq) > 0) { + /* the MDS did a utimes() */ + dout("mtime %ld.%09ld -> %ld.%09ld " + "tw %d -> %d\n", +@@ -786,7 +788,6 @@ static int fill_inode(struct inode *inode, struct page *locked_page, + new_issued = ~issued & le32_to_cpu(info->cap.caps); + + /* update inode */ +- ci->i_version = le64_to_cpu(info->version); + inode->i_rdev = le32_to_cpu(info->rdev); + inode->i_blkbits = fls(le32_to_cpu(info->layout.fl_stripe_unit)) - 1; + +@@ -857,6 +858,9 @@ static int fill_inode(struct inode *inode, struct page *locked_page, + xattr_blob = NULL; + } + ++ /* finally update i_version */ ++ ci->i_version = le64_to_cpu(info->version); ++ + inode->i_mapping->a_ops = &ceph_aops; + + switch (inode->i_mode & S_IFMT) { +diff --git a/fs/cifs/Kconfig b/fs/cifs/Kconfig +index 687da62daf4e..e901ef6a4813 100644 +--- a/fs/cifs/Kconfig ++++ b/fs/cifs/Kconfig +@@ -189,6 +189,7 @@ config CIFS_NFSD_EXPORT + config CIFS_SMB311 + bool "SMB3.1.1 network file system support (Experimental)" + depends on CIFS ++ select CRYPTO_SHA512 + + help + This enables experimental support for the newest, SMB3.1.1, dialect. +diff --git a/fs/cifs/cifsencrypt.c b/fs/cifs/cifsencrypt.c +index f2b0a7f124da..a6ef088e057b 100644 +--- a/fs/cifs/cifsencrypt.c ++++ b/fs/cifs/cifsencrypt.c +@@ -36,37 +36,6 @@ + #include <crypto/skcipher.h> + #include <crypto/aead.h> + +-static int +-cifs_crypto_shash_md5_allocate(struct TCP_Server_Info *server) +-{ +- int rc; +- unsigned int size; +- +- if (server->secmech.sdescmd5 != NULL) +- return 0; /* already allocated */ +- +- server->secmech.md5 = crypto_alloc_shash("md5", 0, 0); +- if (IS_ERR(server->secmech.md5)) { +- cifs_dbg(VFS, "could not allocate crypto md5\n"); +- rc = PTR_ERR(server->secmech.md5); +- server->secmech.md5 = NULL; +- return rc; +- } +- +- size = sizeof(struct shash_desc) + +- crypto_shash_descsize(server->secmech.md5); +- server->secmech.sdescmd5 = kmalloc(size, GFP_KERNEL); +- if (!server->secmech.sdescmd5) { +- crypto_free_shash(server->secmech.md5); +- server->secmech.md5 = NULL; +- return -ENOMEM; +- } +- server->secmech.sdescmd5->shash.tfm = server->secmech.md5; +- server->secmech.sdescmd5->shash.flags = 0x0; +- +- return 0; +-} +- + int __cifs_calc_signature(struct smb_rqst *rqst, + struct TCP_Server_Info *server, char *signature, + struct shash_desc *shash) +@@ -132,13 +101,10 @@ static int cifs_calc_signature(struct smb_rqst *rqst, + if (!rqst->rq_iov || !signature || !server) + return -EINVAL; + +- if (!server->secmech.sdescmd5) { +- rc = cifs_crypto_shash_md5_allocate(server); +- if (rc) { +- cifs_dbg(VFS, "%s: Can't alloc md5 crypto\n", __func__); +- return -1; +- } +- } ++ rc = cifs_alloc_hash("md5", &server->secmech.md5, ++ &server->secmech.sdescmd5); ++ if (rc) ++ return -1; + + rc = crypto_shash_init(&server->secmech.sdescmd5->shash); + if (rc) { +@@ -663,37 +629,6 @@ CalcNTLMv2_response(const struct cifs_ses *ses, char *ntlmv2_hash) + return rc; + } + +-static int crypto_hmacmd5_alloc(struct TCP_Server_Info *server) +-{ +- int rc; +- unsigned int size; +- +- /* check if already allocated */ +- if (server->secmech.sdeschmacmd5) +- return 0; +- +- server->secmech.hmacmd5 = crypto_alloc_shash("hmac(md5)", 0, 0); +- if (IS_ERR(server->secmech.hmacmd5)) { +- cifs_dbg(VFS, "could not allocate crypto hmacmd5\n"); +- rc = PTR_ERR(server->secmech.hmacmd5); +- server->secmech.hmacmd5 = NULL; +- return rc; +- } +- +- size = sizeof(struct shash_desc) + +- crypto_shash_descsize(server->secmech.hmacmd5); +- server->secmech.sdeschmacmd5 = kmalloc(size, GFP_KERNEL); +- if (!server->secmech.sdeschmacmd5) { +- crypto_free_shash(server->secmech.hmacmd5); +- server->secmech.hmacmd5 = NULL; +- return -ENOMEM; +- } +- server->secmech.sdeschmacmd5->shash.tfm = server->secmech.hmacmd5; +- server->secmech.sdeschmacmd5->shash.flags = 0x0; +- +- return 0; +-} +- + int + setup_ntlmv2_rsp(struct cifs_ses *ses, const struct nls_table *nls_cp) + { +@@ -757,9 +692,10 @@ setup_ntlmv2_rsp(struct cifs_ses *ses, const struct nls_table *nls_cp) + + mutex_lock(&ses->server->srv_mutex); + +- rc = crypto_hmacmd5_alloc(ses->server); ++ rc = cifs_alloc_hash("hmac(md5)", ++ &ses->server->secmech.hmacmd5, ++ &ses->server->secmech.sdeschmacmd5); + if (rc) { +- cifs_dbg(VFS, "could not crypto alloc hmacmd5 rc %d\n", rc); + goto unlock; + } + +@@ -893,6 +829,11 @@ cifs_crypto_secmech_release(struct TCP_Server_Info *server) + server->secmech.md5 = NULL; + } + ++ if (server->secmech.sha512) { ++ crypto_free_shash(server->secmech.sha512); ++ server->secmech.sha512 = NULL; ++ } ++ + if (server->secmech.hmacmd5) { + crypto_free_shash(server->secmech.hmacmd5); + server->secmech.hmacmd5 = NULL; +@@ -916,4 +857,6 @@ cifs_crypto_secmech_release(struct TCP_Server_Info *server) + server->secmech.sdeschmacmd5 = NULL; + kfree(server->secmech.sdescmd5); + server->secmech.sdescmd5 = NULL; ++ kfree(server->secmech.sdescsha512); ++ server->secmech.sdescsha512 = NULL; + } +diff --git a/fs/cifs/cifsfs.c b/fs/cifs/cifsfs.c +index 32cdea67bbfd..f715609b13f3 100644 +--- a/fs/cifs/cifsfs.c ++++ b/fs/cifs/cifsfs.c +@@ -1486,6 +1486,7 @@ MODULE_SOFTDEP("pre: nls"); + MODULE_SOFTDEP("pre: aes"); + MODULE_SOFTDEP("pre: cmac"); + MODULE_SOFTDEP("pre: sha256"); ++MODULE_SOFTDEP("pre: sha512"); + MODULE_SOFTDEP("pre: aead2"); + MODULE_SOFTDEP("pre: ccm"); + module_init(init_cifs) +diff --git a/fs/cifs/cifsglob.h b/fs/cifs/cifsglob.h +index 48f7c197cd2d..edc640db0842 100644 +--- a/fs/cifs/cifsglob.h ++++ b/fs/cifs/cifsglob.h +@@ -130,10 +130,12 @@ struct cifs_secmech { + struct crypto_shash *md5; /* md5 hash function */ + struct crypto_shash *hmacsha256; /* hmac-sha256 hash function */ + struct crypto_shash *cmacaes; /* block-cipher based MAC function */ ++ struct crypto_shash *sha512; /* sha512 hash function */ + struct sdesc *sdeschmacmd5; /* ctxt to generate ntlmv2 hash, CR1 */ + struct sdesc *sdescmd5; /* ctxt to generate cifs/smb signature */ + struct sdesc *sdeschmacsha256; /* ctxt to generate smb2 signature */ + struct sdesc *sdesccmacaes; /* ctxt to generate smb3 signature */ ++ struct sdesc *sdescsha512; /* ctxt to generate smb3.11 signing key */ + struct crypto_aead *ccmaesencrypt; /* smb3 encryption aead */ + struct crypto_aead *ccmaesdecrypt; /* smb3 decryption aead */ + }; +@@ -673,7 +675,8 @@ struct TCP_Server_Info { + unsigned int max_read; + unsigned int max_write; + #ifdef CONFIG_CIFS_SMB311 +- __u8 preauth_sha_hash[64]; /* save initital negprot hash */ ++ /* save initital negprot hash */ ++ __u8 preauth_sha_hash[SMB2_PREAUTH_HASH_SIZE]; + #endif /* 3.1.1 */ + struct delayed_work reconnect; /* reconnect workqueue job */ + struct mutex reconnect_mutex; /* prevent simultaneous reconnects */ +@@ -862,7 +865,7 @@ struct cifs_ses { + __u8 smb3encryptionkey[SMB3_SIGN_KEY_SIZE]; + __u8 smb3decryptionkey[SMB3_SIGN_KEY_SIZE]; + #ifdef CONFIG_CIFS_SMB311 +- __u8 preauth_sha_hash[64]; ++ __u8 preauth_sha_hash[SMB2_PREAUTH_HASH_SIZE]; + #endif /* 3.1.1 */ + }; + +@@ -1466,6 +1469,7 @@ struct dfs_info3_param { + #define CIFS_FATTR_NEED_REVAL 0x4 + #define CIFS_FATTR_INO_COLLISION 0x8 + #define CIFS_FATTR_UNKNOWN_NLINK 0x10 ++#define CIFS_FATTR_FAKE_ROOT_INO 0x20 + + struct cifs_fattr { + u32 cf_flags; +diff --git a/fs/cifs/cifsproto.h b/fs/cifs/cifsproto.h +index 93d565186698..365a414a75e9 100644 +--- a/fs/cifs/cifsproto.h ++++ b/fs/cifs/cifsproto.h +@@ -542,4 +542,9 @@ enum securityEnum cifs_select_sectype(struct TCP_Server_Info *, + struct cifs_aio_ctx *cifs_aio_ctx_alloc(void); + void cifs_aio_ctx_release(struct kref *refcount); + int setup_aio_ctx_iter(struct cifs_aio_ctx *ctx, struct iov_iter *iter, int rw); ++ ++int cifs_alloc_hash(const char *name, struct crypto_shash **shash, ++ struct sdesc **sdesc); ++void cifs_free_hash(struct crypto_shash **shash, struct sdesc **sdesc); ++ + #endif /* _CIFSPROTO_H */ +diff --git a/fs/cifs/inode.c b/fs/cifs/inode.c +index 8f9a8cc7cc62..ef8580139cef 100644 +--- a/fs/cifs/inode.c ++++ b/fs/cifs/inode.c +@@ -707,6 +707,18 @@ cifs_get_file_info(struct file *filp) + return rc; + } + ++/* Simple function to return a 64 bit hash of string. Rarely called */ ++static __u64 simple_hashstr(const char *str) ++{ ++ const __u64 hash_mult = 1125899906842597L; /* a big enough prime */ ++ __u64 hash = 0; ++ ++ while (*str) ++ hash = (hash + (__u64) *str++) * hash_mult; ++ ++ return hash; ++} ++ + int + cifs_get_inode_info(struct inode **inode, const char *full_path, + FILE_ALL_INFO *data, struct super_block *sb, int xid, +@@ -816,6 +828,14 @@ cifs_get_inode_info(struct inode **inode, const char *full_path, + tmprc); + fattr.cf_uniqueid = iunique(sb, ROOT_I); + cifs_autodisable_serverino(cifs_sb); ++ } else if ((fattr.cf_uniqueid == 0) && ++ strlen(full_path) == 0) { ++ /* some servers ret bad root ino ie 0 */ ++ cifs_dbg(FYI, "Invalid (0) inodenum\n"); ++ fattr.cf_flags |= ++ CIFS_FATTR_FAKE_ROOT_INO; ++ fattr.cf_uniqueid = ++ simple_hashstr(tcon->treeName); + } + } + } else +@@ -832,6 +852,16 @@ cifs_get_inode_info(struct inode **inode, const char *full_path, + &fattr.cf_uniqueid, data); + if (tmprc) + fattr.cf_uniqueid = CIFS_I(*inode)->uniqueid; ++ else if ((fattr.cf_uniqueid == 0) && ++ strlen(full_path) == 0) { ++ /* ++ * Reuse existing root inode num since ++ * inum zero for root causes ls of . and .. to ++ * not be returned ++ */ ++ cifs_dbg(FYI, "Srv ret 0 inode num for root\n"); ++ fattr.cf_uniqueid = CIFS_I(*inode)->uniqueid; ++ } + } else + fattr.cf_uniqueid = CIFS_I(*inode)->uniqueid; + } +@@ -893,6 +923,9 @@ cifs_get_inode_info(struct inode **inode, const char *full_path, + } + + cgii_exit: ++ if ((*inode) && ((*inode)->i_ino == 0)) ++ cifs_dbg(FYI, "inode number of zero returned\n"); ++ + kfree(buf); + cifs_put_tlink(tlink); + return rc; +diff --git a/fs/cifs/link.c b/fs/cifs/link.c +index 60b5a11ee11b..889a840172eb 100644 +--- a/fs/cifs/link.c ++++ b/fs/cifs/link.c +@@ -50,25 +50,12 @@ static int + symlink_hash(unsigned int link_len, const char *link_str, u8 *md5_hash) + { + int rc; +- unsigned int size; +- struct crypto_shash *md5; +- struct sdesc *sdescmd5; +- +- md5 = crypto_alloc_shash("md5", 0, 0); +- if (IS_ERR(md5)) { +- rc = PTR_ERR(md5); +- cifs_dbg(VFS, "%s: Crypto md5 allocation error %d\n", +- __func__, rc); +- return rc; +- } +- size = sizeof(struct shash_desc) + crypto_shash_descsize(md5); +- sdescmd5 = kmalloc(size, GFP_KERNEL); +- if (!sdescmd5) { +- rc = -ENOMEM; ++ struct crypto_shash *md5 = NULL; ++ struct sdesc *sdescmd5 = NULL; ++ ++ rc = cifs_alloc_hash("md5", &md5, &sdescmd5); ++ if (rc) + goto symlink_hash_err; +- } +- sdescmd5->shash.tfm = md5; +- sdescmd5->shash.flags = 0x0; + + rc = crypto_shash_init(&sdescmd5->shash); + if (rc) { +@@ -85,9 +72,7 @@ symlink_hash(unsigned int link_len, const char *link_str, u8 *md5_hash) + cifs_dbg(VFS, "%s: Could not generate md5 hash\n", __func__); + + symlink_hash_err: +- crypto_free_shash(md5); +- kfree(sdescmd5); +- ++ cifs_free_hash(&md5, &sdescmd5); + return rc; + } + +diff --git a/fs/cifs/misc.c b/fs/cifs/misc.c +index a0dbced4a45c..460084a8eac5 100644 +--- a/fs/cifs/misc.c ++++ b/fs/cifs/misc.c +@@ -848,3 +848,57 @@ setup_aio_ctx_iter(struct cifs_aio_ctx *ctx, struct iov_iter *iter, int rw) + iov_iter_bvec(&ctx->iter, ITER_BVEC | rw, ctx->bv, npages, ctx->len); + return 0; + } ++ ++/** ++ * cifs_alloc_hash - allocate hash and hash context together ++ * ++ * The caller has to make sure @sdesc is initialized to either NULL or ++ * a valid context. Both can be freed via cifs_free_hash(). ++ */ ++int ++cifs_alloc_hash(const char *name, ++ struct crypto_shash **shash, struct sdesc **sdesc) ++{ ++ int rc = 0; ++ size_t size; ++ ++ if (*sdesc != NULL) ++ return 0; ++ ++ *shash = crypto_alloc_shash(name, 0, 0); ++ if (IS_ERR(*shash)) { ++ cifs_dbg(VFS, "could not allocate crypto %s\n", name); ++ rc = PTR_ERR(*shash); ++ *shash = NULL; ++ *sdesc = NULL; ++ return rc; ++ } ++ ++ size = sizeof(struct shash_desc) + crypto_shash_descsize(*shash); ++ *sdesc = kmalloc(size, GFP_KERNEL); ++ if (*sdesc == NULL) { ++ cifs_dbg(VFS, "no memory left to allocate crypto %s\n", name); ++ crypto_free_shash(*shash); ++ *shash = NULL; ++ return -ENOMEM; ++ } ++ ++ (*sdesc)->shash.tfm = *shash; ++ (*sdesc)->shash.flags = 0x0; ++ return 0; ++} ++ ++/** ++ * cifs_free_hash - free hash and hash context together ++ * ++ * Freeing a NULL hash or context is safe. ++ */ ++void ++cifs_free_hash(struct crypto_shash **shash, struct sdesc **sdesc) ++{ ++ kfree(*sdesc); ++ *sdesc = NULL; ++ if (*shash) ++ crypto_free_shash(*shash); ++ *shash = NULL; ++} +diff --git a/fs/cifs/smb2misc.c b/fs/cifs/smb2misc.c +index 76d03abaa38c..da012c3ab700 100644 +--- a/fs/cifs/smb2misc.c ++++ b/fs/cifs/smb2misc.c +@@ -706,3 +706,67 @@ smb2_handle_cancelled_mid(char *buffer, struct TCP_Server_Info *server) + + return 0; + } ++ ++#ifdef CONFIG_CIFS_SMB311 ++/** ++ * smb311_update_preauth_hash - update @ses hash with the packet data in @iov ++ * ++ * Assumes @iov does not contain the rfc1002 length and iov[0] has the ++ * SMB2 header. ++ */ ++int ++smb311_update_preauth_hash(struct cifs_ses *ses, struct kvec *iov, int nvec) ++{ ++ int i, rc; ++ struct sdesc *d; ++ struct smb2_sync_hdr *hdr; ++ ++ if (ses->server->tcpStatus == CifsGood) { ++ /* skip non smb311 connections */ ++ if (ses->server->dialect != SMB311_PROT_ID) ++ return 0; ++ ++ /* skip last sess setup response */ ++ hdr = (struct smb2_sync_hdr *)iov[0].iov_base; ++ if (hdr->Flags & SMB2_FLAGS_SIGNED) ++ return 0; ++ } ++ ++ rc = smb311_crypto_shash_allocate(ses->server); ++ if (rc) ++ return rc; ++ ++ d = ses->server->secmech.sdescsha512; ++ rc = crypto_shash_init(&d->shash); ++ if (rc) { ++ cifs_dbg(VFS, "%s: could not init sha512 shash\n", __func__); ++ return rc; ++ } ++ ++ rc = crypto_shash_update(&d->shash, ses->preauth_sha_hash, ++ SMB2_PREAUTH_HASH_SIZE); ++ if (rc) { ++ cifs_dbg(VFS, "%s: could not update sha512 shash\n", __func__); ++ return rc; ++ } ++ ++ for (i = 0; i < nvec; i++) { ++ rc = crypto_shash_update(&d->shash, ++ iov[i].iov_base, iov[i].iov_len); ++ if (rc) { ++ cifs_dbg(VFS, "%s: could not update sha512 shash\n", ++ __func__); ++ return rc; ++ } ++ } ++ ++ rc = crypto_shash_final(&d->shash, ses->preauth_sha_hash); ++ if (rc) { ++ cifs_dbg(VFS, "%s: could not finalize sha512 shash\n", ++ __func__); ++ return rc; ++ } ++ ++ return 0; ++} ++#endif +diff --git a/fs/cifs/smb2ops.c b/fs/cifs/smb2ops.c +index eb68e2fcc500..dfd6fb02b7a3 100644 +--- a/fs/cifs/smb2ops.c ++++ b/fs/cifs/smb2ops.c +@@ -2066,6 +2066,15 @@ fill_transform_hdr(struct smb2_transform_hdr *tr_hdr, struct smb_rqst *old_rq) + inc_rfc1001_len(tr_hdr, orig_len); + } + ++/* We can not use the normal sg_set_buf() as we will sometimes pass a ++ * stack object as buf. ++ */ ++static inline void smb2_sg_set_buf(struct scatterlist *sg, const void *buf, ++ unsigned int buflen) ++{ ++ sg_set_page(sg, virt_to_page(buf), buflen, offset_in_page(buf)); ++} ++ + static struct scatterlist * + init_sg(struct smb_rqst *rqst, u8 *sign) + { +@@ -2080,16 +2089,16 @@ init_sg(struct smb_rqst *rqst, u8 *sign) + return NULL; + + sg_init_table(sg, sg_len); +- sg_set_buf(&sg[0], rqst->rq_iov[0].iov_base + 24, assoc_data_len); ++ smb2_sg_set_buf(&sg[0], rqst->rq_iov[0].iov_base + 24, assoc_data_len); + for (i = 1; i < rqst->rq_nvec; i++) +- sg_set_buf(&sg[i], rqst->rq_iov[i].iov_base, ++ smb2_sg_set_buf(&sg[i], rqst->rq_iov[i].iov_base, + rqst->rq_iov[i].iov_len); + for (j = 0; i < sg_len - 1; i++, j++) { + unsigned int len = (j < rqst->rq_npages - 1) ? rqst->rq_pagesz + : rqst->rq_tailsz; + sg_set_page(&sg[i], rqst->rq_pages[j], len, 0); + } +- sg_set_buf(&sg[sg_len - 1], sign, SMB2_SIGNATURE_SIZE); ++ smb2_sg_set_buf(&sg[sg_len - 1], sign, SMB2_SIGNATURE_SIZE); + return sg; + } + +diff --git a/fs/cifs/smb2pdu.c b/fs/cifs/smb2pdu.c +index 63778ac22fd9..af62c75b17c4 100644 +--- a/fs/cifs/smb2pdu.c ++++ b/fs/cifs/smb2pdu.c +@@ -453,6 +453,10 @@ SMB2_negotiate(const unsigned int xid, struct cifs_ses *ses) + return rc; + + req->sync_hdr.SessionId = 0; ++#ifdef CONFIG_CIFS_SMB311 ++ memset(server->preauth_sha_hash, 0, SMB2_PREAUTH_HASH_SIZE); ++ memset(ses->preauth_sha_hash, 0, SMB2_PREAUTH_HASH_SIZE); ++#endif + + if (strcmp(ses->server->vals->version_string, + SMB3ANY_VERSION_STRING) == 0) { +@@ -564,6 +568,15 @@ SMB2_negotiate(const unsigned int xid, struct cifs_ses *ses) + + /* BB: add check that dialect was valid given dialect(s) we asked for */ + ++#ifdef CONFIG_CIFS_SMB311 ++ /* ++ * Keep a copy of the hash after negprot. This hash will be ++ * the starting hash value for all sessions made from this ++ * server. ++ */ ++ memcpy(server->preauth_sha_hash, ses->preauth_sha_hash, ++ SMB2_PREAUTH_HASH_SIZE); ++#endif + /* SMB2 only has an extended negflavor */ + server->negflavor = CIFS_NEGFLAVOR_EXTENDED; + /* set it to the maximum buffer size value we can send with 1 credit */ +@@ -621,6 +634,10 @@ int smb3_validate_negotiate(const unsigned int xid, struct cifs_tcon *tcon) + return 0; + #endif + ++ /* In SMB3.11 preauth integrity supersedes validate negotiate */ ++ if (tcon->ses->server->dialect == SMB311_PROT_ID) ++ return 0; ++ + /* + * validation ioctl must be signed, so no point sending this if we + * can not sign it (ie are not known user). Even if signing is not +@@ -1148,6 +1165,14 @@ SMB2_sess_setup(const unsigned int xid, struct cifs_ses *ses, + sess_data->buf0_type = CIFS_NO_BUFFER; + sess_data->nls_cp = (struct nls_table *) nls_cp; + ++#ifdef CONFIG_CIFS_SMB311 ++ /* ++ * Initialize the session hash with the server one. ++ */ ++ memcpy(ses->preauth_sha_hash, ses->server->preauth_sha_hash, ++ SMB2_PREAUTH_HASH_SIZE); ++#endif ++ + while (sess_data->func) + sess_data->func(sess_data); + +@@ -1280,6 +1305,11 @@ SMB2_tcon(const unsigned int xid, struct cifs_ses *ses, const char *tree, + iov[1].iov_base = unc_path; + iov[1].iov_len = unc_path_len; + ++ /* 3.11 tcon req must be signed if not encrypted. See MS-SMB2 3.2.4.1.1 */ ++ if ((ses->server->dialect == SMB311_PROT_ID) && ++ !encryption_required(tcon)) ++ req->sync_hdr.Flags |= SMB2_FLAGS_SIGNED; ++ + rc = smb2_send_recv(xid, ses, iov, 2, &resp_buftype, flags, &rsp_iov); + cifs_small_buf_release(req); + rsp = (struct smb2_tree_connect_rsp *)rsp_iov.iov_base; +@@ -1738,8 +1768,10 @@ SMB2_open(const unsigned int xid, struct cifs_open_parms *oparms, __le16 *path, + rc = alloc_path_with_tree_prefix(©_path, ©_size, + &name_len, + tcon->treeName, path); +- if (rc) ++ if (rc) { ++ cifs_small_buf_release(req); + return rc; ++ } + req->NameLength = cpu_to_le16(name_len * 2); + uni_path_len = copy_size; + path = copy_path; +@@ -1750,8 +1782,10 @@ SMB2_open(const unsigned int xid, struct cifs_open_parms *oparms, __le16 *path, + if (uni_path_len % 8 != 0) { + copy_size = roundup(uni_path_len, 8); + copy_path = kzalloc(copy_size, GFP_KERNEL); +- if (!copy_path) ++ if (!copy_path) { ++ cifs_small_buf_release(req); + return -ENOMEM; ++ } + memcpy((char *)copy_path, (const char *)path, + uni_path_len); + uni_path_len = copy_size; +diff --git a/fs/cifs/smb2pdu.h b/fs/cifs/smb2pdu.h +index 2a2b34ccaf49..8b901c69a65a 100644 +--- a/fs/cifs/smb2pdu.h ++++ b/fs/cifs/smb2pdu.h +@@ -264,6 +264,7 @@ struct smb2_negotiate_req { + #define SMB311_SALT_SIZE 32 + /* Hash Algorithm Types */ + #define SMB2_PREAUTH_INTEGRITY_SHA512 cpu_to_le16(0x0001) ++#define SMB2_PREAUTH_HASH_SIZE 64 + + struct smb2_preauth_neg_context { + __le16 ContextType; /* 1 */ +diff --git a/fs/cifs/smb2proto.h b/fs/cifs/smb2proto.h +index 05287b01f596..cbcce3f7e86f 100644 +--- a/fs/cifs/smb2proto.h ++++ b/fs/cifs/smb2proto.h +@@ -202,4 +202,9 @@ extern int smb3_validate_negotiate(const unsigned int, struct cifs_tcon *); + + extern enum securityEnum smb2_select_sectype(struct TCP_Server_Info *, + enum securityEnum); ++#ifdef CONFIG_CIFS_SMB311 ++extern int smb311_crypto_shash_allocate(struct TCP_Server_Info *server); ++extern int smb311_update_preauth_hash(struct cifs_ses *ses, ++ struct kvec *iov, int nvec); ++#endif + #endif /* _SMB2PROTO_H */ +diff --git a/fs/cifs/smb2transport.c b/fs/cifs/smb2transport.c +index 99493946e2f9..bf49cb73b9e6 100644 +--- a/fs/cifs/smb2transport.c ++++ b/fs/cifs/smb2transport.c +@@ -43,77 +43,62 @@ + static int + smb2_crypto_shash_allocate(struct TCP_Server_Info *server) + { +- int rc; +- unsigned int size; ++ return cifs_alloc_hash("hmac(sha256)", ++ &server->secmech.hmacsha256, ++ &server->secmech.sdeschmacsha256); ++} + +- if (server->secmech.sdeschmacsha256 != NULL) +- return 0; /* already allocated */ ++static int ++smb3_crypto_shash_allocate(struct TCP_Server_Info *server) ++{ ++ struct cifs_secmech *p = &server->secmech; ++ int rc; + +- server->secmech.hmacsha256 = crypto_alloc_shash("hmac(sha256)", 0, 0); +- if (IS_ERR(server->secmech.hmacsha256)) { +- cifs_dbg(VFS, "could not allocate crypto hmacsha256\n"); +- rc = PTR_ERR(server->secmech.hmacsha256); +- server->secmech.hmacsha256 = NULL; +- return rc; +- } ++ rc = cifs_alloc_hash("hmac(sha256)", ++ &p->hmacsha256, ++ &p->sdeschmacsha256); ++ if (rc) ++ goto err; + +- size = sizeof(struct shash_desc) + +- crypto_shash_descsize(server->secmech.hmacsha256); +- server->secmech.sdeschmacsha256 = kmalloc(size, GFP_KERNEL); +- if (!server->secmech.sdeschmacsha256) { +- crypto_free_shash(server->secmech.hmacsha256); +- server->secmech.hmacsha256 = NULL; +- return -ENOMEM; +- } +- server->secmech.sdeschmacsha256->shash.tfm = server->secmech.hmacsha256; +- server->secmech.sdeschmacsha256->shash.flags = 0x0; ++ rc = cifs_alloc_hash("cmac(aes)", &p->cmacaes, &p->sdesccmacaes); ++ if (rc) ++ goto err; + + return 0; ++err: ++ cifs_free_hash(&p->hmacsha256, &p->sdeschmacsha256); ++ return rc; + } + +-static int +-smb3_crypto_shash_allocate(struct TCP_Server_Info *server) ++#ifdef CONFIG_CIFS_SMB311 ++int ++smb311_crypto_shash_allocate(struct TCP_Server_Info *server) + { +- unsigned int size; +- int rc; +- +- if (server->secmech.sdesccmacaes != NULL) +- return 0; /* already allocated */ ++ struct cifs_secmech *p = &server->secmech; ++ int rc = 0; + +- rc = smb2_crypto_shash_allocate(server); ++ rc = cifs_alloc_hash("hmac(sha256)", ++ &p->hmacsha256, ++ &p->sdeschmacsha256); + if (rc) + return rc; + +- server->secmech.cmacaes = crypto_alloc_shash("cmac(aes)", 0, 0); +- if (IS_ERR(server->secmech.cmacaes)) { +- cifs_dbg(VFS, "could not allocate crypto cmac-aes"); +- kfree(server->secmech.sdeschmacsha256); +- server->secmech.sdeschmacsha256 = NULL; +- crypto_free_shash(server->secmech.hmacsha256); +- server->secmech.hmacsha256 = NULL; +- rc = PTR_ERR(server->secmech.cmacaes); +- server->secmech.cmacaes = NULL; +- return rc; +- } ++ rc = cifs_alloc_hash("cmac(aes)", &p->cmacaes, &p->sdesccmacaes); ++ if (rc) ++ goto err; + +- size = sizeof(struct shash_desc) + +- crypto_shash_descsize(server->secmech.cmacaes); +- server->secmech.sdesccmacaes = kmalloc(size, GFP_KERNEL); +- if (!server->secmech.sdesccmacaes) { +- cifs_dbg(VFS, "%s: Can't alloc cmacaes\n", __func__); +- kfree(server->secmech.sdeschmacsha256); +- server->secmech.sdeschmacsha256 = NULL; +- crypto_free_shash(server->secmech.hmacsha256); +- crypto_free_shash(server->secmech.cmacaes); +- server->secmech.hmacsha256 = NULL; +- server->secmech.cmacaes = NULL; +- return -ENOMEM; +- } +- server->secmech.sdesccmacaes->shash.tfm = server->secmech.cmacaes; +- server->secmech.sdesccmacaes->shash.flags = 0x0; ++ rc = cifs_alloc_hash("sha512", &p->sha512, &p->sdescsha512); ++ if (rc) ++ goto err; + + return 0; ++ ++err: ++ cifs_free_hash(&p->cmacaes, &p->sdesccmacaes); ++ cifs_free_hash(&p->hmacsha256, &p->sdeschmacsha256); ++ return rc; + } ++#endif + + static struct cifs_ses * + smb2_find_smb_ses_unlocked(struct TCP_Server_Info *server, __u64 ses_id) +@@ -457,7 +442,7 @@ smb3_calc_signature(struct smb_rqst *rqst, struct TCP_Server_Info *server) + cifs_dbg(VFS, "%s: Could not init cmac aes\n", __func__); + return rc; + } +- ++ + rc = __cifs_calc_signature(rqst, server, sigptr, + &server->secmech.sdesccmacaes->shash); + +diff --git a/fs/cifs/smbdirect.c b/fs/cifs/smbdirect.c +index 91710eb571fb..52cccdbb7e14 100644 +--- a/fs/cifs/smbdirect.c ++++ b/fs/cifs/smbdirect.c +@@ -862,6 +862,8 @@ static int smbd_post_send_negotiate_req(struct smbd_connection *info) + ib_dma_unmap_single(info->id->device, request->sge[0].addr, + request->sge[0].length, DMA_TO_DEVICE); + ++ smbd_disconnect_rdma_connection(info); ++ + dma_mapping_failed: + mempool_free(request, info->request_mempool); + return rc; +@@ -1061,6 +1063,7 @@ static int smbd_post_send(struct smbd_connection *info, + if (atomic_dec_and_test(&info->send_pending)) + wake_up(&info->wait_send_pending); + } ++ smbd_disconnect_rdma_connection(info); + } else + /* Reset timer for idle connection after packet is sent */ + mod_delayed_work(info->workqueue, &info->idle_timer_work, +@@ -1202,7 +1205,7 @@ static int smbd_post_recv( + if (rc) { + ib_dma_unmap_single(info->id->device, response->sge.addr, + response->sge.length, DMA_FROM_DEVICE); +- ++ smbd_disconnect_rdma_connection(info); + log_rdma_recv(ERR, "ib_post_recv failed rc=%d\n", rc); + } + +@@ -1498,8 +1501,8 @@ int smbd_reconnect(struct TCP_Server_Info *server) + log_rdma_event(INFO, "reconnecting rdma session\n"); + + if (!server->smbd_conn) { +- log_rdma_event(ERR, "rdma session already destroyed\n"); +- return -EINVAL; ++ log_rdma_event(INFO, "rdma session already destroyed\n"); ++ goto create_conn; + } + + /* +@@ -1512,15 +1515,19 @@ int smbd_reconnect(struct TCP_Server_Info *server) + } + + /* wait until the transport is destroyed */ +- wait_event(server->smbd_conn->wait_destroy, +- server->smbd_conn->transport_status == SMBD_DESTROYED); ++ if (!wait_event_timeout(server->smbd_conn->wait_destroy, ++ server->smbd_conn->transport_status == SMBD_DESTROYED, 5*HZ)) ++ return -EAGAIN; + + destroy_workqueue(server->smbd_conn->workqueue); + kfree(server->smbd_conn); + ++create_conn: + log_rdma_event(INFO, "creating rdma session\n"); + server->smbd_conn = smbd_get_connection( + server, (struct sockaddr *) &server->dstaddr); ++ log_rdma_event(INFO, "created rdma session info=%p\n", ++ server->smbd_conn); + + return server->smbd_conn ? 0 : -ENOENT; + } +@@ -2542,6 +2549,8 @@ struct smbd_mr *smbd_register_mr( + if (atomic_dec_and_test(&info->mr_used_count)) + wake_up(&info->wait_for_mr_cleanup); + ++ smbd_disconnect_rdma_connection(info); ++ + return NULL; + } + +diff --git a/fs/cifs/smbencrypt.c b/fs/cifs/smbencrypt.c +index c12bffefa3c9..a0b80ac651a6 100644 +--- a/fs/cifs/smbencrypt.c ++++ b/fs/cifs/smbencrypt.c +@@ -121,25 +121,12 @@ int + mdfour(unsigned char *md4_hash, unsigned char *link_str, int link_len) + { + int rc; +- unsigned int size; +- struct crypto_shash *md4; +- struct sdesc *sdescmd4; +- +- md4 = crypto_alloc_shash("md4", 0, 0); +- if (IS_ERR(md4)) { +- rc = PTR_ERR(md4); +- cifs_dbg(VFS, "%s: Crypto md4 allocation error %d\n", +- __func__, rc); +- return rc; +- } +- size = sizeof(struct shash_desc) + crypto_shash_descsize(md4); +- sdescmd4 = kmalloc(size, GFP_KERNEL); +- if (!sdescmd4) { +- rc = -ENOMEM; ++ struct crypto_shash *md4 = NULL; ++ struct sdesc *sdescmd4 = NULL; ++ ++ rc = cifs_alloc_hash("md4", &md4, &sdescmd4); ++ if (rc) + goto mdfour_err; +- } +- sdescmd4->shash.tfm = md4; +- sdescmd4->shash.flags = 0x0; + + rc = crypto_shash_init(&sdescmd4->shash); + if (rc) { +@@ -156,9 +143,7 @@ mdfour(unsigned char *md4_hash, unsigned char *link_str, int link_len) + cifs_dbg(VFS, "%s: Could not generate md4 hash\n", __func__); + + mdfour_err: +- crypto_free_shash(md4); +- kfree(sdescmd4); +- ++ cifs_free_hash(&md4, &sdescmd4); + return rc; + } + +diff --git a/fs/cifs/transport.c b/fs/cifs/transport.c +index 9779b3292d8e..665661464067 100644 +--- a/fs/cifs/transport.c ++++ b/fs/cifs/transport.c +@@ -37,6 +37,7 @@ + #include "cifsglob.h" + #include "cifsproto.h" + #include "cifs_debug.h" ++#include "smb2proto.h" + #include "smbdirect.h" + + /* Max number of iovectors we can use off the stack when sending requests. */ +@@ -751,6 +752,12 @@ cifs_send_recv(const unsigned int xid, struct cifs_ses *ses, + if (rc < 0) + goto out; + ++#ifdef CONFIG_CIFS_SMB311 ++ if (ses->status == CifsNew) ++ smb311_update_preauth_hash(ses, rqst->rq_iov+1, ++ rqst->rq_nvec-1); ++#endif ++ + if (timeout == CIFS_ASYNC_OP) + goto out; + +@@ -789,6 +796,16 @@ cifs_send_recv(const unsigned int xid, struct cifs_ses *ses, + else + *resp_buf_type = CIFS_SMALL_BUFFER; + ++#ifdef CONFIG_CIFS_SMB311 ++ if (ses->status == CifsNew) { ++ struct kvec iov = { ++ .iov_base = buf + 4, ++ .iov_len = get_rfc1002_length(buf) ++ }; ++ smb311_update_preauth_hash(ses, &iov, 1); ++ } ++#endif ++ + credits = ses->server->ops->get_credits(midQ); + + rc = ses->server->ops->check_receive(midQ, ses->server, +diff --git a/fs/ext4/balloc.c b/fs/ext4/balloc.c +index f9b3e0a83526..f82c4966f4ce 100644 +--- a/fs/ext4/balloc.c ++++ b/fs/ext4/balloc.c +@@ -243,8 +243,6 @@ static int ext4_init_block_bitmap(struct super_block *sb, + */ + ext4_mark_bitmap_end(num_clusters_in_group(sb, block_group), + sb->s_blocksize * 8, bh->b_data); +- ext4_block_bitmap_csum_set(sb, block_group, gdp, bh); +- ext4_group_desc_csum_set(sb, block_group, gdp); + return 0; + } + +@@ -448,6 +446,7 @@ ext4_read_block_bitmap_nowait(struct super_block *sb, ext4_group_t block_group) + err = ext4_init_block_bitmap(sb, bh, block_group, desc); + set_bitmap_uptodate(bh); + set_buffer_uptodate(bh); ++ set_buffer_verified(bh); + ext4_unlock_group(sb, block_group); + unlock_buffer(bh); + if (err) { +diff --git a/fs/ext4/dir.c b/fs/ext4/dir.c +index da87cf757f7d..e2902d394f1b 100644 +--- a/fs/ext4/dir.c ++++ b/fs/ext4/dir.c +@@ -365,13 +365,15 @@ static loff_t ext4_dir_llseek(struct file *file, loff_t offset, int whence) + { + struct inode *inode = file->f_mapping->host; + int dx_dir = is_dx_dir(inode); +- loff_t htree_max = ext4_get_htree_eof(file); ++ loff_t ret, htree_max = ext4_get_htree_eof(file); + + if (likely(dx_dir)) +- return generic_file_llseek_size(file, offset, whence, ++ ret = generic_file_llseek_size(file, offset, whence, + htree_max, htree_max); + else +- return ext4_llseek(file, offset, whence); ++ ret = ext4_llseek(file, offset, whence); ++ file->f_version = inode_peek_iversion(inode) - 1; ++ return ret; + } + + /* +diff --git a/fs/ext4/ext4_jbd2.c b/fs/ext4/ext4_jbd2.c +index 2d593201cf7a..7c70b08d104c 100644 +--- a/fs/ext4/ext4_jbd2.c ++++ b/fs/ext4/ext4_jbd2.c +@@ -166,13 +166,6 @@ int __ext4_journal_get_write_access(const char *where, unsigned int line, + might_sleep(); + + if (ext4_handle_valid(handle)) { +- struct super_block *sb; +- +- sb = handle->h_transaction->t_journal->j_private; +- if (unlikely(ext4_forced_shutdown(EXT4_SB(sb)))) { +- jbd2_journal_abort_handle(handle); +- return -EIO; +- } + err = jbd2_journal_get_write_access(handle, bh); + if (err) + ext4_journal_abort_handle(where, line, __func__, bh, +diff --git a/fs/ext4/ialloc.c b/fs/ext4/ialloc.c +index 7830d28df331..3fa93665b4a3 100644 +--- a/fs/ext4/ialloc.c ++++ b/fs/ext4/ialloc.c +@@ -66,44 +66,6 @@ void ext4_mark_bitmap_end(int start_bit, int end_bit, char *bitmap) + memset(bitmap + (i >> 3), 0xff, (end_bit - i) >> 3); + } + +-/* Initializes an uninitialized inode bitmap */ +-static int ext4_init_inode_bitmap(struct super_block *sb, +- struct buffer_head *bh, +- ext4_group_t block_group, +- struct ext4_group_desc *gdp) +-{ +- struct ext4_group_info *grp; +- struct ext4_sb_info *sbi = EXT4_SB(sb); +- J_ASSERT_BH(bh, buffer_locked(bh)); +- +- /* If checksum is bad mark all blocks and inodes use to prevent +- * allocation, essentially implementing a per-group read-only flag. */ +- if (!ext4_group_desc_csum_verify(sb, block_group, gdp)) { +- grp = ext4_get_group_info(sb, block_group); +- if (!EXT4_MB_GRP_BBITMAP_CORRUPT(grp)) +- percpu_counter_sub(&sbi->s_freeclusters_counter, +- grp->bb_free); +- set_bit(EXT4_GROUP_INFO_BBITMAP_CORRUPT_BIT, &grp->bb_state); +- if (!EXT4_MB_GRP_IBITMAP_CORRUPT(grp)) { +- int count; +- count = ext4_free_inodes_count(sb, gdp); +- percpu_counter_sub(&sbi->s_freeinodes_counter, +- count); +- } +- set_bit(EXT4_GROUP_INFO_IBITMAP_CORRUPT_BIT, &grp->bb_state); +- return -EFSBADCRC; +- } +- +- memset(bh->b_data, 0, (EXT4_INODES_PER_GROUP(sb) + 7) / 8); +- ext4_mark_bitmap_end(EXT4_INODES_PER_GROUP(sb), sb->s_blocksize * 8, +- bh->b_data); +- ext4_inode_bitmap_csum_set(sb, block_group, gdp, bh, +- EXT4_INODES_PER_GROUP(sb) / 8); +- ext4_group_desc_csum_set(sb, block_group, gdp); +- +- return 0; +-} +- + void ext4_end_bitmap_read(struct buffer_head *bh, int uptodate) + { + if (uptodate) { +@@ -187,17 +149,14 @@ ext4_read_inode_bitmap(struct super_block *sb, ext4_group_t block_group) + + ext4_lock_group(sb, block_group); + if (desc->bg_flags & cpu_to_le16(EXT4_BG_INODE_UNINIT)) { +- err = ext4_init_inode_bitmap(sb, bh, block_group, desc); ++ memset(bh->b_data, 0, (EXT4_INODES_PER_GROUP(sb) + 7) / 8); ++ ext4_mark_bitmap_end(EXT4_INODES_PER_GROUP(sb), ++ sb->s_blocksize * 8, bh->b_data); + set_bitmap_uptodate(bh); + set_buffer_uptodate(bh); + set_buffer_verified(bh); + ext4_unlock_group(sb, block_group); + unlock_buffer(bh); +- if (err) { +- ext4_error(sb, "Failed to init inode bitmap for group " +- "%u: %d", block_group, err); +- goto out; +- } + return bh; + } + ext4_unlock_group(sb, block_group); +diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c +index c94780075b04..3350454fc5a7 100644 +--- a/fs/ext4/inode.c ++++ b/fs/ext4/inode.c +@@ -3524,7 +3524,7 @@ static int ext4_iomap_begin(struct inode *inode, loff_t offset, loff_t length, + iomap->flags |= IOMAP_F_DIRTY; + iomap->bdev = inode->i_sb->s_bdev; + iomap->dax_dev = sbi->s_daxdev; +- iomap->offset = first_block << blkbits; ++ iomap->offset = (u64)first_block << blkbits; + iomap->length = (u64)map.m_len << blkbits; + + if (ret == 0) { +@@ -3658,7 +3658,6 @@ static ssize_t ext4_direct_IO_write(struct kiocb *iocb, struct iov_iter *iter) + { + struct file *file = iocb->ki_filp; + struct inode *inode = file->f_mapping->host; +- struct ext4_inode_info *ei = EXT4_I(inode); + ssize_t ret; + loff_t offset = iocb->ki_pos; + size_t count = iov_iter_count(iter); +@@ -3682,7 +3681,7 @@ static ssize_t ext4_direct_IO_write(struct kiocb *iocb, struct iov_iter *iter) + goto out; + } + orphan = 1; +- ei->i_disksize = inode->i_size; ++ ext4_update_i_disksize(inode, inode->i_size); + ext4_journal_stop(handle); + } + +@@ -3790,7 +3789,7 @@ static ssize_t ext4_direct_IO_write(struct kiocb *iocb, struct iov_iter *iter) + if (ret > 0) { + loff_t end = offset + ret; + if (end > inode->i_size) { +- ei->i_disksize = end; ++ ext4_update_i_disksize(inode, end); + i_size_write(inode, end); + /* + * We're going to return a positive `ret' +@@ -4746,6 +4745,12 @@ struct inode *ext4_iget(struct super_block *sb, unsigned long ino) + goto bad_inode; + raw_inode = ext4_raw_inode(&iloc); + ++ if ((ino == EXT4_ROOT_INO) && (raw_inode->i_links_count == 0)) { ++ EXT4_ERROR_INODE(inode, "root inode unallocated"); ++ ret = -EFSCORRUPTED; ++ goto bad_inode; ++ } ++ + if (EXT4_INODE_SIZE(inode->i_sb) > EXT4_GOOD_OLD_INODE_SIZE) { + ei->i_extra_isize = le16_to_cpu(raw_inode->i_extra_isize); + if (EXT4_GOOD_OLD_INODE_SIZE + ei->i_extra_isize > +diff --git a/fs/ext4/ioctl.c b/fs/ext4/ioctl.c +index 7e99ad02f1ba..be8d78472ef8 100644 +--- a/fs/ext4/ioctl.c ++++ b/fs/ext4/ioctl.c +@@ -492,15 +492,13 @@ static int ext4_shutdown(struct super_block *sb, unsigned long arg) + set_bit(EXT4_FLAGS_SHUTDOWN, &sbi->s_ext4_flags); + if (sbi->s_journal && !is_journal_aborted(sbi->s_journal)) { + (void) ext4_force_commit(sb); +- jbd2_journal_abort(sbi->s_journal, 0); ++ jbd2_journal_abort(sbi->s_journal, -ESHUTDOWN); + } + break; + case EXT4_GOING_FLAGS_NOLOGFLUSH: + set_bit(EXT4_FLAGS_SHUTDOWN, &sbi->s_ext4_flags); +- if (sbi->s_journal && !is_journal_aborted(sbi->s_journal)) { +- msleep(100); +- jbd2_journal_abort(sbi->s_journal, 0); +- } ++ if (sbi->s_journal && !is_journal_aborted(sbi->s_journal)) ++ jbd2_journal_abort(sbi->s_journal, -ESHUTDOWN); + break; + default: + return -EINVAL; +diff --git a/fs/ext4/super.c b/fs/ext4/super.c +index 39bf464c35f1..192c5ad09d71 100644 +--- a/fs/ext4/super.c ++++ b/fs/ext4/super.c +@@ -2333,6 +2333,8 @@ static int ext4_check_descriptors(struct super_block *sb, + ext4_msg(sb, KERN_ERR, "ext4_check_descriptors: " + "Block bitmap for group %u overlaps " + "superblock", i); ++ if (!sb_rdonly(sb)) ++ return 0; + } + if (block_bitmap < first_block || block_bitmap > last_block) { + ext4_msg(sb, KERN_ERR, "ext4_check_descriptors: " +@@ -2345,6 +2347,8 @@ static int ext4_check_descriptors(struct super_block *sb, + ext4_msg(sb, KERN_ERR, "ext4_check_descriptors: " + "Inode bitmap for group %u overlaps " + "superblock", i); ++ if (!sb_rdonly(sb)) ++ return 0; + } + if (inode_bitmap < first_block || inode_bitmap > last_block) { + ext4_msg(sb, KERN_ERR, "ext4_check_descriptors: " +@@ -2357,6 +2361,8 @@ static int ext4_check_descriptors(struct super_block *sb, + ext4_msg(sb, KERN_ERR, "ext4_check_descriptors: " + "Inode table for group %u overlaps " + "superblock", i); ++ if (!sb_rdonly(sb)) ++ return 0; + } + if (inode_table < first_block || + inode_table + sbi->s_itb_per_group - 1 > last_block) { +@@ -3490,15 +3496,12 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent) + } + + /* Load the checksum driver */ +- if (ext4_has_feature_metadata_csum(sb) || +- ext4_has_feature_ea_inode(sb)) { +- sbi->s_chksum_driver = crypto_alloc_shash("crc32c", 0, 0); +- if (IS_ERR(sbi->s_chksum_driver)) { +- ext4_msg(sb, KERN_ERR, "Cannot load crc32c driver."); +- ret = PTR_ERR(sbi->s_chksum_driver); +- sbi->s_chksum_driver = NULL; +- goto failed_mount; +- } ++ sbi->s_chksum_driver = crypto_alloc_shash("crc32c", 0, 0); ++ if (IS_ERR(sbi->s_chksum_driver)) { ++ ext4_msg(sb, KERN_ERR, "Cannot load crc32c driver."); ++ ret = PTR_ERR(sbi->s_chksum_driver); ++ sbi->s_chksum_driver = NULL; ++ goto failed_mount; + } + + /* Check superblock checksum */ +diff --git a/fs/ext4/xattr.c b/fs/ext4/xattr.c +index 63656dbafdc4..499cb4b1fbd2 100644 +--- a/fs/ext4/xattr.c ++++ b/fs/ext4/xattr.c +@@ -195,10 +195,13 @@ ext4_xattr_check_entries(struct ext4_xattr_entry *entry, void *end, + + /* Check the values */ + while (!IS_LAST_ENTRY(entry)) { +- if (entry->e_value_size != 0 && +- entry->e_value_inum == 0) { ++ u32 size = le32_to_cpu(entry->e_value_size); ++ ++ if (size > EXT4_XATTR_SIZE_MAX) ++ return -EFSCORRUPTED; ++ ++ if (size != 0 && entry->e_value_inum == 0) { + u16 offs = le16_to_cpu(entry->e_value_offs); +- u32 size = le32_to_cpu(entry->e_value_size); + void *value; + + /* +@@ -222,25 +225,36 @@ ext4_xattr_check_entries(struct ext4_xattr_entry *entry, void *end, + } + + static inline int +-ext4_xattr_check_block(struct inode *inode, struct buffer_head *bh) ++__ext4_xattr_check_block(struct inode *inode, struct buffer_head *bh, ++ const char *function, unsigned int line) + { +- int error; ++ int error = -EFSCORRUPTED; + + if (buffer_verified(bh)) + return 0; + + if (BHDR(bh)->h_magic != cpu_to_le32(EXT4_XATTR_MAGIC) || + BHDR(bh)->h_blocks != cpu_to_le32(1)) +- return -EFSCORRUPTED; ++ goto errout; ++ error = -EFSBADCRC; + if (!ext4_xattr_block_csum_verify(inode, bh)) +- return -EFSBADCRC; ++ goto errout; + error = ext4_xattr_check_entries(BFIRST(bh), bh->b_data + bh->b_size, + bh->b_data); +- if (!error) ++errout: ++ if (error) ++ __ext4_error_inode(inode, function, line, 0, ++ "corrupted xattr block %llu", ++ (unsigned long long) bh->b_blocknr); ++ else + set_buffer_verified(bh); + return error; + } + ++#define ext4_xattr_check_block(inode, bh) \ ++ __ext4_xattr_check_block((inode), (bh), __func__, __LINE__) ++ ++ + static int + __xattr_check_inode(struct inode *inode, struct ext4_xattr_ibody_header *header, + void *end, const char *function, unsigned int line) +@@ -262,18 +276,22 @@ __xattr_check_inode(struct inode *inode, struct ext4_xattr_ibody_header *header, + __xattr_check_inode((inode), (header), (end), __func__, __LINE__) + + static int +-ext4_xattr_find_entry(struct ext4_xattr_entry **pentry, int name_index, +- const char *name, int sorted) ++xattr_find_entry(struct inode *inode, struct ext4_xattr_entry **pentry, ++ void *end, int name_index, const char *name, int sorted) + { +- struct ext4_xattr_entry *entry; ++ struct ext4_xattr_entry *entry, *next; + size_t name_len; + int cmp = 1; + + if (name == NULL) + return -EINVAL; + name_len = strlen(name); +- entry = *pentry; +- for (; !IS_LAST_ENTRY(entry); entry = EXT4_XATTR_NEXT(entry)) { ++ for (entry = *pentry; !IS_LAST_ENTRY(entry); entry = next) { ++ next = EXT4_XATTR_NEXT(entry); ++ if ((void *) next >= end) { ++ EXT4_ERROR_INODE(inode, "corrupted xattr entries"); ++ return -EFSCORRUPTED; ++ } + cmp = name_index - entry->e_name_index; + if (!cmp) + cmp = name_len - entry->e_name_len; +@@ -495,6 +513,7 @@ ext4_xattr_block_get(struct inode *inode, int name_index, const char *name, + struct buffer_head *bh = NULL; + struct ext4_xattr_entry *entry; + size_t size; ++ void *end; + int error; + struct mb_cache *ea_block_cache = EA_BLOCK_CACHE(inode); + +@@ -511,20 +530,20 @@ ext4_xattr_block_get(struct inode *inode, int name_index, const char *name, + goto cleanup; + ea_bdebug(bh, "b_count=%d, refcount=%d", + atomic_read(&(bh->b_count)), le32_to_cpu(BHDR(bh)->h_refcount)); +- if (ext4_xattr_check_block(inode, bh)) { +- EXT4_ERROR_INODE(inode, "bad block %llu", +- EXT4_I(inode)->i_file_acl); +- error = -EFSCORRUPTED; ++ error = ext4_xattr_check_block(inode, bh); ++ if (error) + goto cleanup; +- } + ext4_xattr_block_cache_insert(ea_block_cache, bh); + entry = BFIRST(bh); +- error = ext4_xattr_find_entry(&entry, name_index, name, 1); ++ end = bh->b_data + bh->b_size; ++ error = xattr_find_entry(inode, &entry, end, name_index, name, 1); + if (error) + goto cleanup; + size = le32_to_cpu(entry->e_value_size); ++ error = -ERANGE; ++ if (unlikely(size > EXT4_XATTR_SIZE_MAX)) ++ goto cleanup; + if (buffer) { +- error = -ERANGE; + if (size > buffer_size) + goto cleanup; + if (entry->e_value_inum) { +@@ -533,8 +552,12 @@ ext4_xattr_block_get(struct inode *inode, int name_index, const char *name, + if (error) + goto cleanup; + } else { +- memcpy(buffer, bh->b_data + +- le16_to_cpu(entry->e_value_offs), size); ++ u16 offset = le16_to_cpu(entry->e_value_offs); ++ void *p = bh->b_data + offset; ++ ++ if (unlikely(p + size > end)) ++ goto cleanup; ++ memcpy(buffer, p, size); + } + } + error = size; +@@ -568,12 +591,14 @@ ext4_xattr_ibody_get(struct inode *inode, int name_index, const char *name, + if (error) + goto cleanup; + entry = IFIRST(header); +- error = ext4_xattr_find_entry(&entry, name_index, name, 0); ++ error = xattr_find_entry(inode, &entry, end, name_index, name, 0); + if (error) + goto cleanup; + size = le32_to_cpu(entry->e_value_size); ++ error = -ERANGE; ++ if (unlikely(size > EXT4_XATTR_SIZE_MAX)) ++ goto cleanup; + if (buffer) { +- error = -ERANGE; + if (size > buffer_size) + goto cleanup; + if (entry->e_value_inum) { +@@ -582,8 +607,12 @@ ext4_xattr_ibody_get(struct inode *inode, int name_index, const char *name, + if (error) + goto cleanup; + } else { +- memcpy(buffer, (void *)IFIRST(header) + +- le16_to_cpu(entry->e_value_offs), size); ++ u16 offset = le16_to_cpu(entry->e_value_offs); ++ void *p = (void *)IFIRST(header) + offset; ++ ++ if (unlikely(p + size > end)) ++ goto cleanup; ++ memcpy(buffer, p, size); + } + } + error = size; +@@ -676,12 +705,9 @@ ext4_xattr_block_list(struct dentry *dentry, char *buffer, size_t buffer_size) + goto cleanup; + ea_bdebug(bh, "b_count=%d, refcount=%d", + atomic_read(&(bh->b_count)), le32_to_cpu(BHDR(bh)->h_refcount)); +- if (ext4_xattr_check_block(inode, bh)) { +- EXT4_ERROR_INODE(inode, "bad block %llu", +- EXT4_I(inode)->i_file_acl); +- error = -EFSCORRUPTED; ++ error = ext4_xattr_check_block(inode, bh); ++ if (error) + goto cleanup; +- } + ext4_xattr_block_cache_insert(EA_BLOCK_CACHE(inode), bh); + error = ext4_xattr_list_entries(dentry, BFIRST(bh), buffer, buffer_size); + +@@ -808,10 +834,9 @@ int ext4_get_inode_usage(struct inode *inode, qsize_t *usage) + goto out; + } + +- if (ext4_xattr_check_block(inode, bh)) { +- ret = -EFSCORRUPTED; ++ ret = ext4_xattr_check_block(inode, bh); ++ if (ret) + goto out; +- } + + for (entry = BFIRST(bh); !IS_LAST_ENTRY(entry); + entry = EXT4_XATTR_NEXT(entry)) +@@ -1793,19 +1818,16 @@ ext4_xattr_block_find(struct inode *inode, struct ext4_xattr_info *i, + ea_bdebug(bs->bh, "b_count=%d, refcount=%d", + atomic_read(&(bs->bh->b_count)), + le32_to_cpu(BHDR(bs->bh)->h_refcount)); +- if (ext4_xattr_check_block(inode, bs->bh)) { +- EXT4_ERROR_INODE(inode, "bad block %llu", +- EXT4_I(inode)->i_file_acl); +- error = -EFSCORRUPTED; ++ error = ext4_xattr_check_block(inode, bs->bh); ++ if (error) + goto cleanup; +- } + /* Find the named attribute. */ + bs->s.base = BHDR(bs->bh); + bs->s.first = BFIRST(bs->bh); + bs->s.end = bs->bh->b_data + bs->bh->b_size; + bs->s.here = bs->s.first; +- error = ext4_xattr_find_entry(&bs->s.here, i->name_index, +- i->name, 1); ++ error = xattr_find_entry(inode, &bs->s.here, bs->s.end, ++ i->name_index, i->name, 1); + if (error && error != -ENODATA) + goto cleanup; + bs->s.not_found = error; +@@ -2164,8 +2186,8 @@ int ext4_xattr_ibody_find(struct inode *inode, struct ext4_xattr_info *i, + if (error) + return error; + /* Find the named attribute. */ +- error = ext4_xattr_find_entry(&is->s.here, i->name_index, +- i->name, 0); ++ error = xattr_find_entry(inode, &is->s.here, is->s.end, ++ i->name_index, i->name, 0); + if (error && error != -ENODATA) + return error; + is->s.not_found = error; +@@ -2721,13 +2743,9 @@ int ext4_expand_extra_isize_ea(struct inode *inode, int new_extra_isize, + error = -EIO; + if (!bh) + goto cleanup; +- if (ext4_xattr_check_block(inode, bh)) { +- EXT4_ERROR_INODE(inode, "bad block %llu", +- EXT4_I(inode)->i_file_acl); +- error = -EFSCORRUPTED; +- brelse(bh); ++ error = ext4_xattr_check_block(inode, bh); ++ if (error) + goto cleanup; +- } + base = BHDR(bh); + end = bh->b_data + bh->b_size; + min_offs = end - base; +@@ -2884,11 +2902,8 @@ int ext4_xattr_delete_inode(handle_t *handle, struct inode *inode, + goto cleanup; + } + error = ext4_xattr_check_block(inode, bh); +- if (error) { +- EXT4_ERROR_INODE(inode, "bad block %llu (error %d)", +- EXT4_I(inode)->i_file_acl, error); ++ if (error) + goto cleanup; +- } + + if (ext4_has_feature_ea_inode(inode->i_sb)) { + for (entry = BFIRST(bh); !IS_LAST_ENTRY(entry); +diff --git a/fs/ext4/xattr.h b/fs/ext4/xattr.h +index dd54c4f995c8..f39cad2abe2a 100644 +--- a/fs/ext4/xattr.h ++++ b/fs/ext4/xattr.h +@@ -70,6 +70,17 @@ struct ext4_xattr_entry { + EXT4_I(inode)->i_extra_isize)) + #define IFIRST(hdr) ((struct ext4_xattr_entry *)((hdr)+1)) + ++/* ++ * XATTR_SIZE_MAX is currently 64k, but for the purposes of checking ++ * for file system consistency errors, we use a somewhat bigger value. ++ * This allows XATTR_SIZE_MAX to grow in the future, but by using this ++ * instead of INT_MAX for certain consistency checks, we don't need to ++ * worry about arithmetic overflows. (Actually XATTR_SIZE_MAX is ++ * defined in include/uapi/linux/limits.h, so changing it is going ++ * not going to be trivial....) ++ */ ++#define EXT4_XATTR_SIZE_MAX (1 << 24) ++ + /* + * The minimum size of EA value when you start storing it in an external inode + * size of block - size of header - size of 1 entry - 4 null bytes +diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c +index d4d04fee568a..40c34a0ef58a 100644 +--- a/fs/fs-writeback.c ++++ b/fs/fs-writeback.c +@@ -745,11 +745,12 @@ int inode_congested(struct inode *inode, int cong_bits) + */ + if (inode && inode_to_wb_is_valid(inode)) { + struct bdi_writeback *wb; +- bool locked, congested; ++ struct wb_lock_cookie lock_cookie = {}; ++ bool congested; + +- wb = unlocked_inode_to_wb_begin(inode, &locked); ++ wb = unlocked_inode_to_wb_begin(inode, &lock_cookie); + congested = wb_congested(wb, cong_bits); +- unlocked_inode_to_wb_end(inode, locked); ++ unlocked_inode_to_wb_end(inode, &lock_cookie); + return congested; + } + +diff --git a/fs/jbd2/journal.c b/fs/jbd2/journal.c +index 3fbf48ec2188..dfb057900e79 100644 +--- a/fs/jbd2/journal.c ++++ b/fs/jbd2/journal.c +@@ -974,7 +974,7 @@ int __jbd2_update_log_tail(journal_t *journal, tid_t tid, unsigned long block) + } + + /* +- * This is a variaon of __jbd2_update_log_tail which checks for validity of ++ * This is a variation of __jbd2_update_log_tail which checks for validity of + * provided log tail and locks j_checkpoint_mutex. So it is safe against races + * with other threads updating log tail. + */ +@@ -1417,6 +1417,9 @@ int jbd2_journal_update_sb_log_tail(journal_t *journal, tid_t tail_tid, + journal_superblock_t *sb = journal->j_superblock; + int ret; + ++ if (is_journal_aborted(journal)) ++ return -EIO; ++ + BUG_ON(!mutex_is_locked(&journal->j_checkpoint_mutex)); + jbd_debug(1, "JBD2: updating superblock (start %lu, seq %u)\n", + tail_block, tail_tid); +@@ -1483,12 +1486,15 @@ static void jbd2_mark_journal_empty(journal_t *journal, int write_op) + void jbd2_journal_update_sb_errno(journal_t *journal) + { + journal_superblock_t *sb = journal->j_superblock; ++ int errcode; + + read_lock(&journal->j_state_lock); +- jbd_debug(1, "JBD2: updating superblock error (errno %d)\n", +- journal->j_errno); +- sb->s_errno = cpu_to_be32(journal->j_errno); ++ errcode = journal->j_errno; + read_unlock(&journal->j_state_lock); ++ if (errcode == -ESHUTDOWN) ++ errcode = 0; ++ jbd_debug(1, "JBD2: updating superblock error (errno %d)\n", errcode); ++ sb->s_errno = cpu_to_be32(errcode); + + jbd2_write_superblock(journal, REQ_SYNC | REQ_FUA); + } +@@ -2105,12 +2111,22 @@ void __jbd2_journal_abort_hard(journal_t *journal) + * but don't do any other IO. */ + static void __journal_abort_soft (journal_t *journal, int errno) + { +- if (journal->j_flags & JBD2_ABORT) +- return; ++ int old_errno; + +- if (!journal->j_errno) ++ write_lock(&journal->j_state_lock); ++ old_errno = journal->j_errno; ++ if (!journal->j_errno || errno == -ESHUTDOWN) + journal->j_errno = errno; + ++ if (journal->j_flags & JBD2_ABORT) { ++ write_unlock(&journal->j_state_lock); ++ if (!old_errno && old_errno != -ESHUTDOWN && ++ errno == -ESHUTDOWN) ++ jbd2_journal_update_sb_errno(journal); ++ return; ++ } ++ write_unlock(&journal->j_state_lock); ++ + __jbd2_journal_abort_hard(journal); + + if (errno) { +diff --git a/fs/jffs2/super.c b/fs/jffs2/super.c +index f60dee7faf03..87bdf0f4cba1 100644 +--- a/fs/jffs2/super.c ++++ b/fs/jffs2/super.c +@@ -342,7 +342,7 @@ static void jffs2_put_super (struct super_block *sb) + static void jffs2_kill_sb(struct super_block *sb) + { + struct jffs2_sb_info *c = JFFS2_SB_INFO(sb); +- if (!sb_rdonly(sb)) ++ if (c && !sb_rdonly(sb)) + jffs2_stop_garbage_collect_thread(c); + kill_mtd_super(sb); + kfree(c); +diff --git a/fs/namespace.c b/fs/namespace.c +index 9d1374ab6e06..c3ed9dc78655 100644 +--- a/fs/namespace.c ++++ b/fs/namespace.c +@@ -1089,7 +1089,8 @@ static struct mount *clone_mnt(struct mount *old, struct dentry *root, + goto out_free; + } + +- mnt->mnt.mnt_flags = old->mnt.mnt_flags & ~(MNT_WRITE_HOLD|MNT_MARKED); ++ mnt->mnt.mnt_flags = old->mnt.mnt_flags; ++ mnt->mnt.mnt_flags &= ~(MNT_WRITE_HOLD|MNT_MARKED|MNT_INTERNAL); + /* Don't allow unprivileged users to change mount flags */ + if (flag & CL_UNPRIVILEGED) { + mnt->mnt.mnt_flags |= MNT_LOCK_ATIME; +diff --git a/fs/notify/fanotify/fanotify.c b/fs/notify/fanotify/fanotify.c +index 6702a6a0bbb5..e0e6a9d627df 100644 +--- a/fs/notify/fanotify/fanotify.c ++++ b/fs/notify/fanotify/fanotify.c +@@ -92,7 +92,7 @@ static bool fanotify_should_send_event(struct fsnotify_mark *inode_mark, + u32 event_mask, + const void *data, int data_type) + { +- __u32 marks_mask, marks_ignored_mask; ++ __u32 marks_mask = 0, marks_ignored_mask = 0; + const struct path *path = data; + + pr_debug("%s: inode_mark=%p vfsmnt_mark=%p mask=%x data=%p" +@@ -108,24 +108,20 @@ static bool fanotify_should_send_event(struct fsnotify_mark *inode_mark, + !d_can_lookup(path->dentry)) + return false; + +- if (inode_mark && vfsmnt_mark) { +- marks_mask = (vfsmnt_mark->mask | inode_mark->mask); +- marks_ignored_mask = (vfsmnt_mark->ignored_mask | inode_mark->ignored_mask); +- } else if (inode_mark) { +- /* +- * if the event is for a child and this inode doesn't care about +- * events on the child, don't send it! +- */ +- if ((event_mask & FS_EVENT_ON_CHILD) && +- !(inode_mark->mask & FS_EVENT_ON_CHILD)) +- return false; +- marks_mask = inode_mark->mask; +- marks_ignored_mask = inode_mark->ignored_mask; +- } else if (vfsmnt_mark) { +- marks_mask = vfsmnt_mark->mask; +- marks_ignored_mask = vfsmnt_mark->ignored_mask; +- } else { +- BUG(); ++ /* ++ * if the event is for a child and this inode doesn't care about ++ * events on the child, don't send it! ++ */ ++ if (inode_mark && ++ (!(event_mask & FS_EVENT_ON_CHILD) || ++ (inode_mark->mask & FS_EVENT_ON_CHILD))) { ++ marks_mask |= inode_mark->mask; ++ marks_ignored_mask |= inode_mark->ignored_mask; ++ } ++ ++ if (vfsmnt_mark) { ++ marks_mask |= vfsmnt_mark->mask; ++ marks_ignored_mask |= vfsmnt_mark->ignored_mask; + } + + if (d_is_dir(path->dentry) && +diff --git a/fs/orangefs/super.c b/fs/orangefs/super.c +index 3ae5fdba0225..10796d3fe27d 100644 +--- a/fs/orangefs/super.c ++++ b/fs/orangefs/super.c +@@ -579,6 +579,11 @@ void orangefs_kill_sb(struct super_block *sb) + /* provided sb cleanup */ + kill_anon_super(sb); + ++ if (!ORANGEFS_SB(sb)) { ++ mutex_lock(&orangefs_request_mutex); ++ mutex_unlock(&orangefs_request_mutex); ++ return; ++ } + /* + * issue the unmount to userspace to tell it to remove the + * dynamic mount info it has for this superblock +diff --git a/fs/reiserfs/journal.c b/fs/reiserfs/journal.c +index 70057359fbaf..23148c3ed675 100644 +--- a/fs/reiserfs/journal.c ++++ b/fs/reiserfs/journal.c +@@ -2643,7 +2643,7 @@ static int journal_init_dev(struct super_block *super, + if (IS_ERR(journal->j_dev_bd)) { + result = PTR_ERR(journal->j_dev_bd); + journal->j_dev_bd = NULL; +- reiserfs_warning(super, ++ reiserfs_warning(super, "sh-457", + "journal_init_dev: Cannot open '%s': %i", + jdev_name, result); + return result; +diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c +index b16ef162344a..6c397a389105 100644 +--- a/fs/ubifs/super.c ++++ b/fs/ubifs/super.c +@@ -1737,8 +1737,11 @@ static void ubifs_remount_ro(struct ubifs_info *c) + + dbg_save_space_info(c); + +- for (i = 0; i < c->jhead_cnt; i++) +- ubifs_wbuf_sync(&c->jheads[i].wbuf); ++ for (i = 0; i < c->jhead_cnt; i++) { ++ err = ubifs_wbuf_sync(&c->jheads[i].wbuf); ++ if (err) ++ ubifs_ro_mode(c, err); ++ } + + c->mst_node->flags &= ~cpu_to_le32(UBIFS_MST_DIRTY); + c->mst_node->flags |= cpu_to_le32(UBIFS_MST_NO_ORPHS); +@@ -1804,8 +1807,11 @@ static void ubifs_put_super(struct super_block *sb) + int err; + + /* Synchronize write-buffers */ +- for (i = 0; i < c->jhead_cnt; i++) +- ubifs_wbuf_sync(&c->jheads[i].wbuf); ++ for (i = 0; i < c->jhead_cnt; i++) { ++ err = ubifs_wbuf_sync(&c->jheads[i].wbuf); ++ if (err) ++ ubifs_ro_mode(c, err); ++ } + + /* + * We are being cleanly unmounted which means the +diff --git a/fs/udf/unicode.c b/fs/udf/unicode.c +index f897e55f2cd0..16a8ad21b77e 100644 +--- a/fs/udf/unicode.c ++++ b/fs/udf/unicode.c +@@ -28,6 +28,9 @@ + + #include "udf_sb.h" + ++#define SURROGATE_MASK 0xfffff800 ++#define SURROGATE_PAIR 0x0000d800 ++ + static int udf_uni2char_utf8(wchar_t uni, + unsigned char *out, + int boundlen) +@@ -37,6 +40,9 @@ static int udf_uni2char_utf8(wchar_t uni, + if (boundlen <= 0) + return -ENAMETOOLONG; + ++ if ((uni & SURROGATE_MASK) == SURROGATE_PAIR) ++ return -EINVAL; ++ + if (uni < 0x80) { + out[u_len++] = (unsigned char)uni; + } else if (uni < 0x800) { +diff --git a/include/dt-bindings/clock/mt2701-clk.h b/include/dt-bindings/clock/mt2701-clk.h +index 551f7600ab58..24e93dfcee9f 100644 +--- a/include/dt-bindings/clock/mt2701-clk.h ++++ b/include/dt-bindings/clock/mt2701-clk.h +@@ -176,7 +176,8 @@ + #define CLK_TOP_AUD_EXT1 156 + #define CLK_TOP_AUD_EXT2 157 + #define CLK_TOP_NFI1X_PAD 158 +-#define CLK_TOP_NR 159 ++#define CLK_TOP_AXISEL_D4 159 ++#define CLK_TOP_NR 160 + + /* APMIXEDSYS */ + +diff --git a/include/linux/backing-dev-defs.h b/include/linux/backing-dev-defs.h +index bfe86b54f6c1..0bd432a4d7bd 100644 +--- a/include/linux/backing-dev-defs.h ++++ b/include/linux/backing-dev-defs.h +@@ -223,6 +223,11 @@ static inline void set_bdi_congested(struct backing_dev_info *bdi, int sync) + set_wb_congested(bdi->wb.congested, sync); + } + ++struct wb_lock_cookie { ++ bool locked; ++ unsigned long flags; ++}; ++ + #ifdef CONFIG_CGROUP_WRITEBACK + + /** +diff --git a/include/linux/backing-dev.h b/include/linux/backing-dev.h +index 3e4ce54d84ab..82e8b73117d1 100644 +--- a/include/linux/backing-dev.h ++++ b/include/linux/backing-dev.h +@@ -346,7 +346,7 @@ static inline struct bdi_writeback *inode_to_wb(const struct inode *inode) + /** + * unlocked_inode_to_wb_begin - begin unlocked inode wb access transaction + * @inode: target inode +- * @lockedp: temp bool output param, to be passed to the end function ++ * @cookie: output param, to be passed to the end function + * + * The caller wants to access the wb associated with @inode but isn't + * holding inode->i_lock, mapping->tree_lock or wb->list_lock. This +@@ -354,12 +354,12 @@ static inline struct bdi_writeback *inode_to_wb(const struct inode *inode) + * association doesn't change until the transaction is finished with + * unlocked_inode_to_wb_end(). + * +- * The caller must call unlocked_inode_to_wb_end() with *@lockdep +- * afterwards and can't sleep during transaction. IRQ may or may not be +- * disabled on return. ++ * The caller must call unlocked_inode_to_wb_end() with *@cookie afterwards and ++ * can't sleep during the transaction. IRQs may or may not be disabled on ++ * return. + */ + static inline struct bdi_writeback * +-unlocked_inode_to_wb_begin(struct inode *inode, bool *lockedp) ++unlocked_inode_to_wb_begin(struct inode *inode, struct wb_lock_cookie *cookie) + { + rcu_read_lock(); + +@@ -367,10 +367,10 @@ unlocked_inode_to_wb_begin(struct inode *inode, bool *lockedp) + * Paired with store_release in inode_switch_wb_work_fn() and + * ensures that we see the new wb if we see cleared I_WB_SWITCH. + */ +- *lockedp = smp_load_acquire(&inode->i_state) & I_WB_SWITCH; ++ cookie->locked = smp_load_acquire(&inode->i_state) & I_WB_SWITCH; + +- if (unlikely(*lockedp)) +- spin_lock_irq(&inode->i_mapping->tree_lock); ++ if (unlikely(cookie->locked)) ++ spin_lock_irqsave(&inode->i_mapping->tree_lock, cookie->flags); + + /* + * Protected by either !I_WB_SWITCH + rcu_read_lock() or tree_lock. +@@ -382,12 +382,13 @@ unlocked_inode_to_wb_begin(struct inode *inode, bool *lockedp) + /** + * unlocked_inode_to_wb_end - end inode wb access transaction + * @inode: target inode +- * @locked: *@lockedp from unlocked_inode_to_wb_begin() ++ * @cookie: @cookie from unlocked_inode_to_wb_begin() + */ +-static inline void unlocked_inode_to_wb_end(struct inode *inode, bool locked) ++static inline void unlocked_inode_to_wb_end(struct inode *inode, ++ struct wb_lock_cookie *cookie) + { +- if (unlikely(locked)) +- spin_unlock_irq(&inode->i_mapping->tree_lock); ++ if (unlikely(cookie->locked)) ++ spin_unlock_irqrestore(&inode->i_mapping->tree_lock, cookie->flags); + + rcu_read_unlock(); + } +@@ -434,12 +435,13 @@ static inline struct bdi_writeback *inode_to_wb(struct inode *inode) + } + + static inline struct bdi_writeback * +-unlocked_inode_to_wb_begin(struct inode *inode, bool *lockedp) ++unlocked_inode_to_wb_begin(struct inode *inode, struct wb_lock_cookie *cookie) + { + return inode_to_wb(inode); + } + +-static inline void unlocked_inode_to_wb_end(struct inode *inode, bool locked) ++static inline void unlocked_inode_to_wb_end(struct inode *inode, ++ struct wb_lock_cookie *cookie) + { + } + +diff --git a/include/linux/blk_types.h b/include/linux/blk_types.h +index bf18b95ed92d..17b18b91ebac 100644 +--- a/include/linux/blk_types.h ++++ b/include/linux/blk_types.h +@@ -20,8 +20,13 @@ typedef void (bio_end_io_t) (struct bio *); + + /* + * Block error status values. See block/blk-core:blk_errors for the details. ++ * Alpha cannot write a byte atomically, so we need to use 32-bit value. + */ ++#if defined(CONFIG_ALPHA) && !defined(__alpha_bwx__) ++typedef u32 __bitwise blk_status_t; ++#else + typedef u8 __bitwise blk_status_t; ++#endif + #define BLK_STS_OK 0 + #define BLK_STS_NOTSUPP ((__force blk_status_t)1) + #define BLK_STS_TIMEOUT ((__force blk_status_t)2) +diff --git a/include/linux/compiler-clang.h b/include/linux/compiler-clang.h +index d3f264a5b04d..ceb96ecab96e 100644 +--- a/include/linux/compiler-clang.h ++++ b/include/linux/compiler-clang.h +@@ -17,9 +17,6 @@ + */ + #define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __COUNTER__) + +-#define randomized_struct_fields_start struct { +-#define randomized_struct_fields_end }; +- + /* all clang versions usable with the kernel support KASAN ABI version 5 */ + #define KASAN_ABI_VERSION 5 + +diff --git a/include/linux/compiler-gcc.h b/include/linux/compiler-gcc.h +index e2c7f4369eff..b4bf73f5e38f 100644 +--- a/include/linux/compiler-gcc.h ++++ b/include/linux/compiler-gcc.h +@@ -242,6 +242,9 @@ + #if defined(RANDSTRUCT_PLUGIN) && !defined(__CHECKER__) + #define __randomize_layout __attribute__((randomize_layout)) + #define __no_randomize_layout __attribute__((no_randomize_layout)) ++/* This anon struct can add padding, so only enable it under randstruct. */ ++#define randomized_struct_fields_start struct { ++#define randomized_struct_fields_end } __randomize_layout; + #endif + + #endif /* GCC_VERSION >= 40500 */ +@@ -256,15 +259,6 @@ + */ + #define __visible __attribute__((externally_visible)) + +-/* +- * RANDSTRUCT_PLUGIN wants to use an anonymous struct, but it is only +- * possible since GCC 4.6. To provide as much build testing coverage +- * as possible, this is used for all GCC 4.6+ builds, and not just on +- * RANDSTRUCT_PLUGIN builds. +- */ +-#define randomized_struct_fields_start struct { +-#define randomized_struct_fields_end } __randomize_layout; +- + #endif /* GCC_VERSION >= 40600 */ + + +diff --git a/include/linux/hid.h b/include/linux/hid.h +index 091a81cf330f..29b981b1694d 100644 +--- a/include/linux/hid.h ++++ b/include/linux/hid.h +@@ -515,6 +515,12 @@ enum hid_type { + HID_TYPE_USBNONE + }; + ++enum hid_battery_status { ++ HID_BATTERY_UNKNOWN = 0, ++ HID_BATTERY_QUERIED, /* Kernel explicitly queried battery strength */ ++ HID_BATTERY_REPORTED, /* Device sent unsolicited battery strength report */ ++}; ++ + struct hid_driver; + struct hid_ll_driver; + +@@ -557,7 +563,8 @@ struct hid_device { /* device report descriptor */ + __s32 battery_max; + __s32 battery_report_type; + __s32 battery_report_id; +- bool battery_reported; ++ enum hid_battery_status battery_status; ++ bool battery_avoid_query; + #endif + + unsigned int status; /* see STAT flags above */ +@@ -851,7 +858,7 @@ extern int hidinput_connect(struct hid_device *hid, unsigned int force); + extern void hidinput_disconnect(struct hid_device *); + + int hid_set_field(struct hid_field *, unsigned, __s32); +-int hid_input_report(struct hid_device *, int type, u8 *, int, int); ++int hid_input_report(struct hid_device *, int type, u8 *, u32, int); + int hidinput_find_field(struct hid_device *hid, unsigned int type, unsigned int code, struct hid_field **field); + struct hid_field *hidinput_get_led_field(struct hid_device *hid); + unsigned int hidinput_count_leds(struct hid_device *hid); +@@ -1102,13 +1109,13 @@ static inline void hid_hw_wait(struct hid_device *hdev) + * + * @report: the report we want to know the length + */ +-static inline int hid_report_len(struct hid_report *report) ++static inline u32 hid_report_len(struct hid_report *report) + { + /* equivalent to DIV_ROUND_UP(report->size, 8) + !!(report->id > 0) */ + return ((report->size - 1) >> 3) + 1 + (report->id > 0); + } + +-int hid_report_raw_event(struct hid_device *hid, int type, u8 *data, int size, ++int hid_report_raw_event(struct hid_device *hid, int type, u8 *data, u32 size, + int interrupt); + + /* HID quirks API */ +diff --git a/include/linux/hmm.h b/include/linux/hmm.h +index 325017ad9311..36dd21fe5caf 100644 +--- a/include/linux/hmm.h ++++ b/include/linux/hmm.h +@@ -498,23 +498,16 @@ struct hmm_device { + struct hmm_device *hmm_device_new(void *drvdata); + void hmm_device_put(struct hmm_device *hmm_device); + #endif /* CONFIG_DEVICE_PRIVATE || CONFIG_DEVICE_PUBLIC */ +-#endif /* IS_ENABLED(CONFIG_HMM) */ + + /* Below are for HMM internal use only! Not to be used by device driver! */ +-#if IS_ENABLED(CONFIG_HMM_MIRROR) + void hmm_mm_destroy(struct mm_struct *mm); + + static inline void hmm_mm_init(struct mm_struct *mm) + { + mm->hmm = NULL; + } +-#else /* IS_ENABLED(CONFIG_HMM_MIRROR) */ +-static inline void hmm_mm_destroy(struct mm_struct *mm) {} +-static inline void hmm_mm_init(struct mm_struct *mm) {} +-#endif /* IS_ENABLED(CONFIG_HMM_MIRROR) */ +- +- + #else /* IS_ENABLED(CONFIG_HMM) */ + static inline void hmm_mm_destroy(struct mm_struct *mm) {} + static inline void hmm_mm_init(struct mm_struct *mm) {} ++#endif /* IS_ENABLED(CONFIG_HMM) */ + #endif /* LINUX_HMM_H */ +diff --git a/include/linux/mm.h b/include/linux/mm.h +index ad06d42adb1a..95a2d748e978 100644 +--- a/include/linux/mm.h ++++ b/include/linux/mm.h +@@ -2604,6 +2604,7 @@ enum mf_action_page_type { + MF_MSG_POISONED_HUGE, + MF_MSG_HUGE, + MF_MSG_FREE_HUGE, ++ MF_MSG_NON_PMD_HUGE, + MF_MSG_UNMAP_FAILED, + MF_MSG_DIRTY_SWAPCACHE, + MF_MSG_CLEAN_SWAPCACHE, +diff --git a/include/sound/pcm_oss.h b/include/sound/pcm_oss.h +index 760c969d885d..12bbf8c81112 100644 +--- a/include/sound/pcm_oss.h ++++ b/include/sound/pcm_oss.h +@@ -57,6 +57,7 @@ struct snd_pcm_oss_runtime { + char *buffer; /* vmallocated period */ + size_t buffer_used; /* used length from period buffer */ + struct mutex params_lock; ++ atomic_t rw_ref; /* concurrent read/write accesses */ + #ifdef CONFIG_SND_PCM_OSS_PLUGINS + struct snd_pcm_plugin *plugin_first; + struct snd_pcm_plugin *plugin_last; +diff --git a/include/uapi/linux/random.h b/include/uapi/linux/random.h +index c34f4490d025..26ee91300e3e 100644 +--- a/include/uapi/linux/random.h ++++ b/include/uapi/linux/random.h +@@ -35,6 +35,9 @@ + /* Clear the entropy pool and associated counters. (Superuser only.) */ + #define RNDCLEARPOOL _IO( 'R', 0x06 ) + ++/* Reseed CRNG. (Superuser only.) */ ++#define RNDRESEEDCRNG _IO( 'R', 0x07 ) ++ + struct rand_pool_info { + int entropy_count; + int buf_size; +diff --git a/ipc/shm.c b/ipc/shm.c +index 93e0e3a4d009..f68420b1ad93 100644 +--- a/ipc/shm.c ++++ b/ipc/shm.c +@@ -203,6 +203,12 @@ static int __shm_open(struct vm_area_struct *vma) + if (IS_ERR(shp)) + return PTR_ERR(shp); + ++ if (shp->shm_file != sfd->file) { ++ /* ID was reused */ ++ shm_unlock(shp); ++ return -EINVAL; ++ } ++ + shp->shm_atim = ktime_get_real_seconds(); + shp->shm_lprid = task_tgid_vnr(current); + shp->shm_nattch++; +@@ -431,8 +437,9 @@ static int shm_mmap(struct file *file, struct vm_area_struct *vma) + int ret; + + /* +- * In case of remap_file_pages() emulation, the file can represent +- * removed IPC ID: propogate shm_lock() error to caller. ++ * In case of remap_file_pages() emulation, the file can represent an ++ * IPC ID that was removed, and possibly even reused by another shm ++ * segment already. Propagate this case as an error to caller. + */ + ret = __shm_open(vma); + if (ret) +@@ -456,6 +463,7 @@ static int shm_release(struct inode *ino, struct file *file) + struct shm_file_data *sfd = shm_file_data(file); + + put_ipc_ns(sfd->ns); ++ fput(sfd->file); + shm_file_data(file) = NULL; + kfree(sfd); + return 0; +@@ -1402,7 +1410,16 @@ long do_shmat(int shmid, char __user *shmaddr, int shmflg, + file->f_mapping = shp->shm_file->f_mapping; + sfd->id = shp->shm_perm.id; + sfd->ns = get_ipc_ns(ns); +- sfd->file = shp->shm_file; ++ /* ++ * We need to take a reference to the real shm file to prevent the ++ * pointer from becoming stale in cases where the lifetime of the outer ++ * file extends beyond that of the shm segment. It's not usually ++ * possible, but it can happen during remap_file_pages() emulation as ++ * that unmaps the memory, then does ->mmap() via file reference only. ++ * We'll deny the ->mmap() if the shm segment was since removed, but to ++ * detect shm ID reuse we need to compare the file pointers. ++ */ ++ sfd->file = get_file(shp->shm_file); + sfd->vm_ops = NULL; + + err = security_mmap_file(file, prot, flags); +diff --git a/kernel/resource.c b/kernel/resource.c +index e270b5048988..2af6c03858b9 100644 +--- a/kernel/resource.c ++++ b/kernel/resource.c +@@ -651,7 +651,8 @@ static int __find_resource(struct resource *root, struct resource *old, + alloc.start = constraint->alignf(constraint->alignf_data, &avail, + size, constraint->align); + alloc.end = alloc.start + size - 1; +- if (resource_contains(&avail, &alloc)) { ++ if (alloc.start <= alloc.end && ++ resource_contains(&avail, &alloc)) { + new->start = alloc.start; + new->end = alloc.end; + return 0; +diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c +index dcf1c4dd3efe..7ac7b08b563a 100644 +--- a/kernel/trace/ring_buffer.c ++++ b/kernel/trace/ring_buffer.c +@@ -1136,6 +1136,11 @@ static int __rb_allocate_pages(long nr_pages, struct list_head *pages, int cpu) + struct buffer_page *bpage, *tmp; + long i; + ++ /* Check if the available memory is there first */ ++ i = si_mem_available(); ++ if (i < nr_pages) ++ return -ENOMEM; ++ + for (i = 0; i < nr_pages; i++) { + struct page *page; + /* +diff --git a/kernel/trace/trace_uprobe.c b/kernel/trace/trace_uprobe.c +index 268029ae1be6..df08863e6d53 100644 +--- a/kernel/trace/trace_uprobe.c ++++ b/kernel/trace/trace_uprobe.c +@@ -608,7 +608,7 @@ static int probes_seq_show(struct seq_file *m, void *v) + + /* Don't print "0x (null)" when offset is 0 */ + if (tu->offset) { +- seq_printf(m, "0x%px", (void *)tu->offset); ++ seq_printf(m, "0x%0*lx", (int)(sizeof(void *) * 2), tu->offset); + } else { + switch (sizeof(void *)) { + case 4: +diff --git a/lib/swiotlb.c b/lib/swiotlb.c +index c43ec2271469..44f7eb408fdb 100644 +--- a/lib/swiotlb.c ++++ b/lib/swiotlb.c +@@ -732,7 +732,7 @@ swiotlb_alloc_buffer(struct device *dev, size_t size, dma_addr_t *dma_handle, + goto out_warn; + + *dma_handle = swiotlb_phys_to_dma(dev, phys_addr); +- if (dma_coherent_ok(dev, *dma_handle, size)) ++ if (!dma_coherent_ok(dev, *dma_handle, size)) + goto out_unmap; + + memset(phys_to_virt(phys_addr), 0, size); +diff --git a/lib/vsprintf.c b/lib/vsprintf.c +index d7a708f82559..89f8a4a4b770 100644 +--- a/lib/vsprintf.c ++++ b/lib/vsprintf.c +@@ -2591,6 +2591,8 @@ int vbin_printf(u32 *bin_buf, size_t size, const char *fmt, va_list args) + case 's': + case 'F': + case 'f': ++ case 'x': ++ case 'K': + save_arg(void *); + break; + default: +@@ -2765,6 +2767,8 @@ int bstr_printf(char *buf, size_t size, const char *fmt, const u32 *bin_buf) + case 's': + case 'F': + case 'f': ++ case 'x': ++ case 'K': + process = true; + break; + default: +diff --git a/mm/filemap.c b/mm/filemap.c +index 693f62212a59..787ff18663bf 100644 +--- a/mm/filemap.c ++++ b/mm/filemap.c +@@ -785,7 +785,7 @@ int replace_page_cache_page(struct page *old, struct page *new, gfp_t gfp_mask) + VM_BUG_ON_PAGE(!PageLocked(new), new); + VM_BUG_ON_PAGE(new->mapping, new); + +- error = radix_tree_preload(gfp_mask & ~__GFP_HIGHMEM); ++ error = radix_tree_preload(gfp_mask & GFP_RECLAIM_MASK); + if (!error) { + struct address_space *mapping = old->mapping; + void (*freepage)(struct page *); +@@ -841,7 +841,7 @@ static int __add_to_page_cache_locked(struct page *page, + return error; + } + +- error = radix_tree_maybe_preload(gfp_mask & ~__GFP_HIGHMEM); ++ error = radix_tree_maybe_preload(gfp_mask & GFP_RECLAIM_MASK); + if (error) { + if (!huge) + mem_cgroup_cancel_charge(page, memcg, false); +@@ -1584,8 +1584,7 @@ struct page *pagecache_get_page(struct address_space *mapping, pgoff_t offset, + if (fgp_flags & FGP_ACCESSED) + __SetPageReferenced(page); + +- err = add_to_page_cache_lru(page, mapping, offset, +- gfp_mask & GFP_RECLAIM_MASK); ++ err = add_to_page_cache_lru(page, mapping, offset, gfp_mask); + if (unlikely(err)) { + put_page(page); + page = NULL; +@@ -2388,7 +2387,7 @@ static int page_cache_read(struct file *file, pgoff_t offset, gfp_t gfp_mask) + if (!page) + return -ENOMEM; + +- ret = add_to_page_cache_lru(page, mapping, offset, gfp_mask & GFP_KERNEL); ++ ret = add_to_page_cache_lru(page, mapping, offset, gfp_mask); + if (ret == 0) + ret = mapping->a_ops->readpage(file, page); + else if (ret == -EEXIST) +diff --git a/mm/hmm.c b/mm/hmm.c +index 320545b98ff5..91d3f062dd28 100644 +--- a/mm/hmm.c ++++ b/mm/hmm.c +@@ -277,7 +277,8 @@ static int hmm_pfns_bad(unsigned long addr, + unsigned long end, + struct mm_walk *walk) + { +- struct hmm_range *range = walk->private; ++ struct hmm_vma_walk *hmm_vma_walk = walk->private; ++ struct hmm_range *range = hmm_vma_walk->range; + hmm_pfn_t *pfns = range->pfns; + unsigned long i; + +diff --git a/mm/ksm.c b/mm/ksm.c +index 293721f5da70..2d6b35234926 100644 +--- a/mm/ksm.c ++++ b/mm/ksm.c +@@ -1131,6 +1131,13 @@ static int replace_page(struct vm_area_struct *vma, struct page *page, + } else { + newpte = pte_mkspecial(pfn_pte(page_to_pfn(kpage), + vma->vm_page_prot)); ++ /* ++ * We're replacing an anonymous page with a zero page, which is ++ * not anonymous. We need to do proper accounting otherwise we ++ * will get wrong values in /proc, and a BUG message in dmesg ++ * when tearing down the mm. ++ */ ++ dec_mm_counter(mm, MM_ANONPAGES); + } + + flush_cache_page(vma, addr, pte_pfn(*ptep)); +diff --git a/mm/memory-failure.c b/mm/memory-failure.c +index 8291b75f42c8..2d4bf647cf01 100644 +--- a/mm/memory-failure.c ++++ b/mm/memory-failure.c +@@ -502,6 +502,7 @@ static const char * const action_page_types[] = { + [MF_MSG_POISONED_HUGE] = "huge page already hardware poisoned", + [MF_MSG_HUGE] = "huge page", + [MF_MSG_FREE_HUGE] = "free huge page", ++ [MF_MSG_NON_PMD_HUGE] = "non-pmd-sized huge page", + [MF_MSG_UNMAP_FAILED] = "unmapping failed page", + [MF_MSG_DIRTY_SWAPCACHE] = "dirty swapcache page", + [MF_MSG_CLEAN_SWAPCACHE] = "clean swapcache page", +@@ -1084,6 +1085,21 @@ static int memory_failure_hugetlb(unsigned long pfn, int flags) + return 0; + } + ++ /* ++ * TODO: hwpoison for pud-sized hugetlb doesn't work right now, so ++ * simply disable it. In order to make it work properly, we need ++ * make sure that: ++ * - conversion of a pud that maps an error hugetlb into hwpoison ++ * entry properly works, and ++ * - other mm code walking over page table is aware of pud-aligned ++ * hwpoison entries. ++ */ ++ if (huge_page_size(page_hstate(head)) > PMD_SIZE) { ++ action_result(pfn, MF_MSG_NON_PMD_HUGE, MF_IGNORED); ++ res = -EBUSY; ++ goto out; ++ } ++ + if (!hwpoison_user_mappings(p, pfn, flags, &head)) { + action_result(pfn, MF_MSG_UNMAP_FAILED, MF_IGNORED); + res = -EBUSY; +diff --git a/mm/page-writeback.c b/mm/page-writeback.c +index 586f31261c83..8369572e1f7d 100644 +--- a/mm/page-writeback.c ++++ b/mm/page-writeback.c +@@ -2501,13 +2501,13 @@ void account_page_redirty(struct page *page) + if (mapping && mapping_cap_account_dirty(mapping)) { + struct inode *inode = mapping->host; + struct bdi_writeback *wb; +- bool locked; ++ struct wb_lock_cookie cookie = {}; + +- wb = unlocked_inode_to_wb_begin(inode, &locked); ++ wb = unlocked_inode_to_wb_begin(inode, &cookie); + current->nr_dirtied--; + dec_node_page_state(page, NR_DIRTIED); + dec_wb_stat(wb, WB_DIRTIED); +- unlocked_inode_to_wb_end(inode, locked); ++ unlocked_inode_to_wb_end(inode, &cookie); + } + } + EXPORT_SYMBOL(account_page_redirty); +@@ -2613,15 +2613,15 @@ void __cancel_dirty_page(struct page *page) + if (mapping_cap_account_dirty(mapping)) { + struct inode *inode = mapping->host; + struct bdi_writeback *wb; +- bool locked; ++ struct wb_lock_cookie cookie = {}; + + lock_page_memcg(page); +- wb = unlocked_inode_to_wb_begin(inode, &locked); ++ wb = unlocked_inode_to_wb_begin(inode, &cookie); + + if (TestClearPageDirty(page)) + account_page_cleaned(page, mapping, wb); + +- unlocked_inode_to_wb_end(inode, locked); ++ unlocked_inode_to_wb_end(inode, &cookie); + unlock_page_memcg(page); + } else { + ClearPageDirty(page); +@@ -2653,7 +2653,7 @@ int clear_page_dirty_for_io(struct page *page) + if (mapping && mapping_cap_account_dirty(mapping)) { + struct inode *inode = mapping->host; + struct bdi_writeback *wb; +- bool locked; ++ struct wb_lock_cookie cookie = {}; + + /* + * Yes, Virginia, this is indeed insane. +@@ -2690,14 +2690,14 @@ int clear_page_dirty_for_io(struct page *page) + * always locked coming in here, so we get the desired + * exclusion. + */ +- wb = unlocked_inode_to_wb_begin(inode, &locked); ++ wb = unlocked_inode_to_wb_begin(inode, &cookie); + if (TestClearPageDirty(page)) { + dec_lruvec_page_state(page, NR_FILE_DIRTY); + dec_zone_page_state(page, NR_ZONE_WRITE_PENDING); + dec_wb_stat(wb, WB_RECLAIMABLE); + ret = 1; + } +- unlocked_inode_to_wb_end(inode, locked); ++ unlocked_inode_to_wb_end(inode, &cookie); + return ret; + } + return TestClearPageDirty(page); +diff --git a/mm/slab.c b/mm/slab.c +index 9095c3945425..a76006aae857 100644 +--- a/mm/slab.c ++++ b/mm/slab.c +@@ -4074,7 +4074,8 @@ static void cache_reap(struct work_struct *w) + next_reap_node(); + out: + /* Set up the next iteration */ +- schedule_delayed_work(work, round_jiffies_relative(REAPTIMEOUT_AC)); ++ schedule_delayed_work_on(smp_processor_id(), work, ++ round_jiffies_relative(REAPTIMEOUT_AC)); + } + + void get_slabinfo(struct kmem_cache *cachep, struct slabinfo *sinfo) +diff --git a/net/sunrpc/rpc_pipe.c b/net/sunrpc/rpc_pipe.c +index fc97fc3ed637..0178ea878b75 100644 +--- a/net/sunrpc/rpc_pipe.c ++++ b/net/sunrpc/rpc_pipe.c +@@ -1375,6 +1375,7 @@ rpc_gssd_dummy_depopulate(struct dentry *pipe_dentry) + struct dentry *clnt_dir = pipe_dentry->d_parent; + struct dentry *gssd_dir = clnt_dir->d_parent; + ++ dget(pipe_dentry); + __rpc_rmpipe(d_inode(clnt_dir), pipe_dentry); + __rpc_depopulate(clnt_dir, gssd_dummy_info_file, 0, 1); + __rpc_depopulate(gssd_dir, gssd_dummy_clnt_dir, 0, 1); +diff --git a/net/sunrpc/xprtrdma/rpc_rdma.c b/net/sunrpc/xprtrdma/rpc_rdma.c +index f0855a959a27..4bc0f4d94a01 100644 +--- a/net/sunrpc/xprtrdma/rpc_rdma.c ++++ b/net/sunrpc/xprtrdma/rpc_rdma.c +@@ -1366,7 +1366,7 @@ void rpcrdma_reply_handler(struct rpcrdma_rep *rep) + + trace_xprtrdma_reply(rqst->rq_task, rep, req, credits); + +- queue_work_on(req->rl_cpu, rpcrdma_receive_wq, &rep->rr_work); ++ queue_work(rpcrdma_receive_wq, &rep->rr_work); + return; + + out_badstatus: +diff --git a/net/sunrpc/xprtrdma/transport.c b/net/sunrpc/xprtrdma/transport.c +index 4b1ecfe979cf..f86021e3b853 100644 +--- a/net/sunrpc/xprtrdma/transport.c ++++ b/net/sunrpc/xprtrdma/transport.c +@@ -52,7 +52,6 @@ + #include <linux/slab.h> + #include <linux/seq_file.h> + #include <linux/sunrpc/addr.h> +-#include <linux/smp.h> + + #include "xprt_rdma.h" + +@@ -651,7 +650,6 @@ xprt_rdma_allocate(struct rpc_task *task) + if (!rpcrdma_get_recvbuf(r_xprt, req, rqst->rq_rcvsize, flags)) + goto out_fail; + +- req->rl_cpu = smp_processor_id(); + req->rl_connect_cookie = 0; /* our reserved value */ + rpcrdma_set_xprtdata(rqst, req); + rqst->rq_buffer = req->rl_sendbuf->rg_base; +diff --git a/net/sunrpc/xprtrdma/verbs.c b/net/sunrpc/xprtrdma/verbs.c +index e6f84a6434a0..25b0ecbd37e2 100644 +--- a/net/sunrpc/xprtrdma/verbs.c ++++ b/net/sunrpc/xprtrdma/verbs.c +@@ -250,7 +250,6 @@ rpcrdma_conn_upcall(struct rdma_cm_id *id, struct rdma_cm_event *event) + wait_for_completion(&ia->ri_remove_done); + + ia->ri_id = NULL; +- ia->ri_pd = NULL; + ia->ri_device = NULL; + /* Return 1 to ensure the core destroys the id. */ + return 1; +@@ -445,7 +444,9 @@ rpcrdma_ia_remove(struct rpcrdma_ia *ia) + ia->ri_id->qp = NULL; + } + ib_free_cq(ep->rep_attr.recv_cq); ++ ep->rep_attr.recv_cq = NULL; + ib_free_cq(ep->rep_attr.send_cq); ++ ep->rep_attr.send_cq = NULL; + + /* The ULP is responsible for ensuring all DMA + * mappings and MRs are gone. +@@ -458,6 +459,8 @@ rpcrdma_ia_remove(struct rpcrdma_ia *ia) + rpcrdma_dma_unmap_regbuf(req->rl_recvbuf); + } + rpcrdma_mrs_destroy(buf); ++ ib_dealloc_pd(ia->ri_pd); ++ ia->ri_pd = NULL; + + /* Allow waiters to continue */ + complete(&ia->ri_remove_done); +@@ -628,14 +631,16 @@ rpcrdma_ep_destroy(struct rpcrdma_ep *ep, struct rpcrdma_ia *ia) + { + cancel_delayed_work_sync(&ep->rep_connect_worker); + +- if (ia->ri_id->qp) { ++ if (ia->ri_id && ia->ri_id->qp) { + rpcrdma_ep_disconnect(ep, ia); + rdma_destroy_qp(ia->ri_id); + ia->ri_id->qp = NULL; + } + +- ib_free_cq(ep->rep_attr.recv_cq); +- ib_free_cq(ep->rep_attr.send_cq); ++ if (ep->rep_attr.recv_cq) ++ ib_free_cq(ep->rep_attr.recv_cq); ++ if (ep->rep_attr.send_cq) ++ ib_free_cq(ep->rep_attr.send_cq); + } + + /* Re-establish a connection after a device removal event. +diff --git a/net/sunrpc/xprtrdma/xprt_rdma.h b/net/sunrpc/xprtrdma/xprt_rdma.h +index 69883a960a3f..430a6de8300e 100644 +--- a/net/sunrpc/xprtrdma/xprt_rdma.h ++++ b/net/sunrpc/xprtrdma/xprt_rdma.h +@@ -334,7 +334,6 @@ enum { + struct rpcrdma_buffer; + struct rpcrdma_req { + struct list_head rl_list; +- int rl_cpu; + unsigned int rl_connect_cookie; + struct rpcrdma_buffer *rl_buffer; + struct rpcrdma_rep *rl_reply; +diff --git a/sound/core/oss/pcm_oss.c b/sound/core/oss/pcm_oss.c +index 441405081195..1980f68246cb 100644 +--- a/sound/core/oss/pcm_oss.c ++++ b/sound/core/oss/pcm_oss.c +@@ -823,8 +823,25 @@ static int choose_rate(struct snd_pcm_substream *substream, + return snd_pcm_hw_param_near(substream, params, SNDRV_PCM_HW_PARAM_RATE, best_rate, NULL); + } + +-static int snd_pcm_oss_change_params(struct snd_pcm_substream *substream, +- bool trylock) ++/* parameter locking: returns immediately if tried during streaming */ ++static int lock_params(struct snd_pcm_runtime *runtime) ++{ ++ if (mutex_lock_interruptible(&runtime->oss.params_lock)) ++ return -ERESTARTSYS; ++ if (atomic_read(&runtime->oss.rw_ref)) { ++ mutex_unlock(&runtime->oss.params_lock); ++ return -EBUSY; ++ } ++ return 0; ++} ++ ++static void unlock_params(struct snd_pcm_runtime *runtime) ++{ ++ mutex_unlock(&runtime->oss.params_lock); ++} ++ ++/* call with params_lock held */ ++static int snd_pcm_oss_change_params_locked(struct snd_pcm_substream *substream) + { + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_pcm_hw_params *params, *sparams; +@@ -838,11 +855,8 @@ static int snd_pcm_oss_change_params(struct snd_pcm_substream *substream, + const struct snd_mask *sformat_mask; + struct snd_mask mask; + +- if (trylock) { +- if (!(mutex_trylock(&runtime->oss.params_lock))) +- return -EAGAIN; +- } else if (mutex_lock_interruptible(&runtime->oss.params_lock)) +- return -ERESTARTSYS; ++ if (!runtime->oss.params) ++ return 0; + sw_params = kzalloc(sizeof(*sw_params), GFP_KERNEL); + params = kmalloc(sizeof(*params), GFP_KERNEL); + sparams = kmalloc(sizeof(*sparams), GFP_KERNEL); +@@ -1068,6 +1082,23 @@ static int snd_pcm_oss_change_params(struct snd_pcm_substream *substream, + kfree(sw_params); + kfree(params); + kfree(sparams); ++ return err; ++} ++ ++/* this one takes the lock by itself */ ++static int snd_pcm_oss_change_params(struct snd_pcm_substream *substream, ++ bool trylock) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ int err; ++ ++ if (trylock) { ++ if (!(mutex_trylock(&runtime->oss.params_lock))) ++ return -EAGAIN; ++ } else if (mutex_lock_interruptible(&runtime->oss.params_lock)) ++ return -ERESTARTSYS; ++ ++ err = snd_pcm_oss_change_params_locked(substream); + mutex_unlock(&runtime->oss.params_lock); + return err; + } +@@ -1096,6 +1127,10 @@ static int snd_pcm_oss_get_active_substream(struct snd_pcm_oss_file *pcm_oss_fil + return 0; + } + ++/* call with params_lock held */ ++/* NOTE: this always call PREPARE unconditionally no matter whether ++ * runtime->oss.prepare is set or not ++ */ + static int snd_pcm_oss_prepare(struct snd_pcm_substream *substream) + { + int err; +@@ -1120,14 +1155,35 @@ static int snd_pcm_oss_make_ready(struct snd_pcm_substream *substream) + struct snd_pcm_runtime *runtime; + int err; + +- if (substream == NULL) +- return 0; + runtime = substream->runtime; + if (runtime->oss.params) { + err = snd_pcm_oss_change_params(substream, false); + if (err < 0) + return err; + } ++ if (runtime->oss.prepare) { ++ if (mutex_lock_interruptible(&runtime->oss.params_lock)) ++ return -ERESTARTSYS; ++ err = snd_pcm_oss_prepare(substream); ++ mutex_unlock(&runtime->oss.params_lock); ++ if (err < 0) ++ return err; ++ } ++ return 0; ++} ++ ++/* call with params_lock held */ ++static int snd_pcm_oss_make_ready_locked(struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime; ++ int err; ++ ++ runtime = substream->runtime; ++ if (runtime->oss.params) { ++ err = snd_pcm_oss_change_params_locked(substream); ++ if (err < 0) ++ return err; ++ } + if (runtime->oss.prepare) { + err = snd_pcm_oss_prepare(substream); + if (err < 0) +@@ -1332,13 +1388,15 @@ static ssize_t snd_pcm_oss_write1(struct snd_pcm_substream *substream, const cha + if (atomic_read(&substream->mmap_count)) + return -ENXIO; + +- if ((tmp = snd_pcm_oss_make_ready(substream)) < 0) +- return tmp; ++ atomic_inc(&runtime->oss.rw_ref); + while (bytes > 0) { + if (mutex_lock_interruptible(&runtime->oss.params_lock)) { + tmp = -ERESTARTSYS; + break; + } ++ tmp = snd_pcm_oss_make_ready_locked(substream); ++ if (tmp < 0) ++ goto err; + if (bytes < runtime->oss.period_bytes || runtime->oss.buffer_used > 0) { + tmp = bytes; + if (tmp + runtime->oss.buffer_used > runtime->oss.period_bytes) +@@ -1394,6 +1452,7 @@ static ssize_t snd_pcm_oss_write1(struct snd_pcm_substream *substream, const cha + } + tmp = 0; + } ++ atomic_dec(&runtime->oss.rw_ref); + return xfer > 0 ? (snd_pcm_sframes_t)xfer : tmp; + } + +@@ -1439,13 +1498,15 @@ static ssize_t snd_pcm_oss_read1(struct snd_pcm_substream *substream, char __use + if (atomic_read(&substream->mmap_count)) + return -ENXIO; + +- if ((tmp = snd_pcm_oss_make_ready(substream)) < 0) +- return tmp; ++ atomic_inc(&runtime->oss.rw_ref); + while (bytes > 0) { + if (mutex_lock_interruptible(&runtime->oss.params_lock)) { + tmp = -ERESTARTSYS; + break; + } ++ tmp = snd_pcm_oss_make_ready_locked(substream); ++ if (tmp < 0) ++ goto err; + if (bytes < runtime->oss.period_bytes || runtime->oss.buffer_used > 0) { + if (runtime->oss.buffer_used == 0) { + tmp = snd_pcm_oss_read2(substream, runtime->oss.buffer, runtime->oss.period_bytes, 1); +@@ -1486,6 +1547,7 @@ static ssize_t snd_pcm_oss_read1(struct snd_pcm_substream *substream, char __use + } + tmp = 0; + } ++ atomic_dec(&runtime->oss.rw_ref); + return xfer > 0 ? (snd_pcm_sframes_t)xfer : tmp; + } + +@@ -1501,10 +1563,12 @@ static int snd_pcm_oss_reset(struct snd_pcm_oss_file *pcm_oss_file) + continue; + runtime = substream->runtime; + snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_DROP, NULL); ++ mutex_lock(&runtime->oss.params_lock); + runtime->oss.prepare = 1; + runtime->oss.buffer_used = 0; + runtime->oss.prev_hw_ptr_period = 0; + runtime->oss.period_ptr = 0; ++ mutex_unlock(&runtime->oss.params_lock); + } + return 0; + } +@@ -1590,9 +1654,13 @@ static int snd_pcm_oss_sync(struct snd_pcm_oss_file *pcm_oss_file) + goto __direct; + if ((err = snd_pcm_oss_make_ready(substream)) < 0) + return err; ++ atomic_inc(&runtime->oss.rw_ref); ++ if (mutex_lock_interruptible(&runtime->oss.params_lock)) { ++ atomic_dec(&runtime->oss.rw_ref); ++ return -ERESTARTSYS; ++ } + format = snd_pcm_oss_format_from(runtime->oss.format); + width = snd_pcm_format_physical_width(format); +- mutex_lock(&runtime->oss.params_lock); + if (runtime->oss.buffer_used > 0) { + #ifdef OSS_DEBUG + pcm_dbg(substream->pcm, "sync: buffer_used\n"); +@@ -1602,10 +1670,8 @@ static int snd_pcm_oss_sync(struct snd_pcm_oss_file *pcm_oss_file) + runtime->oss.buffer + runtime->oss.buffer_used, + size); + err = snd_pcm_oss_sync1(substream, runtime->oss.period_bytes); +- if (err < 0) { +- mutex_unlock(&runtime->oss.params_lock); +- return err; +- } ++ if (err < 0) ++ goto unlock; + } else if (runtime->oss.period_ptr > 0) { + #ifdef OSS_DEBUG + pcm_dbg(substream->pcm, "sync: period_ptr\n"); +@@ -1615,10 +1681,8 @@ static int snd_pcm_oss_sync(struct snd_pcm_oss_file *pcm_oss_file) + runtime->oss.buffer, + size * 8 / width); + err = snd_pcm_oss_sync1(substream, size); +- if (err < 0) { +- mutex_unlock(&runtime->oss.params_lock); +- return err; +- } ++ if (err < 0) ++ goto unlock; + } + /* + * The ALSA's period might be a bit large than OSS one. +@@ -1632,7 +1696,11 @@ static int snd_pcm_oss_sync(struct snd_pcm_oss_file *pcm_oss_file) + else if (runtime->access == SNDRV_PCM_ACCESS_RW_NONINTERLEAVED) + snd_pcm_lib_writev(substream, NULL, size); + } ++unlock: + mutex_unlock(&runtime->oss.params_lock); ++ atomic_dec(&runtime->oss.rw_ref); ++ if (err < 0) ++ return err; + /* + * finish sync: drain the buffer + */ +@@ -1643,7 +1711,9 @@ static int snd_pcm_oss_sync(struct snd_pcm_oss_file *pcm_oss_file) + substream->f_flags = saved_f_flags; + if (err < 0) + return err; ++ mutex_lock(&runtime->oss.params_lock); + runtime->oss.prepare = 1; ++ mutex_unlock(&runtime->oss.params_lock); + } + + substream = pcm_oss_file->streams[SNDRV_PCM_STREAM_CAPTURE]; +@@ -1654,8 +1724,10 @@ static int snd_pcm_oss_sync(struct snd_pcm_oss_file *pcm_oss_file) + err = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_DROP, NULL); + if (err < 0) + return err; ++ mutex_lock(&runtime->oss.params_lock); + runtime->oss.buffer_used = 0; + runtime->oss.prepare = 1; ++ mutex_unlock(&runtime->oss.params_lock); + } + return 0; + } +@@ -1667,6 +1739,8 @@ static int snd_pcm_oss_set_rate(struct snd_pcm_oss_file *pcm_oss_file, int rate) + for (idx = 1; idx >= 0; --idx) { + struct snd_pcm_substream *substream = pcm_oss_file->streams[idx]; + struct snd_pcm_runtime *runtime; ++ int err; ++ + if (substream == NULL) + continue; + runtime = substream->runtime; +@@ -1674,10 +1748,14 @@ static int snd_pcm_oss_set_rate(struct snd_pcm_oss_file *pcm_oss_file, int rate) + rate = 1000; + else if (rate > 192000) + rate = 192000; ++ err = lock_params(runtime); ++ if (err < 0) ++ return err; + if (runtime->oss.rate != rate) { + runtime->oss.params = 1; + runtime->oss.rate = rate; + } ++ unlock_params(runtime); + } + return snd_pcm_oss_get_rate(pcm_oss_file); + } +@@ -1702,13 +1780,19 @@ static int snd_pcm_oss_set_channels(struct snd_pcm_oss_file *pcm_oss_file, unsig + for (idx = 1; idx >= 0; --idx) { + struct snd_pcm_substream *substream = pcm_oss_file->streams[idx]; + struct snd_pcm_runtime *runtime; ++ int err; ++ + if (substream == NULL) + continue; + runtime = substream->runtime; ++ err = lock_params(runtime); ++ if (err < 0) ++ return err; + if (runtime->oss.channels != channels) { + runtime->oss.params = 1; + runtime->oss.channels = channels; + } ++ unlock_params(runtime); + } + return snd_pcm_oss_get_channels(pcm_oss_file); + } +@@ -1781,6 +1865,7 @@ static int snd_pcm_oss_get_formats(struct snd_pcm_oss_file *pcm_oss_file) + static int snd_pcm_oss_set_format(struct snd_pcm_oss_file *pcm_oss_file, int format) + { + int formats, idx; ++ int err; + + if (format != AFMT_QUERY) { + formats = snd_pcm_oss_get_formats(pcm_oss_file); +@@ -1794,10 +1879,14 @@ static int snd_pcm_oss_set_format(struct snd_pcm_oss_file *pcm_oss_file, int for + if (substream == NULL) + continue; + runtime = substream->runtime; ++ err = lock_params(runtime); ++ if (err < 0) ++ return err; + if (runtime->oss.format != format) { + runtime->oss.params = 1; + runtime->oss.format = format; + } ++ unlock_params(runtime); + } + } + return snd_pcm_oss_get_format(pcm_oss_file); +@@ -1817,8 +1906,6 @@ static int snd_pcm_oss_set_subdivide1(struct snd_pcm_substream *substream, int s + { + struct snd_pcm_runtime *runtime; + +- if (substream == NULL) +- return 0; + runtime = substream->runtime; + if (subdivide == 0) { + subdivide = runtime->oss.subdivision; +@@ -1842,9 +1929,17 @@ static int snd_pcm_oss_set_subdivide(struct snd_pcm_oss_file *pcm_oss_file, int + + for (idx = 1; idx >= 0; --idx) { + struct snd_pcm_substream *substream = pcm_oss_file->streams[idx]; ++ struct snd_pcm_runtime *runtime; ++ + if (substream == NULL) + continue; +- if ((err = snd_pcm_oss_set_subdivide1(substream, subdivide)) < 0) ++ runtime = substream->runtime; ++ err = lock_params(runtime); ++ if (err < 0) ++ return err; ++ err = snd_pcm_oss_set_subdivide1(substream, subdivide); ++ unlock_params(runtime); ++ if (err < 0) + return err; + } + return err; +@@ -1854,8 +1949,6 @@ static int snd_pcm_oss_set_fragment1(struct snd_pcm_substream *substream, unsign + { + struct snd_pcm_runtime *runtime; + +- if (substream == NULL) +- return 0; + runtime = substream->runtime; + if (runtime->oss.subdivision || runtime->oss.fragshift) + return -EINVAL; +@@ -1875,9 +1968,17 @@ static int snd_pcm_oss_set_fragment(struct snd_pcm_oss_file *pcm_oss_file, unsig + + for (idx = 1; idx >= 0; --idx) { + struct snd_pcm_substream *substream = pcm_oss_file->streams[idx]; ++ struct snd_pcm_runtime *runtime; ++ + if (substream == NULL) + continue; +- if ((err = snd_pcm_oss_set_fragment1(substream, val)) < 0) ++ runtime = substream->runtime; ++ err = lock_params(runtime); ++ if (err < 0) ++ return err; ++ err = snd_pcm_oss_set_fragment1(substream, val); ++ unlock_params(runtime); ++ if (err < 0) + return err; + } + return err; +@@ -1961,6 +2062,9 @@ static int snd_pcm_oss_set_trigger(struct snd_pcm_oss_file *pcm_oss_file, int tr + } + if (psubstream) { + runtime = psubstream->runtime; ++ cmd = 0; ++ if (mutex_lock_interruptible(&runtime->oss.params_lock)) ++ return -ERESTARTSYS; + if (trigger & PCM_ENABLE_OUTPUT) { + if (runtime->oss.trigger) + goto _skip1; +@@ -1978,13 +2082,19 @@ static int snd_pcm_oss_set_trigger(struct snd_pcm_oss_file *pcm_oss_file, int tr + cmd = SNDRV_PCM_IOCTL_DROP; + runtime->oss.prepare = 1; + } +- err = snd_pcm_kernel_ioctl(psubstream, cmd, NULL); +- if (err < 0) +- return err; +- } + _skip1: ++ mutex_unlock(&runtime->oss.params_lock); ++ if (cmd) { ++ err = snd_pcm_kernel_ioctl(psubstream, cmd, NULL); ++ if (err < 0) ++ return err; ++ } ++ } + if (csubstream) { + runtime = csubstream->runtime; ++ cmd = 0; ++ if (mutex_lock_interruptible(&runtime->oss.params_lock)) ++ return -ERESTARTSYS; + if (trigger & PCM_ENABLE_INPUT) { + if (runtime->oss.trigger) + goto _skip2; +@@ -1999,11 +2109,14 @@ static int snd_pcm_oss_set_trigger(struct snd_pcm_oss_file *pcm_oss_file, int tr + cmd = SNDRV_PCM_IOCTL_DROP; + runtime->oss.prepare = 1; + } +- err = snd_pcm_kernel_ioctl(csubstream, cmd, NULL); +- if (err < 0) +- return err; +- } + _skip2: ++ mutex_unlock(&runtime->oss.params_lock); ++ if (cmd) { ++ err = snd_pcm_kernel_ioctl(csubstream, cmd, NULL); ++ if (err < 0) ++ return err; ++ } ++ } + return 0; + } + +@@ -2255,6 +2368,7 @@ static void snd_pcm_oss_init_substream(struct snd_pcm_substream *substream, + runtime->oss.maxfrags = 0; + runtime->oss.subdivision = 0; + substream->pcm_release = snd_pcm_oss_release_substream; ++ atomic_set(&runtime->oss.rw_ref, 0); + } + + static int snd_pcm_oss_release_file(struct snd_pcm_oss_file *pcm_oss_file) +diff --git a/sound/core/pcm.c b/sound/core/pcm.c +index 09ee8c6b9f75..66ac89aad681 100644 +--- a/sound/core/pcm.c ++++ b/sound/core/pcm.c +@@ -28,6 +28,7 @@ + #include <sound/core.h> + #include <sound/minors.h> + #include <sound/pcm.h> ++#include <sound/timer.h> + #include <sound/control.h> + #include <sound/info.h> + +@@ -1054,8 +1055,13 @@ void snd_pcm_detach_substream(struct snd_pcm_substream *substream) + snd_free_pages((void*)runtime->control, + PAGE_ALIGN(sizeof(struct snd_pcm_mmap_control))); + kfree(runtime->hw_constraints.rules); +- kfree(runtime); ++ /* Avoid concurrent access to runtime via PCM timer interface */ ++ if (substream->timer) ++ spin_lock_irq(&substream->timer->lock); + substream->runtime = NULL; ++ if (substream->timer) ++ spin_unlock_irq(&substream->timer->lock); ++ kfree(runtime); + put_pid(substream->pid); + substream->pid = NULL; + substream->pstr->substream_opened--; +diff --git a/sound/core/rawmidi_compat.c b/sound/core/rawmidi_compat.c +index f69764d7cdd7..e30e30ba6e39 100644 +--- a/sound/core/rawmidi_compat.c ++++ b/sound/core/rawmidi_compat.c +@@ -36,8 +36,6 @@ static int snd_rawmidi_ioctl_params_compat(struct snd_rawmidi_file *rfile, + struct snd_rawmidi_params params; + unsigned int val; + +- if (rfile->output == NULL) +- return -EINVAL; + if (get_user(params.stream, &src->stream) || + get_user(params.buffer_size, &src->buffer_size) || + get_user(params.avail_min, &src->avail_min) || +@@ -46,8 +44,12 @@ static int snd_rawmidi_ioctl_params_compat(struct snd_rawmidi_file *rfile, + params.no_active_sensing = val; + switch (params.stream) { + case SNDRV_RAWMIDI_STREAM_OUTPUT: ++ if (!rfile->output) ++ return -EINVAL; + return snd_rawmidi_output_params(rfile->output, ¶ms); + case SNDRV_RAWMIDI_STREAM_INPUT: ++ if (!rfile->input) ++ return -EINVAL; + return snd_rawmidi_input_params(rfile->input, ¶ms); + } + return -EINVAL; +@@ -67,16 +69,18 @@ static int snd_rawmidi_ioctl_status_compat(struct snd_rawmidi_file *rfile, + int err; + struct snd_rawmidi_status status; + +- if (rfile->output == NULL) +- return -EINVAL; + if (get_user(status.stream, &src->stream)) + return -EFAULT; + + switch (status.stream) { + case SNDRV_RAWMIDI_STREAM_OUTPUT: ++ if (!rfile->output) ++ return -EINVAL; + err = snd_rawmidi_output_status(rfile->output, &status); + break; + case SNDRV_RAWMIDI_STREAM_INPUT: ++ if (!rfile->input) ++ return -EINVAL; + err = snd_rawmidi_input_status(rfile->input, &status); + break; + default: +@@ -112,16 +116,18 @@ static int snd_rawmidi_ioctl_status_x32(struct snd_rawmidi_file *rfile, + int err; + struct snd_rawmidi_status status; + +- if (rfile->output == NULL) +- return -EINVAL; + if (get_user(status.stream, &src->stream)) + return -EFAULT; + + switch (status.stream) { + case SNDRV_RAWMIDI_STREAM_OUTPUT: ++ if (!rfile->output) ++ return -EINVAL; + err = snd_rawmidi_output_status(rfile->output, &status); + break; + case SNDRV_RAWMIDI_STREAM_INPUT: ++ if (!rfile->input) ++ return -EINVAL; + err = snd_rawmidi_input_status(rfile->input, &status); + break; + default: +diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c +index c507c69029e3..738e1fe90312 100644 +--- a/sound/pci/hda/hda_intel.c ++++ b/sound/pci/hda/hda_intel.c +@@ -1645,7 +1645,8 @@ static void azx_check_snoop_available(struct azx *chip) + */ + u8 val; + pci_read_config_byte(chip->pci, 0x42, &val); +- if (!(val & 0x80) && chip->pci->revision == 0x30) ++ if (!(val & 0x80) && (chip->pci->revision == 0x30 || ++ chip->pci->revision == 0x20)) + snoop = false; + } + +diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c +index aef1f52db7d9..fc77bf7a1544 100644 +--- a/sound/pci/hda/patch_realtek.c ++++ b/sound/pci/hda/patch_realtek.c +@@ -6370,6 +6370,8 @@ static const struct hda_fixup alc269_fixups[] = { + { 0x19, 0x01a1913c }, /* use as headset mic, without its own jack detect */ + { } + }, ++ .chained = true, ++ .chain_id = ALC269_FIXUP_HEADSET_MIC + }, + }; + +@@ -6573,6 +6575,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { + SND_PCI_QUIRK(0x17aa, 0x30bb, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY), + SND_PCI_QUIRK(0x17aa, 0x30e2, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY), + SND_PCI_QUIRK(0x17aa, 0x310c, "ThinkCentre Station", ALC294_FIXUP_LENOVO_MIC_LOCATION), ++ SND_PCI_QUIRK(0x17aa, 0x3138, "ThinkCentre Station", ALC294_FIXUP_LENOVO_MIC_LOCATION), + SND_PCI_QUIRK(0x17aa, 0x313c, "ThinkCentre Station", ALC294_FIXUP_LENOVO_MIC_LOCATION), + SND_PCI_QUIRK(0x17aa, 0x3112, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY), + SND_PCI_QUIRK(0x17aa, 0x3902, "Lenovo E50-80", ALC269_FIXUP_DMIC_THINKPAD_ACPI), +diff --git a/sound/soc/codecs/ssm2602.c b/sound/soc/codecs/ssm2602.c +index 9b341c23f62b..5e80867d09ef 100644 +--- a/sound/soc/codecs/ssm2602.c ++++ b/sound/soc/codecs/ssm2602.c +@@ -54,10 +54,17 @@ struct ssm2602_priv { + * using 2 wire for device control, so we cache them instead. + * There is no point in caching the reset register + */ +-static const u16 ssm2602_reg[SSM2602_CACHEREGNUM] = { +- 0x0097, 0x0097, 0x0079, 0x0079, +- 0x000a, 0x0008, 0x009f, 0x000a, +- 0x0000, 0x0000 ++static const struct reg_default ssm2602_reg[SSM2602_CACHEREGNUM] = { ++ { .reg = 0x00, .def = 0x0097 }, ++ { .reg = 0x01, .def = 0x0097 }, ++ { .reg = 0x02, .def = 0x0079 }, ++ { .reg = 0x03, .def = 0x0079 }, ++ { .reg = 0x04, .def = 0x000a }, ++ { .reg = 0x05, .def = 0x0008 }, ++ { .reg = 0x06, .def = 0x009f }, ++ { .reg = 0x07, .def = 0x000a }, ++ { .reg = 0x08, .def = 0x0000 }, ++ { .reg = 0x09, .def = 0x0000 } + }; + + +@@ -620,8 +627,8 @@ const struct regmap_config ssm2602_regmap_config = { + .volatile_reg = ssm2602_register_volatile, + + .cache_type = REGCACHE_RBTREE, +- .reg_defaults_raw = ssm2602_reg, +- .num_reg_defaults_raw = ARRAY_SIZE(ssm2602_reg), ++ .reg_defaults = ssm2602_reg, ++ .num_reg_defaults = ARRAY_SIZE(ssm2602_reg), + }; + EXPORT_SYMBOL_GPL(ssm2602_regmap_config); + +diff --git a/sound/soc/soc-topology.c b/sound/soc/soc-topology.c +index 01a50413c66f..782c580b7aa3 100644 +--- a/sound/soc/soc-topology.c ++++ b/sound/soc/soc-topology.c +@@ -523,6 +523,7 @@ static void remove_widget(struct snd_soc_component *comp, + kfree(se->dobj.control.dtexts[j]); + + kfree(se); ++ kfree(w->kcontrol_news[i].name); + } + kfree(w->kcontrol_news); + } else { +@@ -540,6 +541,7 @@ static void remove_widget(struct snd_soc_component *comp, + */ + kfree((void *)kcontrol->private_value); + snd_ctl_remove(card, kcontrol); ++ kfree(w->kcontrol_news[i].name); + } + kfree(w->kcontrol_news); + } +@@ -1233,7 +1235,9 @@ static struct snd_kcontrol_new *soc_tplg_dapm_widget_dmixer_create( + dev_dbg(tplg->dev, " adding DAPM widget mixer control %s at %d\n", + mc->hdr.name, i); + +- kc[i].name = mc->hdr.name; ++ kc[i].name = kstrdup(mc->hdr.name, GFP_KERNEL); ++ if (kc[i].name == NULL) ++ goto err_str; + kc[i].private_value = (long)sm; + kc[i].iface = SNDRV_CTL_ELEM_IFACE_MIXER; + kc[i].access = mc->hdr.access; +@@ -1278,8 +1282,10 @@ static struct snd_kcontrol_new *soc_tplg_dapm_widget_dmixer_create( + err_str: + kfree(sm); + err: +- for (--i; i >= 0; i--) ++ for (--i; i >= 0; i--) { + kfree((void *)kc[i].private_value); ++ kfree(kc[i].name); ++ } + kfree(kc); + return NULL; + } +@@ -1310,7 +1316,9 @@ static struct snd_kcontrol_new *soc_tplg_dapm_widget_denum_create( + dev_dbg(tplg->dev, " adding DAPM widget enum control %s\n", + ec->hdr.name); + +- kc[i].name = ec->hdr.name; ++ kc[i].name = kstrdup(ec->hdr.name, GFP_KERNEL); ++ if (kc[i].name == NULL) ++ goto err_se; + kc[i].private_value = (long)se; + kc[i].iface = SNDRV_CTL_ELEM_IFACE_MIXER; + kc[i].access = ec->hdr.access; +@@ -1386,6 +1394,7 @@ static struct snd_kcontrol_new *soc_tplg_dapm_widget_denum_create( + kfree(se->dobj.control.dtexts[j]); + + kfree(se); ++ kfree(kc[i].name); + } + err: + kfree(kc); +@@ -1424,7 +1433,9 @@ static struct snd_kcontrol_new *soc_tplg_dapm_widget_dbytes_create( + "ASoC: adding bytes kcontrol %s with access 0x%x\n", + be->hdr.name, be->hdr.access); + +- kc[i].name = be->hdr.name; ++ kc[i].name = kstrdup(be->hdr.name, GFP_KERNEL); ++ if (kc[i].name == NULL) ++ goto err; + kc[i].private_value = (long)sbe; + kc[i].iface = SNDRV_CTL_ELEM_IFACE_MIXER; + kc[i].access = be->hdr.access; +@@ -1454,8 +1465,10 @@ static struct snd_kcontrol_new *soc_tplg_dapm_widget_dbytes_create( + return kc; + + err: +- for (--i; i >= 0; i--) ++ for (--i; i >= 0; i--) { + kfree((void *)kc[i].private_value); ++ kfree(kc[i].name); ++ } + + kfree(kc); + return NULL; +diff --git a/sound/usb/line6/midi.c b/sound/usb/line6/midi.c +index 6d7cde56a355..e2cf55c53ea8 100644 +--- a/sound/usb/line6/midi.c ++++ b/sound/usb/line6/midi.c +@@ -125,7 +125,7 @@ static int send_midi_async(struct usb_line6 *line6, unsigned char *data, + } + + usb_fill_int_urb(urb, line6->usbdev, +- usb_sndbulkpipe(line6->usbdev, ++ usb_sndintpipe(line6->usbdev, + line6->properties->ep_ctrl_w), + transfer_buffer, length, midi_sent, line6, + line6->interval); +diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c +index 465095355666..a8f07243aa9f 100644 +--- a/virt/kvm/arm/vgic/vgic-its.c ++++ b/virt/kvm/arm/vgic/vgic-its.c +@@ -316,21 +316,24 @@ static int vgic_copy_lpi_list(struct kvm_vcpu *vcpu, u32 **intid_ptr) + struct vgic_dist *dist = &vcpu->kvm->arch.vgic; + struct vgic_irq *irq; + u32 *intids; +- int irq_count = dist->lpi_list_count, i = 0; ++ int irq_count, i = 0; + + /* +- * We use the current value of the list length, which may change +- * after the kmalloc. We don't care, because the guest shouldn't +- * change anything while the command handling is still running, +- * and in the worst case we would miss a new IRQ, which one wouldn't +- * expect to be covered by this command anyway. ++ * There is an obvious race between allocating the array and LPIs ++ * being mapped/unmapped. If we ended up here as a result of a ++ * command, we're safe (locks are held, preventing another ++ * command). If coming from another path (such as enabling LPIs), ++ * we must be careful not to overrun the array. + */ ++ irq_count = READ_ONCE(dist->lpi_list_count); + intids = kmalloc_array(irq_count, sizeof(intids[0]), GFP_KERNEL); + if (!intids) + return -ENOMEM; + + spin_lock(&dist->lpi_list_lock); + list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) { ++ if (i == irq_count) ++ break; + /* We don't need to "get" the IRQ, as we hold the list lock. */ + if (irq->target_vcpu != vcpu) + continue; |