diff options
author | Mike Pagano <mpagano@gentoo.org> | 2021-10-20 09:24:33 -0400 |
---|---|---|
committer | Mike Pagano <mpagano@gentoo.org> | 2021-10-20 09:24:33 -0400 |
commit | e7b78b9bd6396fc71fba82946496bad8a26276e5 (patch) | |
tree | af843596b7dbf65d41e24c7edbdb32765066f33d | |
parent | Linux patch 5.4.154 (diff) | |
download | linux-patches-e7b78b9bd6396fc71fba82946496bad8a26276e5.tar.gz linux-patches-e7b78b9bd6396fc71fba82946496bad8a26276e5.tar.bz2 linux-patches-e7b78b9bd6396fc71fba82946496bad8a26276e5.zip |
Linux patch 5.4.1555.4-159
Signed-off-by: Mike Pagano <mpagano@gentoo.org>
-rw-r--r-- | 0000_README | 4 | ||||
-rw-r--r-- | 1154_linux-5.4.155.patch | 1612 |
2 files changed, 1616 insertions, 0 deletions
diff --git a/0000_README b/0000_README index 3c15edc2..6bf93a24 100644 --- a/0000_README +++ b/0000_README @@ -659,6 +659,10 @@ Patch: 1153_linux-5.4.154.patch From: http://www.kernel.org Desc: Linux 5.4.154 +Patch: 1154_linux-5.4.155.patch +From: http://www.kernel.org +Desc: Linux 5.4.155 + Patch: 1500_XATTR_USER_PREFIX.patch From: https://bugs.gentoo.org/show_bug.cgi?id=470644 Desc: Support for namespace user.pax.* on tmpfs. diff --git a/1154_linux-5.4.155.patch b/1154_linux-5.4.155.patch new file mode 100644 index 00000000..24744d17 --- /dev/null +++ b/1154_linux-5.4.155.patch @@ -0,0 +1,1612 @@ +diff --git a/Makefile b/Makefile +index 3358f56a37f06..f7e2bf924463b 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 + VERSION = 5 + PATCHLEVEL = 4 +-SUBLEVEL = 154 ++SUBLEVEL = 155 + EXTRAVERSION = + NAME = Kleptomaniac Octopus + +diff --git a/arch/csky/kernel/ptrace.c b/arch/csky/kernel/ptrace.c +index 313623a19ecbf..885194720fe0b 100644 +--- a/arch/csky/kernel/ptrace.c ++++ b/arch/csky/kernel/ptrace.c +@@ -96,7 +96,8 @@ static int gpr_set(struct task_struct *target, + if (ret) + return ret; + +- regs.sr = task_pt_regs(target)->sr; ++ /* BIT(0) of regs.sr is Condition Code/Carry bit */ ++ regs.sr = (regs.sr & BIT(0)) | (task_pt_regs(target)->sr & ~BIT(0)); + #ifdef CONFIG_CPU_HAS_HILO + regs.dcsr = task_pt_regs(target)->dcsr; + #endif +diff --git a/arch/csky/kernel/signal.c b/arch/csky/kernel/signal.c +index 9b1b7c039ddf9..63c2bbe39d03b 100644 +--- a/arch/csky/kernel/signal.c ++++ b/arch/csky/kernel/signal.c +@@ -52,10 +52,14 @@ static long restore_sigcontext(struct pt_regs *regs, + struct sigcontext __user *sc) + { + int err = 0; ++ unsigned long sr = regs->sr; + + /* sc_pt_regs is structured the same as the start of pt_regs */ + err |= __copy_from_user(regs, &sc->sc_pt_regs, sizeof(struct pt_regs)); + ++ /* BIT(0) of regs->sr is Condition Code/Carry bit */ ++ regs->sr = (sr & ~1) | (regs->sr & 1); ++ + /* Restore the floating-point state. */ + err |= restore_fpu_state(sc); + +diff --git a/arch/powerpc/sysdev/xive/common.c b/arch/powerpc/sysdev/xive/common.c +index 2d4c09a77910f..d4467da279668 100644 +--- a/arch/powerpc/sysdev/xive/common.c ++++ b/arch/powerpc/sysdev/xive/common.c +@@ -990,7 +990,8 @@ static int xive_get_irqchip_state(struct irq_data *data, + * interrupt to be inactive in that case. + */ + *state = (pq != XIVE_ESB_INVALID) && !xd->stale_p && +- (xd->saved_p || !!(pq & XIVE_ESB_VAL_P)); ++ (xd->saved_p || (!!(pq & XIVE_ESB_VAL_P) && ++ !irqd_irq_disabled(data))); + return 0; + default: + return -EINVAL; +diff --git a/arch/s390/lib/string.c b/arch/s390/lib/string.c +index 0e30e6e43b0c5..18fbbb679851d 100644 +--- a/arch/s390/lib/string.c ++++ b/arch/s390/lib/string.c +@@ -246,14 +246,13 @@ EXPORT_SYMBOL(strcmp); + #ifdef __HAVE_ARCH_STRRCHR + char *strrchr(const char *s, int c) + { +- size_t len = __strend(s) - s; +- +- if (len) +- do { +- if (s[len] == (char) c) +- return (char *) s + len; +- } while (--len > 0); +- return NULL; ++ ssize_t len = __strend(s) - s; ++ ++ do { ++ if (s[len] == (char)c) ++ return (char *)s + len; ++ } while (--len >= 0); ++ return NULL; + } + EXPORT_SYMBOL(strrchr); + #endif +diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig +index 8c1590432e866..c2a3ec3dd8506 100644 +--- a/arch/x86/Kconfig ++++ b/arch/x86/Kconfig +@@ -1541,7 +1541,6 @@ config AMD_MEM_ENCRYPT + + config AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT + bool "Activate AMD Secure Memory Encryption (SME) by default" +- default y + depends on AMD_MEM_ENCRYPT + ---help--- + Say yes to have system memory encrypted by default if running on +diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c +index 87a34b6e06a2b..130c3c7f56d4b 100644 +--- a/arch/x86/kernel/cpu/resctrl/core.c ++++ b/arch/x86/kernel/cpu/resctrl/core.c +@@ -588,6 +588,8 @@ static void domain_add_cpu(int cpu, struct rdt_resource *r) + } + + if (r->mon_capable && domain_setup_mon_state(r, d)) { ++ kfree(d->ctrl_val); ++ kfree(d->mbps_val); + kfree(d); + return; + } +diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c +index 7d7497b856020..311419d1d6b05 100644 +--- a/drivers/acpi/arm64/gtdt.c ++++ b/drivers/acpi/arm64/gtdt.c +@@ -36,7 +36,7 @@ struct acpi_gtdt_descriptor { + + static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata; + +-static inline void *next_platform_timer(void *platform_timer) ++static inline __init void *next_platform_timer(void *platform_timer) + { + struct acpi_gtdt_header *gh = platform_timer; + +diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c +index 416cfbf2f1c29..8a963d2a951db 100644 +--- a/drivers/ata/libahci_platform.c ++++ b/drivers/ata/libahci_platform.c +@@ -440,10 +440,7 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev, + hpriv->phy_regulator = devm_regulator_get(dev, "phy"); + if (IS_ERR(hpriv->phy_regulator)) { + rc = PTR_ERR(hpriv->phy_regulator); +- if (rc == -EPROBE_DEFER) +- goto err_out; +- rc = 0; +- hpriv->phy_regulator = NULL; ++ goto err_out; + } + + if (flags & AHCI_PLATFORM_GET_RESETS) { +diff --git a/drivers/ata/pata_legacy.c b/drivers/ata/pata_legacy.c +index 4fd12b20df239..d91ba47f2fc44 100644 +--- a/drivers/ata/pata_legacy.c ++++ b/drivers/ata/pata_legacy.c +@@ -315,7 +315,8 @@ static unsigned int pdc_data_xfer_vlb(struct ata_queued_cmd *qc, + iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); + + if (unlikely(slop)) { +- __le32 pad; ++ __le32 pad = 0; ++ + if (rw == READ) { + pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr)); + memcpy(buf + buflen - slop, &pad, slop); +@@ -705,7 +706,8 @@ static unsigned int vlb32_data_xfer(struct ata_queued_cmd *qc, + ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); + + if (unlikely(slop)) { +- __le32 pad; ++ __le32 pad = 0; ++ + if (rw == WRITE) { + memcpy(&pad, buf + buflen - slop, slop); + iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr); +diff --git a/drivers/edac/armada_xp_edac.c b/drivers/edac/armada_xp_edac.c +index 7f227bdcbc845..8c63447154730 100644 +--- a/drivers/edac/armada_xp_edac.c ++++ b/drivers/edac/armada_xp_edac.c +@@ -178,7 +178,7 @@ static void axp_mc_check(struct mem_ctl_info *mci) + "details unavailable (multiple errors)"); + if (cnt_dbe) + edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, +- cnt_sbe, /* error count */ ++ cnt_dbe, /* error count */ + 0, 0, 0, /* pfn, offset, syndrome */ + -1, -1, -1, /* top, mid, low layer */ + mci->ctl_name, +diff --git a/drivers/firmware/efi/cper.c b/drivers/firmware/efi/cper.c +index e48298687b76d..6157038114a2a 100644 +--- a/drivers/firmware/efi/cper.c ++++ b/drivers/firmware/efi/cper.c +@@ -25,8 +25,6 @@ + #include <acpi/ghes.h> + #include <ras/ras_event.h> + +-static char rcd_decode_str[CPER_REC_LEN]; +- + /* + * CPER record ID need to be unique even after reboot, because record + * ID is used as index for ERST storage, while CPER records from +@@ -299,6 +297,7 @@ const char *cper_mem_err_unpack(struct trace_seq *p, + struct cper_mem_err_compact *cmem) + { + const char *ret = trace_seq_buffer_ptr(p); ++ char rcd_decode_str[CPER_REC_LEN]; + + if (cper_mem_err_location(cmem, rcd_decode_str)) + trace_seq_printf(p, "%s", rcd_decode_str); +@@ -313,6 +312,7 @@ static void cper_print_mem(const char *pfx, const struct cper_sec_mem_err *mem, + int len) + { + struct cper_mem_err_compact cmem; ++ char rcd_decode_str[CPER_REC_LEN]; + + /* Don't trust UEFI 2.1/2.2 structure with bad validation bits */ + if (len == sizeof(struct cper_sec_mem_err_old) && +diff --git a/drivers/firmware/efi/runtime-wrappers.c b/drivers/firmware/efi/runtime-wrappers.c +index 65fffaa222108..136b9c7f9ac95 100644 +--- a/drivers/firmware/efi/runtime-wrappers.c ++++ b/drivers/firmware/efi/runtime-wrappers.c +@@ -414,7 +414,7 @@ static void virt_efi_reset_system(int reset_type, + unsigned long data_size, + efi_char16_t *data) + { +- if (down_interruptible(&efi_runtime_lock)) { ++ if (down_trylock(&efi_runtime_lock)) { + pr_warn("failed to invoke the reset_system() runtime service:\n" + "could not get exclusive access to the firmware\n"); + return; +diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c +index d9193ffa17a1e..54da66d02b0e5 100644 +--- a/drivers/gpio/gpio-pca953x.c ++++ b/drivers/gpio/gpio-pca953x.c +@@ -583,21 +583,21 @@ static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip, + + mutex_lock(&chip->i2c_lock); + +- /* Disable pull-up/pull-down */ +- ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0); +- if (ret) +- goto exit; +- + /* Configure pull-up/pull-down */ + if (config == PIN_CONFIG_BIAS_PULL_UP) + ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit); + else if (config == PIN_CONFIG_BIAS_PULL_DOWN) + ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0); ++ else ++ ret = 0; + if (ret) + goto exit; + +- /* Enable pull-up/pull-down */ +- ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit); ++ /* Disable/Enable pull-up/pull-down */ ++ if (config == PIN_CONFIG_BIAS_DISABLE) ++ ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0); ++ else ++ ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit); + + exit: + mutex_unlock(&chip->i2c_lock); +@@ -611,7 +611,9 @@ static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset, + + switch (pinconf_to_config_param(config)) { + case PIN_CONFIG_BIAS_PULL_UP: ++ case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: + case PIN_CONFIG_BIAS_PULL_DOWN: ++ case PIN_CONFIG_BIAS_DISABLE: + return pca953x_gpio_set_pull_up_down(chip, offset, config); + default: + return -ENOTSUPP; +diff --git a/drivers/gpu/drm/msm/dsi/dsi.c b/drivers/gpu/drm/msm/dsi/dsi.c +index 0d37ae5b310c4..a11b98e990019 100644 +--- a/drivers/gpu/drm/msm/dsi/dsi.c ++++ b/drivers/gpu/drm/msm/dsi/dsi.c +@@ -206,8 +206,10 @@ int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struct drm_device *dev, + goto fail; + } + +- if (!msm_dsi_manager_validate_current_config(msm_dsi->id)) ++ if (!msm_dsi_manager_validate_current_config(msm_dsi->id)) { ++ ret = -EINVAL; + goto fail; ++ } + + msm_dsi->encoder = encoder; + +diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c +index 1e7b1be25bb07..5613234823f7d 100644 +--- a/drivers/gpu/drm/msm/dsi/dsi_host.c ++++ b/drivers/gpu/drm/msm/dsi/dsi_host.c +@@ -460,7 +460,7 @@ static int dsi_bus_clk_enable(struct msm_dsi_host *msm_host) + + return 0; + err: +- for (; i > 0; i--) ++ while (--i >= 0) + clk_disable_unprepare(msm_host->bus_clks[i]); + + return ret; +diff --git a/drivers/gpu/drm/msm/edp/edp_ctrl.c b/drivers/gpu/drm/msm/edp/edp_ctrl.c +index 7f3dd3ffe2c9b..bbbd96f9eaa06 100644 +--- a/drivers/gpu/drm/msm/edp/edp_ctrl.c ++++ b/drivers/gpu/drm/msm/edp/edp_ctrl.c +@@ -1082,7 +1082,7 @@ void msm_edp_ctrl_power(struct edp_ctrl *ctrl, bool on) + int msm_edp_ctrl_init(struct msm_edp *edp) + { + struct edp_ctrl *ctrl = NULL; +- struct device *dev = &edp->pdev->dev; ++ struct device *dev; + int ret; + + if (!edp) { +@@ -1090,6 +1090,7 @@ int msm_edp_ctrl_init(struct msm_edp *edp) + return -EINVAL; + } + ++ dev = &edp->pdev->dev; + ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL); + if (!ctrl) + return -ENOMEM; +diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig +index f152bc4eeb535..e70ccadf7541d 100644 +--- a/drivers/gpu/drm/panel/Kconfig ++++ b/drivers/gpu/drm/panel/Kconfig +@@ -141,6 +141,7 @@ config DRM_PANEL_OLIMEX_LCD_OLINUXINO + depends on OF + depends on I2C + depends on BACKLIGHT_CLASS_DEVICE ++ select CRC32 + help + The panel is used with different sizes LCDs, from 480x272 to + 1280x800, and 24 bit per pixel. +diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c +index d3fc39df535dc..552baf327d0c4 100644 +--- a/drivers/iio/adc/aspeed_adc.c ++++ b/drivers/iio/adc/aspeed_adc.c +@@ -184,6 +184,7 @@ static int aspeed_adc_probe(struct platform_device *pdev) + + data = iio_priv(indio_dev); + data->dev = &pdev->dev; ++ platform_set_drvdata(pdev, indio_dev); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + data->base = devm_ioremap_resource(&pdev->dev, res); +diff --git a/drivers/iio/adc/mt6577_auxadc.c b/drivers/iio/adc/mt6577_auxadc.c +index 2449d91e47665..9cdb9084c64e8 100644 +--- a/drivers/iio/adc/mt6577_auxadc.c ++++ b/drivers/iio/adc/mt6577_auxadc.c +@@ -82,6 +82,10 @@ static const struct iio_chan_spec mt6577_auxadc_iio_channels[] = { + MT6577_AUXADC_CHANNEL(15), + }; + ++/* For Voltage calculation */ ++#define VOLTAGE_FULL_RANGE 1500 /* VA voltage */ ++#define AUXADC_PRECISE 4096 /* 12 bits */ ++ + static int mt_auxadc_get_cali_data(int rawdata, bool enable_cali) + { + return rawdata; +@@ -191,6 +195,10 @@ static int mt6577_auxadc_read_raw(struct iio_dev *indio_dev, + } + if (adc_dev->dev_comp->sample_data_cali) + *val = mt_auxadc_get_cali_data(*val, true); ++ ++ /* Convert adc raw data to voltage: 0 - 1500 mV */ ++ *val = *val * VOLTAGE_FULL_RANGE / AUXADC_PRECISE; ++ + return IIO_VAL_INT; + + default: +diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s052.c +index 1e5a936b5b6ad..4267d756cd50e 100644 +--- a/drivers/iio/adc/ti-adc128s052.c ++++ b/drivers/iio/adc/ti-adc128s052.c +@@ -172,7 +172,13 @@ static int adc128_probe(struct spi_device *spi) + mutex_init(&adc->lock); + + ret = iio_device_register(indio_dev); ++ if (ret) ++ goto err_disable_regulator; + ++ return 0; ++ ++err_disable_regulator: ++ regulator_disable(adc->reg); + return ret; + } + +diff --git a/drivers/iio/common/ssp_sensors/ssp_spi.c b/drivers/iio/common/ssp_sensors/ssp_spi.c +index 7db3d5886e3ee..d98e0a04add05 100644 +--- a/drivers/iio/common/ssp_sensors/ssp_spi.c ++++ b/drivers/iio/common/ssp_sensors/ssp_spi.c +@@ -137,7 +137,7 @@ static int ssp_print_mcu_debug(char *data_frame, int *data_index, + if (length > received_len - *data_index || length <= 0) { + ssp_dbg("[SSP]: MSG From MCU-invalid debug length(%d/%d)\n", + length, received_len); +- return length ? length : -EPROTO; ++ return -EPROTO; + } + + ssp_dbg("[SSP]: MSG From MCU - %s\n", &data_frame[*data_index]); +@@ -273,6 +273,8 @@ static int ssp_parse_dataframe(struct ssp_data *data, char *dataframe, int len) + for (idx = 0; idx < len;) { + switch (dataframe[idx++]) { + case SSP_MSG2AP_INST_BYPASS_DATA: ++ if (idx >= len) ++ return -EPROTO; + sd = dataframe[idx++]; + if (sd < 0 || sd >= SSP_SENSOR_MAX) { + dev_err(SSP_DEV, +@@ -282,10 +284,13 @@ static int ssp_parse_dataframe(struct ssp_data *data, char *dataframe, int len) + + if (indio_devs[sd]) { + spd = iio_priv(indio_devs[sd]); +- if (spd->process_data) ++ if (spd->process_data) { ++ if (idx >= len) ++ return -EPROTO; + spd->process_data(indio_devs[sd], + &dataframe[idx], + data->timestamp); ++ } + } else { + dev_err(SSP_DEV, "no client for frame\n"); + } +@@ -293,6 +298,8 @@ static int ssp_parse_dataframe(struct ssp_data *data, char *dataframe, int len) + idx += ssp_offset_map[sd]; + break; + case SSP_MSG2AP_INST_DEBUG_DATA: ++ if (idx >= len) ++ return -EPROTO; + sd = ssp_print_mcu_debug(dataframe, &idx, len); + if (sd) { + dev_err(SSP_DEV, +diff --git a/drivers/iio/dac/ti-dac5571.c b/drivers/iio/dac/ti-dac5571.c +index 3a2bb0efe50de..51c41ccf00ad9 100644 +--- a/drivers/iio/dac/ti-dac5571.c ++++ b/drivers/iio/dac/ti-dac5571.c +@@ -352,6 +352,7 @@ static int dac5571_probe(struct i2c_client *client, + data->dac5571_pwrdwn = dac5571_pwrdwn_quad; + break; + default: ++ ret = -EINVAL; + goto err; + } + +diff --git a/drivers/iio/light/opt3001.c b/drivers/iio/light/opt3001.c +index 92004a2563ea8..5588066c83246 100644 +--- a/drivers/iio/light/opt3001.c ++++ b/drivers/iio/light/opt3001.c +@@ -275,6 +275,8 @@ static int opt3001_get_lux(struct opt3001 *opt, int *val, int *val2) + ret = wait_event_timeout(opt->result_ready_queue, + opt->result_ready, + msecs_to_jiffies(OPT3001_RESULT_READY_LONG)); ++ if (ret == 0) ++ return -ETIMEDOUT; + } else { + /* Sleep for result ready time */ + timeout = (opt->int_time == OPT3001_INT_TIME_SHORT) ? +@@ -311,9 +313,7 @@ err: + /* Disallow IRQ to access the device while lock is active */ + opt->ok_to_ignore_lock = false; + +- if (ret == 0) +- return -ETIMEDOUT; +- else if (ret < 0) ++ if (ret < 0) + return ret; + + if (opt->use_irq) { +diff --git a/drivers/input/joystick/xpad.c b/drivers/input/joystick/xpad.c +index e5f1e3cf9179f..ba101afcfc27f 100644 +--- a/drivers/input/joystick/xpad.c ++++ b/drivers/input/joystick/xpad.c +@@ -331,6 +331,7 @@ static const struct xpad_device { + { 0x24c6, 0x5b03, "Thrustmaster Ferrari 458 Racing Wheel", 0, XTYPE_XBOX360 }, + { 0x24c6, 0x5d04, "Razer Sabertooth", 0, XTYPE_XBOX360 }, + { 0x24c6, 0xfafe, "Rock Candy Gamepad for Xbox 360", 0, XTYPE_XBOX360 }, ++ { 0x3285, 0x0607, "Nacon GC-100", 0, XTYPE_XBOX360 }, + { 0x3767, 0x0101, "Fanatec Speedster 3 Forceshock Wheel", 0, XTYPE_XBOX }, + { 0xffff, 0xffff, "Chinese-made Xbox Controller", 0, XTYPE_XBOX }, + { 0x0000, 0x0000, "Generic X-Box pad", 0, XTYPE_UNKNOWN } +@@ -447,6 +448,7 @@ static const struct usb_device_id xpad_table[] = { + XPAD_XBOXONE_VENDOR(0x24c6), /* PowerA Controllers */ + XPAD_XBOXONE_VENDOR(0x2e24), /* Hyperkin Duke X-Box One pad */ + XPAD_XBOX360_VENDOR(0x2f24), /* GameSir Controllers */ ++ XPAD_XBOX360_VENDOR(0x3285), /* Nacon GC-100 */ + { } + }; + +diff --git a/drivers/misc/cb710/sgbuf2.c b/drivers/misc/cb710/sgbuf2.c +index dfd2969e36289..d52e079bb324e 100644 +--- a/drivers/misc/cb710/sgbuf2.c ++++ b/drivers/misc/cb710/sgbuf2.c +@@ -47,7 +47,7 @@ static inline bool needs_unaligned_copy(const void *ptr) + #ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS + return false; + #else +- return ((ptr - NULL) & 3) != 0; ++ return ((uintptr_t)ptr & 3) != 0; + #endif + } + +diff --git a/drivers/misc/mei/hw-me-regs.h b/drivers/misc/mei/hw-me-regs.h +index e56dc47540646..556133daa25e9 100644 +--- a/drivers/misc/mei/hw-me-regs.h ++++ b/drivers/misc/mei/hw-me-regs.h +@@ -90,6 +90,7 @@ + #define MEI_DEV_ID_CDF 0x18D3 /* Cedar Fork */ + + #define MEI_DEV_ID_ICP_LP 0x34E0 /* Ice Lake Point LP */ ++#define MEI_DEV_ID_ICP_N 0x38E0 /* Ice Lake Point N */ + + #define MEI_DEV_ID_TGP_LP 0xA0E0 /* Tiger Lake Point LP */ + +diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c +index 75ab2ffbf235f..d7233f2238651 100644 +--- a/drivers/misc/mei/pci-me.c ++++ b/drivers/misc/mei/pci-me.c +@@ -103,6 +103,7 @@ static const struct pci_device_id mei_me_pci_tbl[] = { + {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_H_3, MEI_ME_PCH8_CFG)}, + + {MEI_PCI_DEVICE(MEI_DEV_ID_ICP_LP, MEI_ME_PCH12_CFG)}, ++ {MEI_PCI_DEVICE(MEI_DEV_ID_ICP_N, MEI_ME_PCH12_CFG)}, + + {MEI_PCI_DEVICE(MEI_DEV_ID_TGP_LP, MEI_ME_PCH12_CFG)}, + +diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig +index e8e9c166185de..2d4eb2f280a12 100644 +--- a/drivers/net/ethernet/Kconfig ++++ b/drivers/net/ethernet/Kconfig +@@ -100,6 +100,7 @@ config JME + config KORINA + tristate "Korina (IDT RC32434) Ethernet support" + depends on MIKROTIK_RB532 ++ select CRC32 + ---help--- + If you have a Mikrotik RouterBoard 500 or IDT RC32434 + based system say Y. Otherwise say N. +diff --git a/drivers/net/ethernet/arc/Kconfig b/drivers/net/ethernet/arc/Kconfig +index 45c663d8b9aab..2cd0e45d0b6c1 100644 +--- a/drivers/net/ethernet/arc/Kconfig ++++ b/drivers/net/ethernet/arc/Kconfig +@@ -21,6 +21,7 @@ config ARC_EMAC_CORE + depends on ARC || ARCH_ROCKCHIP || COMPILE_TEST + select MII + select PHYLIB ++ select CRC32 + + config ARC_EMAC + tristate "ARC EMAC support" +diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +index 24c49a84947f3..5f4f0f61c83c8 100644 +--- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c ++++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +@@ -3805,20 +3805,67 @@ static int set_feature_rx_all(struct net_device *netdev, bool enable) + return mlx5_set_port_fcs(mdev, !enable); + } + ++static int mlx5e_set_rx_port_ts(struct mlx5_core_dev *mdev, bool enable) ++{ ++ u32 in[MLX5_ST_SZ_DW(pcmr_reg)] = {}; ++ bool supported, curr_state; ++ int err; ++ ++ if (!MLX5_CAP_GEN(mdev, ports_check)) ++ return 0; ++ ++ err = mlx5_query_ports_check(mdev, in, sizeof(in)); ++ if (err) ++ return err; ++ ++ supported = MLX5_GET(pcmr_reg, in, rx_ts_over_crc_cap); ++ curr_state = MLX5_GET(pcmr_reg, in, rx_ts_over_crc); ++ ++ if (!supported || enable == curr_state) ++ return 0; ++ ++ MLX5_SET(pcmr_reg, in, local_port, 1); ++ MLX5_SET(pcmr_reg, in, rx_ts_over_crc, enable); ++ ++ return mlx5_set_ports_check(mdev, in, sizeof(in)); ++} ++ + static int set_feature_rx_fcs(struct net_device *netdev, bool enable) + { + struct mlx5e_priv *priv = netdev_priv(netdev); ++ struct mlx5e_channels *chs = &priv->channels; ++ struct mlx5_core_dev *mdev = priv->mdev; + int err; + + mutex_lock(&priv->state_lock); + +- priv->channels.params.scatter_fcs_en = enable; +- err = mlx5e_modify_channels_scatter_fcs(&priv->channels, enable); +- if (err) +- priv->channels.params.scatter_fcs_en = !enable; ++ if (enable) { ++ err = mlx5e_set_rx_port_ts(mdev, false); ++ if (err) ++ goto out; + +- mutex_unlock(&priv->state_lock); ++ chs->params.scatter_fcs_en = true; ++ err = mlx5e_modify_channels_scatter_fcs(chs, true); ++ if (err) { ++ chs->params.scatter_fcs_en = false; ++ mlx5e_set_rx_port_ts(mdev, true); ++ } ++ } else { ++ chs->params.scatter_fcs_en = false; ++ err = mlx5e_modify_channels_scatter_fcs(chs, false); ++ if (err) { ++ chs->params.scatter_fcs_en = true; ++ goto out; ++ } ++ err = mlx5e_set_rx_port_ts(mdev, true); ++ if (err) { ++ mlx5_core_warn(mdev, "Failed to set RX port timestamp %d\n", err); ++ err = 0; ++ } ++ } + ++out: ++ mutex_unlock(&priv->state_lock); + return err; + } + +diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c +index c3fc1cc4bb2b9..882ea12098b7a 100644 +--- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c ++++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c +@@ -25,16 +25,8 @@ + #define MLXSW_THERMAL_ZONE_MAX_NAME 16 + #define MLXSW_THERMAL_TEMP_SCORE_MAX GENMASK(31, 0) + #define MLXSW_THERMAL_MAX_STATE 10 ++#define MLXSW_THERMAL_MIN_STATE 2 + #define MLXSW_THERMAL_MAX_DUTY 255 +-/* Minimum and maximum fan allowed speed in percent: from 20% to 100%. Values +- * MLXSW_THERMAL_MAX_STATE + x, where x is between 2 and 10 are used for +- * setting fan speed dynamic minimum. For example, if value is set to 14 (40%) +- * cooling levels vector will be set to 4, 4, 4, 4, 4, 5, 6, 7, 8, 9, 10 to +- * introduce PWM speed in percent: 40, 40, 40, 40, 40, 50, 60. 70, 80, 90, 100. +- */ +-#define MLXSW_THERMAL_SPEED_MIN (MLXSW_THERMAL_MAX_STATE + 2) +-#define MLXSW_THERMAL_SPEED_MAX (MLXSW_THERMAL_MAX_STATE * 2) +-#define MLXSW_THERMAL_SPEED_MIN_LEVEL 2 /* 20% */ + + /* External cooling devices, allowed for binding to mlxsw thermal zones. */ + static char * const mlxsw_thermal_external_allowed_cdev[] = { +@@ -703,49 +695,16 @@ static int mlxsw_thermal_set_cur_state(struct thermal_cooling_device *cdev, + struct mlxsw_thermal *thermal = cdev->devdata; + struct device *dev = thermal->bus_info->dev; + char mfsc_pl[MLXSW_REG_MFSC_LEN]; +- unsigned long cur_state, i; + int idx; +- u8 duty; + int err; + ++ if (state > MLXSW_THERMAL_MAX_STATE) ++ return -EINVAL; ++ + idx = mlxsw_get_cooling_device_idx(thermal, cdev); + if (idx < 0) + return idx; + +- /* Verify if this request is for changing allowed fan dynamical +- * minimum. If it is - update cooling levels accordingly and update +- * state, if current state is below the newly requested minimum state. +- * For example, if current state is 5, and minimal state is to be +- * changed from 4 to 6, thermal->cooling_levels[0 to 5] will be changed +- * all from 4 to 6. And state 5 (thermal->cooling_levels[4]) should be +- * overwritten. +- */ +- if (state >= MLXSW_THERMAL_SPEED_MIN && +- state <= MLXSW_THERMAL_SPEED_MAX) { +- state -= MLXSW_THERMAL_MAX_STATE; +- for (i = 0; i <= MLXSW_THERMAL_MAX_STATE; i++) +- thermal->cooling_levels[i] = max(state, i); +- +- mlxsw_reg_mfsc_pack(mfsc_pl, idx, 0); +- err = mlxsw_reg_query(thermal->core, MLXSW_REG(mfsc), mfsc_pl); +- if (err) +- return err; +- +- duty = mlxsw_reg_mfsc_pwm_duty_cycle_get(mfsc_pl); +- cur_state = mlxsw_duty_to_state(duty); +- +- /* If current fan state is lower than requested dynamical +- * minimum, increase fan speed up to dynamical minimum. +- */ +- if (state < cur_state) +- return 0; +- +- state = cur_state; +- } +- +- if (state > MLXSW_THERMAL_MAX_STATE) +- return -EINVAL; +- + /* Normalize the state to the valid speed range. */ + state = thermal->cooling_levels[state]; + mlxsw_reg_mfsc_pack(mfsc_pl, idx, mlxsw_state_to_duty(state)); +@@ -1040,8 +999,7 @@ int mlxsw_thermal_init(struct mlxsw_core *core, + + /* Initialize cooling levels per PWM state. */ + for (i = 0; i < MLXSW_THERMAL_MAX_STATE; i++) +- thermal->cooling_levels[i] = max(MLXSW_THERMAL_SPEED_MIN_LEVEL, +- i); ++ thermal->cooling_levels[i] = max(MLXSW_THERMAL_MIN_STATE, i); + + thermal->polling_delay = bus_info->low_frequency ? + MLXSW_THERMAL_SLOW_POLL_INT : +diff --git a/drivers/net/ethernet/microchip/encx24j600-regmap.c b/drivers/net/ethernet/microchip/encx24j600-regmap.c +index 1f496fac70332..e2528633c09a1 100644 +--- a/drivers/net/ethernet/microchip/encx24j600-regmap.c ++++ b/drivers/net/ethernet/microchip/encx24j600-regmap.c +@@ -502,13 +502,19 @@ static struct regmap_bus phymap_encx24j600 = { + .reg_read = regmap_encx24j600_phy_reg_read, + }; + +-void devm_regmap_init_encx24j600(struct device *dev, +- struct encx24j600_context *ctx) ++int devm_regmap_init_encx24j600(struct device *dev, ++ struct encx24j600_context *ctx) + { + mutex_init(&ctx->mutex); + regcfg.lock_arg = ctx; + ctx->regmap = devm_regmap_init(dev, ®map_encx24j600, ctx, ®cfg); ++ if (IS_ERR(ctx->regmap)) ++ return PTR_ERR(ctx->regmap); + ctx->phymap = devm_regmap_init(dev, &phymap_encx24j600, ctx, &phycfg); ++ if (IS_ERR(ctx->phymap)) ++ return PTR_ERR(ctx->phymap); ++ ++ return 0; + } + EXPORT_SYMBOL_GPL(devm_regmap_init_encx24j600); + +diff --git a/drivers/net/ethernet/microchip/encx24j600.c b/drivers/net/ethernet/microchip/encx24j600.c +index c3a6edc0ddf62..6b43afc4e3246 100644 +--- a/drivers/net/ethernet/microchip/encx24j600.c ++++ b/drivers/net/ethernet/microchip/encx24j600.c +@@ -1027,10 +1027,13 @@ static int encx24j600_spi_probe(struct spi_device *spi) + priv->speed = SPEED_100; + + priv->ctx.spi = spi; +- devm_regmap_init_encx24j600(&spi->dev, &priv->ctx); + ndev->irq = spi->irq; + ndev->netdev_ops = &encx24j600_netdev_ops; + ++ ret = devm_regmap_init_encx24j600(&spi->dev, &priv->ctx); ++ if (ret) ++ goto out_free; ++ + mutex_init(&priv->lock); + + /* Reset device and check if it is connected */ +diff --git a/drivers/net/ethernet/microchip/encx24j600_hw.h b/drivers/net/ethernet/microchip/encx24j600_hw.h +index f604a260ede79..711147a159aa9 100644 +--- a/drivers/net/ethernet/microchip/encx24j600_hw.h ++++ b/drivers/net/ethernet/microchip/encx24j600_hw.h +@@ -15,8 +15,8 @@ struct encx24j600_context { + int bank; + }; + +-void devm_regmap_init_encx24j600(struct device *dev, +- struct encx24j600_context *ctx); ++int devm_regmap_init_encx24j600(struct device *dev, ++ struct encx24j600_context *ctx); + + /* Single-byte instructions */ + #define BANK_SELECT(bank) (0xC0 | ((bank & (BANK_MASK >> BANK_SHIFT)) << 1)) +diff --git a/drivers/net/ethernet/neterion/s2io.c b/drivers/net/ethernet/neterion/s2io.c +index e0b2bf3279053..71ab4e9c9a171 100644 +--- a/drivers/net/ethernet/neterion/s2io.c ++++ b/drivers/net/ethernet/neterion/s2io.c +@@ -8565,7 +8565,7 @@ static void s2io_io_resume(struct pci_dev *pdev) + return; + } + +- if (s2io_set_mac_addr(netdev, netdev->dev_addr) == FAILURE) { ++ if (do_s2io_prog_unicast(netdev, netdev->dev_addr) == FAILURE) { + s2io_card_down(sp); + pr_err("Can't restore mac addr after reset.\n"); + return; +diff --git a/drivers/net/ethernet/pensando/ionic/ionic_lif.c b/drivers/net/ethernet/pensando/ionic/ionic_lif.c +index e66002251596b..99ba3551458fc 100644 +--- a/drivers/net/ethernet/pensando/ionic/ionic_lif.c ++++ b/drivers/net/ethernet/pensando/ionic/ionic_lif.c +@@ -912,6 +912,10 @@ static int ionic_addr_add(struct net_device *netdev, const u8 *addr) + + static int ionic_addr_del(struct net_device *netdev, const u8 *addr) + { ++ /* Don't delete our own address from the uc list */ ++ if (ether_addr_equal(addr, netdev->dev_addr)) ++ return 0; ++ + return ionic_lif_addr(netdev_priv(netdev), addr, false); + } + +diff --git a/drivers/net/ethernet/qlogic/qed/qed_main.c b/drivers/net/ethernet/qlogic/qed/qed_main.c +index 1db49424aa43c..1cbcc27602780 100644 +--- a/drivers/net/ethernet/qlogic/qed/qed_main.c ++++ b/drivers/net/ethernet/qlogic/qed/qed_main.c +@@ -1238,6 +1238,7 @@ static int qed_slowpath_start(struct qed_dev *cdev, + } else { + DP_NOTICE(cdev, + "Failed to acquire PTT for aRFS\n"); ++ rc = -EINVAL; + goto err; + } + } +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c +index 2bac49b49f739..fbf2deafe8ba3 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c +@@ -218,11 +218,18 @@ static void dwmac1000_dump_dma_regs(void __iomem *ioaddr, u32 *reg_space) + readl(ioaddr + DMA_BUS_MODE + i * 4); + } + +-static void dwmac1000_get_hw_feature(void __iomem *ioaddr, +- struct dma_features *dma_cap) ++static int dwmac1000_get_hw_feature(void __iomem *ioaddr, ++ struct dma_features *dma_cap) + { + u32 hw_cap = readl(ioaddr + DMA_HW_FEATURE); + ++ if (!hw_cap) { ++ /* 0x00000000 is the value read on old hardware that does not ++ * implement this register ++ */ ++ return -EOPNOTSUPP; ++ } ++ + dma_cap->mbps_10_100 = (hw_cap & DMA_HW_FEAT_MIISEL); + dma_cap->mbps_1000 = (hw_cap & DMA_HW_FEAT_GMIISEL) >> 1; + dma_cap->half_duplex = (hw_cap & DMA_HW_FEAT_HDSEL) >> 2; +@@ -252,6 +259,8 @@ static void dwmac1000_get_hw_feature(void __iomem *ioaddr, + dma_cap->number_tx_channel = (hw_cap & DMA_HW_FEAT_TXCHCNT) >> 22; + /* Alternate (enhanced) DESC mode */ + dma_cap->enh_desc = (hw_cap & DMA_HW_FEAT_ENHDESSEL) >> 24; ++ ++ return 0; + } + + static void dwmac1000_rx_watchdog(void __iomem *ioaddr, u32 riwt, +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c +index 0d993f4b701c2..ae473d85b7fb8 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c +@@ -336,8 +336,8 @@ static void dwmac4_dma_tx_chan_op_mode(void __iomem *ioaddr, int mode, + writel(mtl_tx_op, ioaddr + MTL_CHAN_TX_OP_MODE(channel)); + } + +-static void dwmac4_get_hw_feature(void __iomem *ioaddr, +- struct dma_features *dma_cap) ++static int dwmac4_get_hw_feature(void __iomem *ioaddr, ++ struct dma_features *dma_cap) + { + u32 hw_cap = readl(ioaddr + GMAC_HW_FEATURE0); + +@@ -400,6 +400,8 @@ static void dwmac4_get_hw_feature(void __iomem *ioaddr, + dma_cap->frpbs = (hw_cap & GMAC_HW_FEAT_FRPBS) >> 11; + dma_cap->frpsel = (hw_cap & GMAC_HW_FEAT_FRPSEL) >> 10; + dma_cap->dvlan = (hw_cap & GMAC_HW_FEAT_DVLAN) >> 5; ++ ++ return 0; + } + + /* Enable/disable TSO feature and set MSS */ +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c +index 4af7271cea561..07ef0ac725b3e 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c +@@ -356,8 +356,8 @@ static int dwxgmac2_dma_interrupt(void __iomem *ioaddr, + return ret; + } + +-static void dwxgmac2_get_hw_feature(void __iomem *ioaddr, +- struct dma_features *dma_cap) ++static int dwxgmac2_get_hw_feature(void __iomem *ioaddr, ++ struct dma_features *dma_cap) + { + u32 hw_cap; + +@@ -425,6 +425,8 @@ static void dwxgmac2_get_hw_feature(void __iomem *ioaddr, + dma_cap->frpes = (hw_cap & XGMAC_HWFEAT_FRPES) >> 11; + dma_cap->frpbs = (hw_cap & XGMAC_HWFEAT_FRPPB) >> 9; + dma_cap->frpsel = (hw_cap & XGMAC_HWFEAT_FRPSEL) >> 3; ++ ++ return 0; + } + + static void dwxgmac2_rx_watchdog(void __iomem *ioaddr, u32 riwt, u32 nchan) +diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h +index 9010d881b12e5..59a1d8c003721 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/hwif.h ++++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h +@@ -196,8 +196,8 @@ struct stmmac_dma_ops { + int (*dma_interrupt) (void __iomem *ioaddr, + struct stmmac_extra_stats *x, u32 chan); + /* If supported then get the optional core features */ +- void (*get_hw_feature)(void __iomem *ioaddr, +- struct dma_features *dma_cap); ++ int (*get_hw_feature)(void __iomem *ioaddr, ++ struct dma_features *dma_cap); + /* Program the HW RX Watchdog */ + void (*rx_watchdog)(void __iomem *ioaddr, u32 riwt, u32 number_chan); + void (*set_tx_ring_len)(void __iomem *ioaddr, u32 len, u32 chan); +@@ -247,7 +247,7 @@ struct stmmac_dma_ops { + #define stmmac_dma_interrupt_status(__priv, __args...) \ + stmmac_do_callback(__priv, dma, dma_interrupt, __args) + #define stmmac_get_hw_feature(__priv, __args...) \ +- stmmac_do_void_callback(__priv, dma, get_hw_feature, __args) ++ stmmac_do_callback(__priv, dma, get_hw_feature, __args) + #define stmmac_rx_watchdog(__priv, __args...) \ + stmmac_do_void_callback(__priv, dma, rx_watchdog, __args) + #define stmmac_set_tx_ring_len(__priv, __args...) \ +diff --git a/drivers/net/usb/Kconfig b/drivers/net/usb/Kconfig +index 05bdcc5917f6b..ca234d1a0e3bf 100644 +--- a/drivers/net/usb/Kconfig ++++ b/drivers/net/usb/Kconfig +@@ -99,6 +99,10 @@ config USB_RTL8150 + config USB_RTL8152 + tristate "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters" + select MII ++ select CRC32 ++ select CRYPTO ++ select CRYPTO_HASH ++ select CRYPTO_SHA256 + help + This option adds support for Realtek RTL8152 based USB 2.0 + 10/100 Ethernet adapters and RTL8153 based USB 3.0 10/100/1000 +diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c +index 6da270e8c6746..c0f4324d8f7c8 100644 +--- a/drivers/nvmem/core.c ++++ b/drivers/nvmem/core.c +@@ -954,7 +954,8 @@ static void nvmem_shift_read_buffer_in_place(struct nvmem_cell *cell, void *buf) + *p-- = 0; + + /* clear msb bits if any leftover in the last byte */ +- *p &= GENMASK((cell->nbits%BITS_PER_BYTE) - 1, 0); ++ if (cell->nbits % BITS_PER_BYTE) ++ *p &= GENMASK((cell->nbits % BITS_PER_BYTE) - 1, 0); + } + + static int __nvmem_cell_read(struct nvmem_device *nvmem, +diff --git a/drivers/platform/mellanox/mlxreg-io.c b/drivers/platform/mellanox/mlxreg-io.c +index acfaf64ffde68..1c3760c13f832 100644 +--- a/drivers/platform/mellanox/mlxreg-io.c ++++ b/drivers/platform/mellanox/mlxreg-io.c +@@ -123,7 +123,7 @@ mlxreg_io_attr_store(struct device *dev, struct device_attribute *attr, + return -EINVAL; + + /* Convert buffer to input value. */ +- ret = kstrtou32(buf, len, &input_val); ++ ret = kstrtou32(buf, 0, &input_val); + if (ret) + return ret; + +diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c +index d242779297ba7..ae8fa4ff05ee3 100644 +--- a/drivers/usb/host/xhci-pci.c ++++ b/drivers/usb/host/xhci-pci.c +@@ -28,6 +28,7 @@ + #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73 + #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000 + #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1009 0x1009 ++#define PCI_DEVICE_ID_FRESCO_LOGIC_FL1100 0x1100 + #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400 0x1400 + + #define PCI_VENDOR_ID_ETRON 0x1b6f +@@ -98,6 +99,7 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) + /* Look for vendor-specific quirks */ + if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC && + (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK || ++ pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1100 || + pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) { + if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK && + pdev->revision == 0x0) { +diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c +index 1228b3d92db06..2c92fd19e7822 100644 +--- a/drivers/usb/host/xhci-ring.c ++++ b/drivers/usb/host/xhci-ring.c +@@ -339,16 +339,22 @@ static void xhci_handle_stopped_cmd_ring(struct xhci_hcd *xhci, + /* Must be called with xhci->lock held, releases and aquires lock back */ + static int xhci_abort_cmd_ring(struct xhci_hcd *xhci, unsigned long flags) + { +- u64 temp_64; ++ u32 temp_32; + int ret; + + xhci_dbg(xhci, "Abort command ring\n"); + + reinit_completion(&xhci->cmd_ring_stop_completion); + +- temp_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); +- xhci_write_64(xhci, temp_64 | CMD_RING_ABORT, +- &xhci->op_regs->cmd_ring); ++ /* ++ * The control bits like command stop, abort are located in lower ++ * dword of the command ring control register. Limit the write ++ * to the lower dword to avoid corrupting the command ring pointer ++ * in case if the command ring is stopped by the time upper dword ++ * is written. ++ */ ++ temp_32 = readl(&xhci->op_regs->cmd_ring); ++ writel(temp_32 | CMD_RING_ABORT, &xhci->op_regs->cmd_ring); + + /* Section 4.6.1.2 of xHCI 1.0 spec says software should also time the + * completion of the Command Abort operation. If CRR is not negated in 5 +diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c +index 02a2afd130eb6..4ef7484dff8b2 100644 +--- a/drivers/usb/host/xhci.c ++++ b/drivers/usb/host/xhci.c +@@ -3173,10 +3173,13 @@ static void xhci_endpoint_reset(struct usb_hcd *hcd, + return; + + /* Bail out if toggle is already being cleared by a endpoint reset */ ++ spin_lock_irqsave(&xhci->lock, flags); + if (ep->ep_state & EP_HARD_CLEAR_TOGGLE) { + ep->ep_state &= ~EP_HARD_CLEAR_TOGGLE; ++ spin_unlock_irqrestore(&xhci->lock, flags); + return; + } ++ spin_unlock_irqrestore(&xhci->lock, flags); + /* Only interrupt and bulk ep's use data toggle, USB2 spec 5.5.4-> */ + if (usb_endpoint_xfer_control(&host_ep->desc) || + usb_endpoint_xfer_isoc(&host_ep->desc)) +@@ -3262,8 +3265,10 @@ static void xhci_endpoint_reset(struct usb_hcd *hcd, + xhci_free_command(xhci, cfg_cmd); + cleanup: + xhci_free_command(xhci, stop_cmd); ++ spin_lock_irqsave(&xhci->lock, flags); + if (ep->ep_state & EP_SOFT_CLEAR_TOGGLE) + ep->ep_state &= ~EP_SOFT_CLEAR_TOGGLE; ++ spin_unlock_irqrestore(&xhci->lock, flags); + } + + static int xhci_check_streams_endpoint(struct xhci_hcd *xhci, +diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c +index 89d659cef5c63..1b9ebd756f097 100644 +--- a/drivers/usb/musb/musb_dsps.c ++++ b/drivers/usb/musb/musb_dsps.c +@@ -899,11 +899,13 @@ static int dsps_probe(struct platform_device *pdev) + if (usb_get_dr_mode(&pdev->dev) == USB_DR_MODE_PERIPHERAL) { + ret = dsps_setup_optional_vbus_irq(pdev, glue); + if (ret) +- goto err; ++ goto unregister_pdev; + } + + return 0; + ++unregister_pdev: ++ platform_device_unregister(glue->musb); + err: + pm_runtime_disable(&pdev->dev); + iounmap(glue->usbss_base); +diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c +index 82016d9781460..a1e9cbe518c74 100644 +--- a/drivers/usb/serial/option.c ++++ b/drivers/usb/serial/option.c +@@ -246,11 +246,13 @@ static void option_instat_callback(struct urb *urb); + /* These Quectel products use Quectel's vendor ID */ + #define QUECTEL_PRODUCT_EC21 0x0121 + #define QUECTEL_PRODUCT_EC25 0x0125 ++#define QUECTEL_PRODUCT_EG91 0x0191 + #define QUECTEL_PRODUCT_EG95 0x0195 + #define QUECTEL_PRODUCT_BG96 0x0296 + #define QUECTEL_PRODUCT_EP06 0x0306 + #define QUECTEL_PRODUCT_EM12 0x0512 + #define QUECTEL_PRODUCT_RM500Q 0x0800 ++#define QUECTEL_PRODUCT_EC200S_CN 0x6002 + #define QUECTEL_PRODUCT_EC200T 0x6026 + + #define CMOTECH_VENDOR_ID 0x16d8 +@@ -1111,6 +1113,9 @@ static const struct usb_device_id option_ids[] = { + { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EC25, 0xff, 0xff, 0xff), + .driver_info = NUMEP2 }, + { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EC25, 0xff, 0, 0) }, ++ { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EG91, 0xff, 0xff, 0xff), ++ .driver_info = NUMEP2 }, ++ { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EG91, 0xff, 0, 0) }, + { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EG95, 0xff, 0xff, 0xff), + .driver_info = NUMEP2 }, + { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EG95, 0xff, 0, 0) }, +@@ -1128,6 +1133,7 @@ static const struct usb_device_id option_ids[] = { + { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_RM500Q, 0xff, 0, 0) }, + { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_RM500Q, 0xff, 0xff, 0x10), + .driver_info = ZLP }, ++ { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EC200S_CN, 0xff, 0, 0) }, + { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EC200T, 0xff, 0, 0) }, + + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6001) }, +@@ -1227,6 +1233,8 @@ static const struct usb_device_id option_ids[] = { + .driver_info = NCTRL(0) | RSVD(1) | RSVD(2) }, + { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1203, 0xff), /* Telit LE910Cx (RNDIS) */ + .driver_info = NCTRL(2) | RSVD(3) }, ++ { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1204, 0xff), /* Telit LE910Cx (MBIM) */ ++ .driver_info = NCTRL(0) | RSVD(1) }, + { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_LE910_USBCFG4), + .driver_info = NCTRL(0) | RSVD(1) | RSVD(2) | RSVD(3) }, + { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_LE920), +diff --git a/drivers/usb/serial/qcserial.c b/drivers/usb/serial/qcserial.c +index 0f60363c1bbc8..b1b9923162a04 100644 +--- a/drivers/usb/serial/qcserial.c ++++ b/drivers/usb/serial/qcserial.c +@@ -165,6 +165,7 @@ static const struct usb_device_id id_table[] = { + {DEVICE_SWI(0x1199, 0x907b)}, /* Sierra Wireless EM74xx */ + {DEVICE_SWI(0x1199, 0x9090)}, /* Sierra Wireless EM7565 QDL */ + {DEVICE_SWI(0x1199, 0x9091)}, /* Sierra Wireless EM7565 */ ++ {DEVICE_SWI(0x1199, 0x90d2)}, /* Sierra Wireless EM9191 QDL */ + {DEVICE_SWI(0x413c, 0x81a2)}, /* Dell Wireless 5806 Gobi(TM) 4G LTE Mobile Broadband Card */ + {DEVICE_SWI(0x413c, 0x81a3)}, /* Dell Wireless 5570 HSPA+ (42Mbps) Mobile Broadband Card */ + {DEVICE_SWI(0x413c, 0x81a4)}, /* Dell Wireless 5570e HSPA+ (42Mbps) Mobile Broadband Card */ +diff --git a/drivers/virtio/virtio.c b/drivers/virtio/virtio.c +index 59a05f1b81054..91627e7443260 100644 +--- a/drivers/virtio/virtio.c ++++ b/drivers/virtio/virtio.c +@@ -225,6 +225,17 @@ static int virtio_dev_probe(struct device *_d) + driver_features_legacy = driver_features; + } + ++ /* ++ * Some devices detect legacy solely via F_VERSION_1. Write ++ * F_VERSION_1 to force LE config space accesses before FEATURES_OK for ++ * these when needed. ++ */ ++ if (drv->validate && !virtio_legacy_is_little_endian() ++ && device_features & BIT_ULL(VIRTIO_F_VERSION_1)) { ++ dev->features = BIT_ULL(VIRTIO_F_VERSION_1); ++ dev->config->finalize_features(dev); ++ } ++ + if (device_features & (1ULL << VIRTIO_F_VERSION_1)) + dev->features = driver_features & device_features; + else +diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c +index 8e6dfe76f9c9d..4ddb4ea2e4a32 100644 +--- a/drivers/watchdog/orion_wdt.c ++++ b/drivers/watchdog/orion_wdt.c +@@ -52,7 +52,7 @@ + #define WDT_A370_RATIO (1 << WDT_A370_RATIO_SHIFT) + + static bool nowayout = WATCHDOG_NOWAYOUT; +-static int heartbeat = -1; /* module parameter (seconds) */ ++static int heartbeat; /* module parameter (seconds) */ + + struct orion_watchdog; + +diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c +index 5273965226534..19d2104c04629 100644 +--- a/fs/btrfs/extent-tree.c ++++ b/fs/btrfs/extent-tree.c +@@ -4596,6 +4596,7 @@ struct extent_buffer *btrfs_alloc_tree_block(struct btrfs_trans_handle *trans, + out_free_delayed: + btrfs_free_delayed_extent_op(extent_op); + out_free_buf: ++ btrfs_tree_unlock(buf); + free_extent_buffer(buf); + out_free_reserved: + btrfs_free_reserved_extent(fs_info, ins.objectid, ins.offset, 0); +diff --git a/fs/btrfs/tree-log.c b/fs/btrfs/tree-log.c +index 8ea4b3da85d1a..9d358dafef367 100644 +--- a/fs/btrfs/tree-log.c ++++ b/fs/btrfs/tree-log.c +@@ -1160,7 +1160,10 @@ next: + /* look for a conflicting sequence number */ + di = btrfs_lookup_dir_index_item(trans, root, path, btrfs_ino(dir), + ref_index, name, namelen, 0); +- if (di && !IS_ERR(di)) { ++ if (IS_ERR(di)) { ++ if (PTR_ERR(di) != -ENOENT) ++ return PTR_ERR(di); ++ } else if (di) { + ret = drop_one_dir_item(trans, root, path, dir, di); + if (ret) + return ret; +@@ -1170,7 +1173,9 @@ next: + /* look for a conflicting name */ + di = btrfs_lookup_dir_item(trans, root, path, btrfs_ino(dir), + name, namelen, 0); +- if (di && !IS_ERR(di)) { ++ if (IS_ERR(di)) { ++ return PTR_ERR(di); ++ } else if (di) { + ret = drop_one_dir_item(trans, root, path, dir, di); + if (ret) + return ret; +@@ -1944,8 +1949,8 @@ static noinline int replay_one_name(struct btrfs_trans_handle *trans, + struct btrfs_key log_key; + struct inode *dir; + u8 log_type; +- int exists; +- int ret = 0; ++ bool exists; ++ int ret; + bool update_size = (key->type == BTRFS_DIR_INDEX_KEY); + bool name_added = false; + +@@ -1965,12 +1970,12 @@ static noinline int replay_one_name(struct btrfs_trans_handle *trans, + name_len); + + btrfs_dir_item_key_to_cpu(eb, di, &log_key); +- exists = btrfs_lookup_inode(trans, root, path, &log_key, 0); +- if (exists == 0) +- exists = 1; +- else +- exists = 0; ++ ret = btrfs_lookup_inode(trans, root, path, &log_key, 0); + btrfs_release_path(path); ++ if (ret < 0) ++ goto out; ++ exists = (ret == 0); ++ ret = 0; + + if (key->type == BTRFS_DIR_ITEM_KEY) { + dst_di = btrfs_lookup_dir_item(trans, root, path, key->objectid, +@@ -1985,7 +1990,14 @@ static noinline int replay_one_name(struct btrfs_trans_handle *trans, + ret = -EINVAL; + goto out; + } +- if (IS_ERR_OR_NULL(dst_di)) { ++ ++ if (dst_di == ERR_PTR(-ENOENT)) ++ dst_di = NULL; ++ ++ if (IS_ERR(dst_di)) { ++ ret = PTR_ERR(dst_di); ++ goto out; ++ } else if (!dst_di) { + /* we need a sequence number to insert, so we only + * do inserts for the BTRFS_DIR_INDEX_KEY types + */ +diff --git a/fs/overlayfs/file.c b/fs/overlayfs/file.c +index ab5e92897270a..81c9eab8529b6 100644 +--- a/fs/overlayfs/file.c ++++ b/fs/overlayfs/file.c +@@ -296,48 +296,6 @@ out_unlock: + return ret; + } + +-static ssize_t ovl_splice_read(struct file *in, loff_t *ppos, +- struct pipe_inode_info *pipe, size_t len, +- unsigned int flags) +-{ +- ssize_t ret; +- struct fd real; +- const struct cred *old_cred; +- +- ret = ovl_real_fdget(in, &real); +- if (ret) +- return ret; +- +- old_cred = ovl_override_creds(file_inode(in)->i_sb); +- ret = generic_file_splice_read(real.file, ppos, pipe, len, flags); +- revert_creds(old_cred); +- +- ovl_file_accessed(in); +- fdput(real); +- return ret; +-} +- +-static ssize_t +-ovl_splice_write(struct pipe_inode_info *pipe, struct file *out, +- loff_t *ppos, size_t len, unsigned int flags) +-{ +- struct fd real; +- const struct cred *old_cred; +- ssize_t ret; +- +- ret = ovl_real_fdget(out, &real); +- if (ret) +- return ret; +- +- old_cred = ovl_override_creds(file_inode(out)->i_sb); +- ret = iter_file_splice_write(pipe, real.file, ppos, len, flags); +- revert_creds(old_cred); +- +- ovl_file_accessed(out); +- fdput(real); +- return ret; +-} +- + static int ovl_fsync(struct file *file, loff_t start, loff_t end, int datasync) + { + struct fd real; +@@ -694,8 +652,8 @@ const struct file_operations ovl_file_operations = { + .fadvise = ovl_fadvise, + .unlocked_ioctl = ovl_ioctl, + .compat_ioctl = ovl_compat_ioctl, +- .splice_read = ovl_splice_read, +- .splice_write = ovl_splice_write, ++ .splice_read = generic_file_splice_read, ++ .splice_write = iter_file_splice_write, + + .copy_file_range = ovl_copy_file_range, + .remap_file_range = ovl_remap_file_range, +diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h +index 36516fe86fe7c..641a01bc5f6f7 100644 +--- a/include/linux/mlx5/mlx5_ifc.h ++++ b/include/linux/mlx5/mlx5_ifc.h +@@ -8942,16 +8942,22 @@ struct mlx5_ifc_pcmr_reg_bits { + u8 reserved_at_0[0x8]; + u8 local_port[0x8]; + u8 reserved_at_10[0x10]; ++ + u8 entropy_force_cap[0x1]; + u8 entropy_calc_cap[0x1]; + u8 entropy_gre_calc_cap[0x1]; +- u8 reserved_at_23[0x1b]; ++ u8 reserved_at_23[0xf]; ++ u8 rx_ts_over_crc_cap[0x1]; ++ u8 reserved_at_33[0xb]; + u8 fcs_cap[0x1]; + u8 reserved_at_3f[0x1]; ++ + u8 entropy_force[0x1]; + u8 entropy_calc[0x1]; + u8 entropy_gre_calc[0x1]; +- u8 reserved_at_43[0x1b]; ++ u8 reserved_at_43[0xf]; ++ u8 rx_ts_over_crc[0x1]; ++ u8 reserved_at_53[0xb]; + u8 fcs_chk[0x1]; + u8 reserved_at_5f[0x1]; + }; +diff --git a/net/nfc/af_nfc.c b/net/nfc/af_nfc.c +index 4a9e72073564a..581358dcbdf8d 100644 +--- a/net/nfc/af_nfc.c ++++ b/net/nfc/af_nfc.c +@@ -60,6 +60,9 @@ int nfc_proto_register(const struct nfc_protocol *nfc_proto) + proto_tab[nfc_proto->id] = nfc_proto; + write_unlock(&proto_tab_lock); + ++ if (rc) ++ proto_unregister(nfc_proto->proto); ++ + return rc; + } + EXPORT_SYMBOL(nfc_proto_register); +diff --git a/net/nfc/digital_core.c b/net/nfc/digital_core.c +index e3599ed4a7a87..9c9caa307cf16 100644 +--- a/net/nfc/digital_core.c ++++ b/net/nfc/digital_core.c +@@ -277,6 +277,7 @@ int digital_tg_configure_hw(struct nfc_digital_dev *ddev, int type, int param) + static int digital_tg_listen_mdaa(struct nfc_digital_dev *ddev, u8 rf_tech) + { + struct digital_tg_mdaa_params *params; ++ int rc; + + params = kzalloc(sizeof(*params), GFP_KERNEL); + if (!params) +@@ -291,8 +292,12 @@ static int digital_tg_listen_mdaa(struct nfc_digital_dev *ddev, u8 rf_tech) + get_random_bytes(params->nfcid2 + 2, NFC_NFCID2_MAXSIZE - 2); + params->sc = DIGITAL_SENSF_FELICA_SC; + +- return digital_send_cmd(ddev, DIGITAL_CMD_TG_LISTEN_MDAA, NULL, params, +- 500, digital_tg_recv_atr_req, NULL); ++ rc = digital_send_cmd(ddev, DIGITAL_CMD_TG_LISTEN_MDAA, NULL, params, ++ 500, digital_tg_recv_atr_req, NULL); ++ if (rc) ++ kfree(params); ++ ++ return rc; + } + + static int digital_tg_listen_md(struct nfc_digital_dev *ddev, u8 rf_tech) +diff --git a/net/nfc/digital_technology.c b/net/nfc/digital_technology.c +index 84d2345c75a3f..3adf4589852af 100644 +--- a/net/nfc/digital_technology.c ++++ b/net/nfc/digital_technology.c +@@ -465,8 +465,12 @@ static int digital_in_send_sdd_req(struct nfc_digital_dev *ddev, + skb_put_u8(skb, sel_cmd); + skb_put_u8(skb, DIGITAL_SDD_REQ_SEL_PAR); + +- return digital_in_send_cmd(ddev, skb, 30, digital_in_recv_sdd_res, +- target); ++ rc = digital_in_send_cmd(ddev, skb, 30, digital_in_recv_sdd_res, ++ target); ++ if (rc) ++ kfree_skb(skb); ++ ++ return rc; + } + + static void digital_in_recv_sens_res(struct nfc_digital_dev *ddev, void *arg, +diff --git a/net/sched/sch_mqprio.c b/net/sched/sch_mqprio.c +index 8766ab5b87880..5eb3b1b7ae5e7 100644 +--- a/net/sched/sch_mqprio.c ++++ b/net/sched/sch_mqprio.c +@@ -529,22 +529,28 @@ static int mqprio_dump_class_stats(struct Qdisc *sch, unsigned long cl, + for (i = tc.offset; i < tc.offset + tc.count; i++) { + struct netdev_queue *q = netdev_get_tx_queue(dev, i); + struct Qdisc *qdisc = rtnl_dereference(q->qdisc); +- struct gnet_stats_basic_cpu __percpu *cpu_bstats = NULL; +- struct gnet_stats_queue __percpu *cpu_qstats = NULL; + + spin_lock_bh(qdisc_lock(qdisc)); ++ + if (qdisc_is_percpu_stats(qdisc)) { +- cpu_bstats = qdisc->cpu_bstats; +- cpu_qstats = qdisc->cpu_qstats; ++ qlen = qdisc_qlen_sum(qdisc); ++ ++ __gnet_stats_copy_basic(NULL, &bstats, ++ qdisc->cpu_bstats, ++ &qdisc->bstats); ++ __gnet_stats_copy_queue(&qstats, ++ qdisc->cpu_qstats, ++ &qdisc->qstats, ++ qlen); ++ } else { ++ qlen += qdisc->q.qlen; ++ bstats.bytes += qdisc->bstats.bytes; ++ bstats.packets += qdisc->bstats.packets; ++ qstats.backlog += qdisc->qstats.backlog; ++ qstats.drops += qdisc->qstats.drops; ++ qstats.requeues += qdisc->qstats.requeues; ++ qstats.overlimits += qdisc->qstats.overlimits; + } +- +- qlen = qdisc_qlen_sum(qdisc); +- __gnet_stats_copy_basic(NULL, &sch->bstats, +- cpu_bstats, &qdisc->bstats); +- __gnet_stats_copy_queue(&sch->qstats, +- cpu_qstats, +- &qdisc->qstats, +- qlen); + spin_unlock_bh(qdisc_lock(qdisc)); + } + +diff --git a/net/sctp/sm_make_chunk.c b/net/sctp/sm_make_chunk.c +index 000aa62281f46..4eebe708c8e4e 100644 +--- a/net/sctp/sm_make_chunk.c ++++ b/net/sctp/sm_make_chunk.c +@@ -3659,7 +3659,7 @@ struct sctp_chunk *sctp_make_strreset_req( + outlen = (sizeof(outreq) + stream_len) * out; + inlen = (sizeof(inreq) + stream_len) * in; + +- retval = sctp_make_reconf(asoc, outlen + inlen); ++ retval = sctp_make_reconf(asoc, SCTP_PAD4(outlen) + SCTP_PAD4(inlen)); + if (!retval) + return NULL; + +diff --git a/scripts/recordmcount.pl b/scripts/recordmcount.pl +index 4f84657f55c23..f459ae883a0a6 100755 +--- a/scripts/recordmcount.pl ++++ b/scripts/recordmcount.pl +@@ -222,7 +222,7 @@ if ($arch =~ /(x86(_64)?)|(i386)/) { + $local_regex = "^[0-9a-fA-F]+\\s+t\\s+(\\S+)"; + $weak_regex = "^[0-9a-fA-F]+\\s+([wW])\\s+(\\S+)"; + $section_regex = "Disassembly of section\\s+(\\S+):"; +-$function_regex = "^([0-9a-fA-F]+)\\s+<(.*?)>:"; ++$function_regex = "^([0-9a-fA-F]+)\\s+<([^^]*?)>:"; + $mcount_regex = "^\\s*([0-9a-fA-F]+):.*\\s(mcount|__fentry__)\$"; + $section_type = '@progbits'; + $mcount_adjust = 0; +diff --git a/sound/core/seq_device.c b/sound/core/seq_device.c +index e9dbad93f9d09..c9223049551c4 100644 +--- a/sound/core/seq_device.c ++++ b/sound/core/seq_device.c +@@ -147,6 +147,8 @@ static int snd_seq_device_dev_free(struct snd_device *device) + struct snd_seq_device *dev = device->device_data; + + cancel_autoload_drivers(); ++ if (dev->private_free) ++ dev->private_free(dev); + put_device(&dev->dev); + return 0; + } +@@ -174,11 +176,7 @@ static int snd_seq_device_dev_disconnect(struct snd_device *device) + + static void snd_seq_dev_release(struct device *dev) + { +- struct snd_seq_device *sdev = to_seq_dev(dev); +- +- if (sdev->private_free) +- sdev->private_free(sdev); +- kfree(sdev); ++ kfree(to_seq_dev(dev)); + } + + /* +diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c +index abe371c01fba2..c4837c78a8624 100644 +--- a/sound/pci/hda/patch_realtek.c ++++ b/sound/pci/hda/patch_realtek.c +@@ -517,6 +517,8 @@ static void alc_shutup_pins(struct hda_codec *codec) + struct alc_spec *spec = codec->spec; + + switch (codec->core.vendor_id) { ++ case 0x10ec0236: ++ case 0x10ec0256: + case 0x10ec0283: + case 0x10ec0286: + case 0x10ec0288: +@@ -2539,7 +2541,8 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = { + SND_PCI_QUIRK(0x1558, 0x67e1, "Clevo PB71[DE][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), + SND_PCI_QUIRK(0x1558, 0x67e5, "Clevo PC70D[PRS](?:-D|-G)?", ALC1220_FIXUP_CLEVO_PB51ED_PINS), + SND_PCI_QUIRK(0x1558, 0x70d1, "Clevo PC70[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), +- SND_PCI_QUIRK(0x1558, 0x7714, "Clevo X170", ALC1220_FIXUP_CLEVO_PB51ED_PINS), ++ SND_PCI_QUIRK(0x1558, 0x7714, "Clevo X170SM", ALC1220_FIXUP_CLEVO_PB51ED_PINS), ++ SND_PCI_QUIRK(0x1558, 0x7715, "Clevo X170KM-G", ALC1220_FIXUP_CLEVO_PB51ED), + SND_PCI_QUIRK(0x1558, 0x9501, "Clevo P950HR", ALC1220_FIXUP_CLEVO_P950), + SND_PCI_QUIRK(0x1558, 0x9506, "Clevo P955HQ", ALC1220_FIXUP_CLEVO_P950), + SND_PCI_QUIRK(0x1558, 0x950a, "Clevo P955H[PR]", ALC1220_FIXUP_CLEVO_P950), +@@ -3521,7 +3524,8 @@ static void alc256_shutup(struct hda_codec *codec) + /* If disable 3k pulldown control for alc257, the Mic detection will not work correctly + * when booting with headset plugged. So skip setting it for the codec alc257 + */ +- if (codec->core.vendor_id != 0x10ec0257) ++ if (spec->codec_variant != ALC269_TYPE_ALC257 && ++ spec->codec_variant != ALC269_TYPE_ALC256) + alc_update_coef_idx(codec, 0x46, 0, 3 << 12); + + if (!spec->no_shutup_pins) +@@ -9688,6 +9692,9 @@ enum { + ALC671_FIXUP_HP_HEADSET_MIC2, + ALC662_FIXUP_ACER_X2660G_HEADSET_MODE, + ALC662_FIXUP_ACER_NITRO_HEADSET_MODE, ++ ALC668_FIXUP_ASUS_NO_HEADSET_MIC, ++ ALC668_FIXUP_HEADSET_MIC, ++ ALC668_FIXUP_MIC_DET_COEF, + }; + + static const struct hda_fixup alc662_fixups[] = { +@@ -10071,6 +10078,29 @@ static const struct hda_fixup alc662_fixups[] = { + .chained = true, + .chain_id = ALC662_FIXUP_USI_FUNC + }, ++ [ALC668_FIXUP_ASUS_NO_HEADSET_MIC] = { ++ .type = HDA_FIXUP_PINS, ++ .v.pins = (const struct hda_pintbl[]) { ++ { 0x1b, 0x04a1112c }, ++ { } ++ }, ++ .chained = true, ++ .chain_id = ALC668_FIXUP_HEADSET_MIC ++ }, ++ [ALC668_FIXUP_HEADSET_MIC] = { ++ .type = HDA_FIXUP_FUNC, ++ .v.func = alc269_fixup_headset_mic, ++ .chained = true, ++ .chain_id = ALC668_FIXUP_MIC_DET_COEF ++ }, ++ [ALC668_FIXUP_MIC_DET_COEF] = { ++ .type = HDA_FIXUP_VERBS, ++ .v.verbs = (const struct hda_verb[]) { ++ { 0x20, AC_VERB_SET_COEF_INDEX, 0x15 }, ++ { 0x20, AC_VERB_SET_PROC_COEF, 0x0d60 }, ++ {} ++ }, ++ }, + }; + + static const struct snd_pci_quirk alc662_fixup_tbl[] = { +@@ -10106,6 +10136,7 @@ static const struct snd_pci_quirk alc662_fixup_tbl[] = { + SND_PCI_QUIRK(0x1043, 0x15a7, "ASUS UX51VZH", ALC662_FIXUP_BASS_16), + SND_PCI_QUIRK(0x1043, 0x177d, "ASUS N551", ALC668_FIXUP_ASUS_Nx51), + SND_PCI_QUIRK(0x1043, 0x17bd, "ASUS N751", ALC668_FIXUP_ASUS_Nx51), ++ SND_PCI_QUIRK(0x1043, 0x185d, "ASUS G551JW", ALC668_FIXUP_ASUS_NO_HEADSET_MIC), + SND_PCI_QUIRK(0x1043, 0x1963, "ASUS X71SL", ALC662_FIXUP_ASUS_MODE8), + SND_PCI_QUIRK(0x1043, 0x1b73, "ASUS N55SF", ALC662_FIXUP_BASS_16), + SND_PCI_QUIRK(0x1043, 0x1bf3, "ASUS N76VZ", ALC662_FIXUP_BASS_MODE4_CHMAP), +diff --git a/sound/usb/quirks-table.h b/sound/usb/quirks-table.h +index 441335abb4018..9620ae0003ce4 100644 +--- a/sound/usb/quirks-table.h ++++ b/sound/usb/quirks-table.h +@@ -125,6 +125,48 @@ + .bInterfaceClass = USB_CLASS_AUDIO, + }, + ++/* ++ * Creative Technology, Ltd Live! Cam Sync HD [VF0770] ++ * The device advertises 8 formats, but only a rate of 48kHz is honored by the ++ * hardware and 24 bits give chopped audio, so only report the one working ++ * combination. ++ */ ++{ ++ USB_DEVICE(0x041e, 0x4095), ++ .driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) { ++ .ifnum = QUIRK_ANY_INTERFACE, ++ .type = QUIRK_COMPOSITE, ++ .data = &(const struct snd_usb_audio_quirk[]) { ++ { ++ .ifnum = 2, ++ .type = QUIRK_AUDIO_STANDARD_MIXER, ++ }, ++ { ++ .ifnum = 3, ++ .type = QUIRK_AUDIO_FIXED_ENDPOINT, ++ .data = &(const struct audioformat) { ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ .channels = 2, ++ .fmt_bits = 16, ++ .iface = 3, ++ .altsetting = 4, ++ .altset_idx = 4, ++ .endpoint = 0x82, ++ .ep_attr = 0x05, ++ .rates = SNDRV_PCM_RATE_48000, ++ .rate_min = 48000, ++ .rate_max = 48000, ++ .nr_rates = 1, ++ .rate_table = (unsigned int[]) { 48000 }, ++ }, ++ }, ++ { ++ .ifnum = -1 ++ }, ++ }, ++ }, ++}, ++ + /* + * HP Wireless Audio + * When not ignored, causes instability issues for some users, forcing them to |