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authorAurelien Jarno <aurelien@aurel32.net>2009-05-04 09:36:22 +0200
committerAurelien Jarno <aurelien@aurel32.net>2009-05-04 10:05:15 +0200
commit88cbb9804bf59ba556f6e63ec6bb903ba8eb32a1 (patch)
treeed735893afcb8fd20acf07fb1856b077e4fa0712 /target-mips
parentqemu-options.hx: fix description of cache=none suboption (diff)
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target-mips: fix comments about SUB/DSUB
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/translate.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index e96fe60fd..2c163e0ca 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1590,7 +1590,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
tcg_temp_free(t2);
tcg_gen_brcondi_tl(TCG_COND_GE, t1, 0, l1);
tcg_temp_free(t1);
- /* operands of same sign, result different sign */
+ /* operands of different sign, first operand and result different sign */
generate_exception(ctx, EXCP_OVERFLOW);
gen_set_label(l1);
gen_store_gpr(t0, rd);
@@ -1665,7 +1665,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
tcg_temp_free(t2);
tcg_gen_brcondi_tl(TCG_COND_GE, t1, 0, l1);
tcg_temp_free(t1);
- /* operands of same sign, result different sign */
+ /* operands of different sign, first operand and result different sign */
generate_exception(ctx, EXCP_OVERFLOW);
gen_set_label(l1);
gen_store_gpr(t0, rd);