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author | 2009-04-28 00:10:08 +0400 | |
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committer | 2009-04-28 15:59:51 +0000 | |
commit | 417728d87526f43528fd4de5c7a250fe22d32207 (patch) | |
tree | c7c798e3811be9f6fa7a2855a4c22d3b3808b903 /target-sparc | |
parent | sparc64 fix TLB match code (diff) | |
download | qemu-kvm-417728d87526f43528fd4de5c7a250fe22d32207.tar.gz qemu-kvm-417728d87526f43528fd4de5c7a250fe22d32207.tar.bz2 qemu-kvm-417728d87526f43528fd4de5c7a250fe22d32207.zip |
sparc64 fix context value for ITLB fault
Revert previous change to get_physical_address_code:
I/D MMU context register is shared, so using dmmuregs[1] is correct
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Diffstat (limited to 'target-sparc')
-rw-r--r-- | target-sparc/helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-sparc/helper.c b/target-sparc/helper.c index 09a2829a5..e249c64b0 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -490,7 +490,7 @@ static int get_physical_address_code(CPUState *env, #ifdef DEBUG_MMU printf("TMISS at 0x%" PRIx64 "\n", address); #endif - env->immuregs[6] = (address & ~0x1fffULL) | (env->immuregs[1] & 0x1fff); + env->immuregs[6] = (address & ~0x1fffULL) | (env->dmmuregs[1] & 0x1fff); env->exception_index = TT_TMISS; return 1; } |