blob: 23c6ae675d2af7afd49e6aee2bd66f55f775cfe6 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
|
BDEPEND=dev-util/gperf sys-devel/bison sys-devel/flex sys-devel/gnuconfig >=app-portage/elt-patches-20170815 || ( >=sys-devel/automake-1.16.5:1.16 ) >=sys-devel/autoconf-2.71-r5 >=sys-devel/libtool-2.4.7 >=dev-vcs/git-1.8.2.1[curl]
DEFINED_PHASES=install prepare unpack
DEPEND=sys-libs/readline:= sys-libs/zlib
DESCRIPTION=A Verilog simulation and synthesis tool
EAPI=8
HOMEPAGE=http://iverilog.icarus.com https://github.com/steveicarus/iverilog
INHERIT=autotools git-r3
LICENSE=LGPL-2.1
PROPERTIES=live
RDEPEND=sys-libs/readline:= sys-libs/zlib
SLOT=0
_eclasses_=gnuconfig b6b3e92f8b8c996400074b5f61a59256 toolchain-funcs 513c31b3346458ed1f3878b57da6d61c multilib c19072c3cd7ac5cb21de013f7e9832e0 libtool 9d3a9a889a6fa62ae794f817c156491b autotools 6ae9a4347149b19a112caa1182d03bde git-r3 27e13c09a4c7e4c78ac812f74727e676
_md5_=e2808fb69b32ddf02f7a5f54fbbf7dee
|
GitWeb
