diff options
author | Samuli Suominen <ssuominen@gentoo.org> | 2010-06-01 11:59:38 +0000 |
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committer | Samuli Suominen <ssuominen@gentoo.org> | 2010-06-01 11:59:38 +0000 |
commit | 38357a9c52d3034c6f20a4b2077771bfacc44508 (patch) | |
tree | df41030aa0118cf136f93af6dc7580640fb1633d | |
parent | Delete calls to deprecated python_version(). Properly call python_mod_optimiz... (diff) | |
download | gentoo-2-38357a9c52d3034c6f20a4b2077771bfacc44508.tar.gz gentoo-2-38357a9c52d3034c6f20a4b2077771bfacc44508.tar.bz2 gentoo-2-38357a9c52d3034c6f20a4b2077771bfacc44508.zip |
Fix building with GCC 4.5+ wrt #319361 by Kacper Kowalik.
(Portage version: 2.2_rc67/cvs/Linux x86_64)
-rw-r--r-- | sci-electronics/iverilog/ChangeLog | 6 | ||||
-rw-r--r-- | sci-electronics/iverilog/files/iverilog-0.8.2-gcc-4.10.patch | 11 | ||||
-rw-r--r-- | sci-electronics/iverilog/files/iverilog-0.9.1-gcc45.patch | 37 | ||||
-rw-r--r-- | sci-electronics/iverilog/files/iverilog-gcc43.patch | 177 | ||||
-rw-r--r-- | sci-electronics/iverilog/iverilog-0.8.6.ebuild | 49 | ||||
-rw-r--r-- | sci-electronics/iverilog/iverilog-0.9.1.ebuild | 4 |
6 files changed, 45 insertions, 239 deletions
diff --git a/sci-electronics/iverilog/ChangeLog b/sci-electronics/iverilog/ChangeLog index 61a6b0de0958..6fa8783a5819 100644 --- a/sci-electronics/iverilog/ChangeLog +++ b/sci-electronics/iverilog/ChangeLog @@ -1,6 +1,10 @@ # ChangeLog for sci-electronics/iverilog # Copyright 1999-2010 Gentoo Foundation; Distributed under the GPL v2 -# $Header: /var/cvsroot/gentoo-x86/sci-electronics/iverilog/ChangeLog,v 1.32 2010/05/09 17:37:34 armin76 Exp $ +# $Header: /var/cvsroot/gentoo-x86/sci-electronics/iverilog/ChangeLog,v 1.33 2010/06/01 11:59:38 ssuominen Exp $ + + 01 Jun 2010; Samuli Suominen <ssuominen@gentoo.org> iverilog-0.9.1.ebuild, + +files/iverilog-0.9.1-gcc45.patch: + Fix building with GCC 4.5+ wrt #319361 by Kacper Kowalik. 09 May 2010; Raúl Porcel <armin76@gentoo.org> iverilog-0.9.1.ebuild: sparc stable wrt #302500 diff --git a/sci-electronics/iverilog/files/iverilog-0.8.2-gcc-4.10.patch b/sci-electronics/iverilog/files/iverilog-0.8.2-gcc-4.10.patch deleted file mode 100644 index 7a89b40a3363..000000000000 --- a/sci-electronics/iverilog/files/iverilog-0.8.2-gcc-4.10.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- iverilog-0.8.2/PExpr.h~ 2004-10-04 02:10:51.000000000 +0100 -+++ iverilog-0.8.2/PExpr.h 2006-03-10 18:56:52.000000000 +0000 -@@ -324,7 +324,7 @@ - virtual NetEConst*elaborate_expr(Design*des, NetScope*, - bool sys_task_arg =false) const; - virtual NetEConst*elaborate_pexpr(Design*des, NetScope*sc) const; -- verinum* PEString::eval_const(const Design*, const NetScope*) const; -+ verinum* eval_const(const Design*, const NetScope*) const; - - virtual bool is_constant(Module*) const; - diff --git a/sci-electronics/iverilog/files/iverilog-0.9.1-gcc45.patch b/sci-electronics/iverilog/files/iverilog-0.9.1-gcc45.patch new file mode 100644 index 000000000000..4a6914291a18 --- /dev/null +++ b/sci-electronics/iverilog/files/iverilog-0.9.1-gcc45.patch @@ -0,0 +1,37 @@ +Fixing build with gcc 4.5 + +https://bugs.gentoo.org/show_bug.cgi?id=319361 + +--- pform_disciplines.cc ++++ pform_disciplines.cc +@@ -27,8 +27,8 @@ + map<perm_string,ivl_discipline_t> disciplines; + map<perm_string,ivl_nature_t> access_function_nature; + +-static perm_string nature_name = perm_string::perm_string(); +-static perm_string nature_access = perm_string::perm_string(); ++static perm_string nature_name = perm_string(); ++static perm_string nature_access = perm_string(); + + void pform_start_nature(const char*name) + { +@@ -82,8 +82,8 @@ + // expressions that use the access function can find it. + access_function_nature[nature_access] = tmp; + +- nature_name = perm_string::perm_string(); +- nature_access = perm_string::perm_string(); ++ nature_name = perm_string(); ++ nature_access = perm_string(); + } + + +@@ -171,7 +171,7 @@ + FILE_NAME(tmp, loc); + + /* Clear the static variables for the next item. */ +- discipline_name = perm_string::perm_string(); ++ discipline_name = perm_string(); + discipline_domain = IVL_DIS_NONE; + discipline_potential = 0; + discipline_flow = 0; diff --git a/sci-electronics/iverilog/files/iverilog-gcc43.patch b/sci-electronics/iverilog/files/iverilog-gcc43.patch deleted file mode 100644 index 960ba01c8dc2..000000000000 --- a/sci-electronics/iverilog/files/iverilog-gcc43.patch +++ /dev/null @@ -1,177 +0,0 @@ -diff -rup verilog-0.8.6/elab_net.cc verilog-0.8.6-devel/elab_net.cc ---- verilog-0.8.6/elab_net.cc 2007-11-26 19:55:13.000000000 +0100 -+++ verilog-0.8.6-devel/elab_net.cc 2008-01-16 12:02:42.000000000 +0100 -@@ -28,6 +28,7 @@ - # include "compiler.h" - - # include <iostream> -+# include <cstring> - - /* - * This is a state flag that determines whether an elaborate_net must -diff -rup verilog-0.8.6/elab_scope.cc verilog-0.8.6-devel/elab_scope.cc ---- verilog-0.8.6/elab_scope.cc 2007-11-26 19:55:13.000000000 +0100 -+++ verilog-0.8.6-devel/elab_scope.cc 2008-01-16 12:03:34.000000000 +0100 -@@ -24,6 +24,7 @@ - # include "compiler.h" - # include <iostream> - # include <stdio.h> -+# include <cstring> - - /* - * Elaboration happens in two passes, generally. The first scans the -diff -rup verilog-0.8.6/elab_sig.cc verilog-0.8.6-devel/elab_sig.cc ---- verilog-0.8.6/elab_sig.cc 2007-11-26 19:55:13.000000000 +0100 -+++ verilog-0.8.6-devel/elab_sig.cc 2008-01-16 12:04:05.000000000 +0100 -@@ -23,6 +23,7 @@ - # include "config.h" - - # include <iostream> -+# include <cstdlib> - - # include "Module.h" - # include "PExpr.h" -diff -rup verilog-0.8.6/emit.cc verilog-0.8.6-devel/emit.cc ---- verilog-0.8.6/emit.cc 2007-11-26 19:55:13.000000000 +0100 -+++ verilog-0.8.6-devel/emit.cc 2008-01-16 12:04:40.000000000 +0100 -@@ -32,6 +32,7 @@ - # include "netlist.h" - # include <typeinfo> - # include <cassert> -+# include <cstring> - - bool NetNode::emit_node(struct target_t*tgt) const - { -diff -rup verilog-0.8.6/load_module.cc verilog-0.8.6-devel/load_module.cc ---- verilog-0.8.6/load_module.cc 2007-11-26 19:55:13.000000000 +0100 -+++ verilog-0.8.6-devel/load_module.cc 2008-01-16 12:05:21.000000000 +0100 -@@ -31,6 +31,8 @@ - # include <dirent.h> - # include <ctype.h> - # include <assert.h> -+# include <cstdlib> -+# include <cstring> - - /* - * The module library items are maps of key names to file name within -diff -rup verilog-0.8.6/net_design.cc verilog-0.8.6-devel/net_design.cc ---- verilog-0.8.6/net_design.cc 2007-11-26 19:55:13.000000000 +0100 -+++ verilog-0.8.6-devel/net_design.cc 2008-01-16 12:05:46.000000000 +0100 -@@ -33,6 +33,7 @@ - # include "util.h" - # include "compiler.h" - # include <sstream> -+# include <cstring> - - Design:: Design() - : errors(0), nodes_(0), procs_(0), lcounter_(0) -diff -rup verilog-0.8.6/net_link.cc verilog-0.8.6-devel/net_link.cc ---- verilog-0.8.6/net_link.cc 2007-11-26 19:55:13.000000000 +0100 -+++ verilog-0.8.6-devel/net_link.cc 2008-01-16 12:06:28.000000000 +0100 -@@ -27,6 +27,7 @@ - # include "netlist.h" - # include <sstream> - # include <string> -+# include <cstring> - # include <typeinfo> - #ifdef HAVE_MALLOC_H - # include <malloc.h> -diff -rup verilog-0.8.6/net_scope.cc verilog-0.8.6-devel/net_scope.cc ---- verilog-0.8.6/net_scope.cc 2007-11-26 19:55:13.000000000 +0100 -+++ verilog-0.8.6-devel/net_scope.cc 2008-01-16 12:06:56.000000000 +0100 -@@ -25,6 +25,7 @@ - - # include "netlist.h" - # include <sstream> -+# include <cstring> - - /* - * The NetScope class keeps a scope tree organized. Each node of the -diff -rup verilog-0.8.6/pform.h verilog-0.8.6-devel/pform.h ---- verilog-0.8.6/pform.h 2007-11-26 19:55:13.000000000 +0100 -+++ verilog-0.8.6-devel/pform.h 2008-01-16 11:58:59.000000000 +0100 -@@ -37,6 +37,8 @@ - # include <string> - # include <list> - # include <stdio.h> -+# include <cstring> -+# include <cstdlib> - - /* - * These classes implement the parsed form (P-form for short) of the -diff -rup verilog-0.8.6/synth2.cc verilog-0.8.6-devel/synth2.cc ---- verilog-0.8.6/synth2.cc 2007-11-26 19:55:13.000000000 +0100 -+++ verilog-0.8.6-devel/synth2.cc 2008-01-16 12:11:00.000000000 +0100 -@@ -28,6 +28,7 @@ - #include <cassert> - #include "NetLatch.h" - #include <climits> -+#include <cstdlib> - - #include <new> // standard operator new - using std::bad_alloc; -diff -rup verilog-0.8.6/sys_funcs.cc verilog-0.8.6-devel/sys_funcs.cc ---- verilog-0.8.6/sys_funcs.cc 2007-11-26 19:55:13.000000000 +0100 -+++ verilog-0.8.6-devel/sys_funcs.cc 2008-01-16 12:07:31.000000000 +0100 -@@ -23,6 +23,8 @@ - # include "config.h" - # include "compiler.h" - # include <stdio.h> -+# include <cstdlib> -+# include <cstring> - - /* - * Manage the information about system functions. This information is -diff -rup verilog-0.8.6/t-dll.cc verilog-0.8.6-devel/t-dll.cc ---- verilog-0.8.6/t-dll.cc 2007-11-26 19:55:13.000000000 +0100 -+++ verilog-0.8.6-devel/t-dll.cc 2008-01-16 12:11:25.000000000 +0100 -@@ -31,7 +31,8 @@ - #ifdef HAVE_MALLOC_H - # include <malloc.h> - #endif --# include <stdlib.h> -+# include <cstdlib> -+# include <cstring> - - #include <new> // standard operator new - using std::bad_alloc; -diff -rup verilog-0.8.6/t-dll-expr.cc verilog-0.8.6-devel/t-dll-expr.cc ---- verilog-0.8.6/t-dll-expr.cc 2007-11-26 19:55:13.000000000 +0100 -+++ verilog-0.8.6-devel/t-dll-expr.cc 2008-01-16 12:11:54.000000000 +0100 -@@ -30,7 +30,8 @@ - #ifdef HAVE_MALLOC_H - # include <malloc.h> - #endif --# include <stdlib.h> -+# include <cstdlib> -+# include <cstring> - - /* - * This is a little convenience function for converting a NetExpr -diff -rup verilog-0.8.6/t-dll-proc.cc verilog-0.8.6-devel/t-dll-proc.cc ---- verilog-0.8.6/t-dll-proc.cc 2007-11-26 19:55:13.000000000 +0100 -+++ verilog-0.8.6-devel/t-dll-proc.cc 2008-01-16 12:12:29.000000000 +0100 -@@ -32,7 +32,8 @@ - #ifdef HAVE_MALLOC_H - # include <malloc.h> - #endif --# include <stdlib.h> -+# include <cstdlib> -+# include <cstring> - - - bool dll_target::process(const NetProcTop*net) -diff -rup verilog-0.8.6/verireal.cc verilog-0.8.6-devel/verireal.cc ---- verilog-0.8.6/verireal.cc 2007-11-26 19:55:13.000000000 +0100 -+++ verilog-0.8.6-devel/verireal.cc 2008-01-16 12:07:58.000000000 +0100 -@@ -24,7 +24,8 @@ - - # include "verireal.h" - # include "verinum.h" --# include <stdlib.h> -+# include <cstdlib> -+# include <cstring> - # include <ctype.h> - # include <iostream> - # include <math.h> - diff --git a/sci-electronics/iverilog/iverilog-0.8.6.ebuild b/sci-electronics/iverilog/iverilog-0.8.6.ebuild deleted file mode 100644 index eabc95a63050..000000000000 --- a/sci-electronics/iverilog/iverilog-0.8.6.ebuild +++ /dev/null @@ -1,49 +0,0 @@ -# Copyright 1999-2009 Gentoo Foundation -# Distributed under the terms of the GNU General Public License v2 -# $Header: /var/cvsroot/gentoo-x86/sci-electronics/iverilog/iverilog-0.8.6.ebuild,v 1.7 2009/10/11 16:17:22 armin76 Exp $ - -inherit eutils multilib - -S="${WORKDIR}/verilog-${PV}" - -DESCRIPTION="A Verilog simulation and synthesis tool" -SRC_URI="ftp://icarus.com/pub/eda/verilog/v${PV:0:3}/verilog-${PV}.tar.gz" -HOMEPAGE="http://www.icarus.com/eda/verilog/" - -DEPEND="" -RDEPEND="" - -LICENSE="GPL-2" -SLOT="0" -KEYWORDS="amd64 ppc sparc x86" -IUSE="" - -src_unpack() { - unpack ${A} - cd "${S}" - - epatch "${FILESDIR}"/iverilog-gcc43.patch - - # Fix for bug #172919 - sed -i -e '/# include <asm\/page.h>/d' vvp/main.cc || die "sed failed" - - # Fix tests - mkdir -p lib/ivl - touch lib/ivl/ivl - sed -i -e 's/driver\/iverilog -B./IVERILOG_ROOT="." driver\/iverilog -B./' Makefile.in || die -} - -src_install() { - emake -j1 \ - prefix="${D}"/usr \ - mandir="${D}"/usr/share/man \ - infodir="${D}"/usr/share/info \ - libdir="${D}"/usr/$(get_libdir) \ - libdir64="${D}"/usr/$(get_libdir) \ - vpidir="${D}"/usr/$(get_libdir)/ivl \ - install || die - - dodoc *.txt - insinto /usr/share/doc/${PF} - doins -r examples -} diff --git a/sci-electronics/iverilog/iverilog-0.9.1.ebuild b/sci-electronics/iverilog/iverilog-0.9.1.ebuild index c860b8c11050..f86678f10399 100644 --- a/sci-electronics/iverilog/iverilog-0.9.1.ebuild +++ b/sci-electronics/iverilog/iverilog-0.9.1.ebuild @@ -1,6 +1,6 @@ # Copyright 1999-2010 Gentoo Foundation # Distributed under the terms of the GNU General Public License v2 -# $Header: /var/cvsroot/gentoo-x86/sci-electronics/iverilog/iverilog-0.9.1.ebuild,v 1.5 2010/05/09 17:37:34 armin76 Exp $ +# $Header: /var/cvsroot/gentoo-x86/sci-electronics/iverilog/iverilog-0.9.1.ebuild,v 1.6 2010/06/01 11:59:38 ssuominen Exp $ EAPI="2" @@ -31,6 +31,8 @@ src_prepare() { # Fix LDFLAGS sed -i -e 's/@shared@/@shared@ $(LDFLAGS)/' {cadpli,tgt-vhdl,tgt-null,tgt-stub,tgt-vvp}/Makefile.in || die "sed failed" + + epatch "${FILESDIR}"/${P}-gcc45.patch } src_install() { |