New version + mdk fixes for gcc4

(Portage version: 2.1_pre10-r2)

2 files changed, 121 insertions, 0 deletions

diff --git a/app-emulation/qemu-user/files/digest-qemu-user-0.8.1 b/app-emulation/qemu-user/files/digest-qemu-user-0.8.1
new file mode 100644
index 000000000000..27ca8ef85175
--- /dev/null
+++ b/app-emulation/qemu-user/files/digest-qemu-user-0.8.1
@@ -0,0 +1,3 @@
+MD5 67d924324a5ab79d017bd97a1e767285 qemu-0.8.1.tar.gz 1623264
+RMD160 04d163d4792bbea39fc0b1e52af124cdb7e907dc qemu-0.8.1.tar.gz 1623264
+SHA256 a1f83666f5c05eaee9bfc608a3a5034ad95d0fd3c99937bb399bf9235a6aa0c9 qemu-0.8.1.tar.gz 1623264
diff --git a/app-emulation/qemu-user/files/qemu-0.8.0-gcc4-hacks.patch b/app-emulation/qemu-user/files/qemu-0.8.0-gcc4-hacks.patch
new file mode 100644
index 000000000000..f7cbdcfe1951
--- /dev/null
+++ b/app-emulation/qemu-user/files/qemu-0.8.0-gcc4-hacks.patch
@@ -0,0 +1,118 @@
+2005-10-28  Gwenole Beauchesne  <gbeauchesne@mandriva.com>
+
+	* Various additional hacks for GCC4.
+
+--- qemu-0.7.2/target-i386/ops_sse.h.gcc4-hacks	2005-09-04 19:11:31.000000000 +0200
++++ qemu-0.7.2/target-i386/ops_sse.h	2005-10-28 10:09:21.000000000 +0200
+@@ -34,6 +34,12 @@
+ #define Q(n) XMM_Q(n)
+ #define SUFFIX _xmm
+ #endif
++#if defined(__i386__) && __GNUC__ >= 4
++#define RegCopy(d, s) __builtin_memcpy(&(d), &(s), sizeof(d))
++#endif
++#ifndef RegCopy
++#define RegCopy(d, s) d = s
++#endif
+ 
+ void OPPROTO glue(op_psrlw, SUFFIX)(void)
+ {
+@@ -570,7 +576,7 @@ void OPPROTO glue(op_pshufw, SUFFIX) (vo
+     r.W(1) = s->W((order >> 2) & 3);
+     r.W(2) = s->W((order >> 4) & 3);
+     r.W(3) = s->W((order >> 6) & 3);
+-    *d = r;
++    RegCopy(*d, r);
+ }
+ #else
+ void OPPROTO op_shufps(void)
+--- qemu-0.7.2/target-i386/helper.c.gcc4-hacks	2005-09-04 19:11:31.000000000 +0200
++++ qemu-0.7.2/target-i386/helper.c	2005-10-28 10:09:21.000000000 +0200
+@@ -3130,8 +3130,15 @@ void helper_fxrstor(target_ulong ptr, in
+         nb_xmm_regs = 8 << data64;
+         addr = ptr + 0xa0;
+         for(i = 0; i < nb_xmm_regs; i++) {
++#if defined(__i386__) && __GNUC__ >= 4
++            env->xmm_regs[i].XMM_L(0) = ldl(addr);
++            env->xmm_regs[i].XMM_L(1) = ldl(addr + 4);
++            env->xmm_regs[i].XMM_L(2) = ldl(addr + 8);
++            env->xmm_regs[i].XMM_L(3) = ldl(addr + 12);
++#else
+             env->xmm_regs[i].XMM_Q(0) = ldq(addr);
+             env->xmm_regs[i].XMM_Q(1) = ldq(addr + 8);
++#endif
+             addr += 16;
+         }
+     }
+--- qemu-0.7.2/cpu-all.h.gcc4-hacks	2005-09-04 19:11:31.000000000 +0200
++++ qemu-0.7.2/cpu-all.h	2005-10-28 10:09:21.000000000 +0200
+@@ -339,7 +339,13 @@
+ 
+ static inline void stq_le_p(void *ptr, uint64_t v)
+ {
++#if defined(__i386__) && __GNUC__ >= 4
++    const union { uint64_t v; uint32_t p[2]; } x = { .v = v };
++    ((uint32_t *)ptr)[0] = x.p[0];
++    ((uint32_t *)ptr)[1] = x.p[1];
++#else
+     *(uint64_t *)ptr = v;
++#endif
+ }
+ 
+ /* float access */
+--- qemu-0.7.2/softmmu_header.h.gcc4-hacks	2005-10-28 10:08:08.000000000 +0200
++++ qemu-0.7.2/softmmu_header.h	2005-10-28 10:09:21.000000000 +0200
+@@ -104,7 +104,7 @@
+ void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int is_user);
+ 
+ #if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \
+-    (ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU)
++    (ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU) && (__GNUC__ < 4)
+ 
+ #define CPU_TLB_ENTRY_BITS 4
+ 
+@@ -131,7 +131,7 @@ static inline RES_TYPE glue(glue(ld, USU
+                   "m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
+                   "i" (CPU_MEM_INDEX),
+                   "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
+-                  : "%eax", "%ecx", "%edx", "memory", "cc");
++                  : "%eax", "%edx", "memory", "cc");
+     return res;
+ }
+ 
+@@ -178,13 +178,14 @@ static inline int glue(glue(lds, SUFFIX)
+                   "m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
+                   "i" (CPU_MEM_INDEX),
+                   "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
+-                  : "%eax", "%ecx", "%edx", "memory", "cc");
++                  : "%eax", "%edx", "memory", "cc");
+     return res;
+ }
+ #endif
+ 
+-static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
++static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE val)
+ {
++    RES_TYPE v = val;
+     asm volatile ("movl %0, %%edx\n"
+                   "movl %0, %%eax\n"
+                   "shrl %3, %%edx\n"
+@@ -236,16 +237,14 @@
+                   "2:\n"
+                   : 
+                   : "r" (ptr), 
+-/* NOTE: 'q' would be needed as constraint, but we could not use it
+-   with T1 ! */
+-                  "r" (v), 
++                  "q" (v), 
+                   "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS), 
+                   "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS), 
+                   "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
+                   "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MEM_INDEX][0].addr_write)),
+                   "i" (CPU_MEM_INDEX),
+                   "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
+-                  : "%eax", "%ecx", "%edx", "memory", "cc");
++                  : "%eax", "%edx", "memory", "cc");
+ }
+ 
+ /* TODO: handle 64-bit access sizes and addresses */