diff options
author | 2019-09-10 15:20:58 +0100 | |
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committer | 2019-09-10 15:20:58 +0100 | |
commit | aebcfb76fc165795e67917cb67cf985c4dfdc577 (patch) | |
tree | 3c4539161437c15ad09750a9cfc7e0696f3a2986 /binutils | |
parent | [PATCH][ARM][GAS]: Support to MVE VCTP instruction. (diff) | |
download | binutils-gdb-aebcfb76fc165795e67917cb67cf985c4dfdc577.tar.gz binutils-gdb-aebcfb76fc165795e67917cb67cf985c4dfdc577.tar.bz2 binutils-gdb-aebcfb76fc165795e67917cb67cf985c4dfdc577.zip |
Enhance the disassembler so that it will reliably determine whether a reloc applies to the middle of the next insn.
PR 24907
binutils* objdump.c (null_print): New function.
(disassemble_bytes): Delete previous_octets local and replace with
a test of the max_reloc_offset_into_insn field of the
bfd_arch_info structure. If a reloc is a potential match for the
next insn, then perform a dummy disassembly in order to calculate
its real length.
bfd * archures.c (bfd_arch_info_type): Add max_reloc_offset_into_insn
field.
(bfd_default_arch_struct): Initialise the new field.
* bfd-in2.h: Regenerate.
* cpu-aarch64.c: Initialise the new field.
* cpu-alpha.c: Likewise.
* cpu-arc.c: Likewise.
* cpu-arm.c: Likewise.
* cpu-avr.c: Likewise.
* cpu-bfin.c: Likewise.
* cpu-bpf.c: Likewise.
* cpu-cr16.c: Likewise.
* cpu-cr16c.c: Likewise.
* cpu-cris.c: Likewise.
* cpu-crx.c: Likewise.
* cpu-csky.c: Likewise.
* cpu-d10v.c: Likewise.
* cpu-d30v.c: Likewise.
* cpu-dlx.c: Likewise.
* cpu-epiphany.c: Likewise.
* cpu-fr30.c: Likewise.
* cpu-frv.c: Likewise.
* cpu-ft32.c: Likewise.
* cpu-h8300.c: Likewise.
* cpu-hppa.c: Likewise.
* cpu-i386.c: Likewise.
* cpu-ia64.c: Likewise.
* cpu-iamcu.c: Likewise.
* cpu-ip2k.c: Likewise.
* cpu-iq2000.c: Likewise.
* cpu-k1om.c: Likewise.
* cpu-l1om.c: Likewise.
* cpu-lm32.c: Likewise.
* cpu-m10200.c: Likewise.
* cpu-m10300.c: Likewise.
* cpu-m32c.c: Likewise.
* cpu-m32r.c: Likewise.
* cpu-m68hc11.c: Likewise.
* cpu-m68hc12.c: Likewise.
* cpu-m68k.c: Likewise.
* cpu-m9s12x.c: Likewise.
* cpu-m9s12xg.c: Likewise.
* cpu-mcore.c: Likewise.
* cpu-mep.c: Likewise.
* cpu-metag.c: Likewise.
* cpu-microblaze.c: Likewise.
* cpu-mips.c: Likewise.
* cpu-mmix.c: Likewise.
* cpu-moxie.c: Likewise.
* cpu-msp430.c: Likewise.
* cpu-mt.c: Likewise.
* cpu-nds32.c: Likewise.
* cpu-nfp.c: Likewise.
* cpu-nios2.c: Likewise.
* cpu-ns32k.c: Likewise.
* cpu-or1k.c: Likewise.
* cpu-pdp11.c: Likewise.
* cpu-pj.c: Likewise.
* cpu-plugin.c: Likewise.
* cpu-powerpc.c: Likewise.
* cpu-pru.c: Likewise.
* cpu-riscv.c: Likewise.
* cpu-rl78.c: Likewise.
* cpu-rs6000.c: Likewise.
* cpu-rx.c: Likewise.
* cpu-s12z.c: Likewise.
* cpu-s390.c: Likewise.
* cpu-score.c: Likewise.
* cpu-sh.c: Likewise.
* cpu-sparc.c: Likewise.
* cpu-spu.c: Likewise.
* cpu-tic30.c: Likewise.
* cpu-tic4x.c: Likewise.
* cpu-tic54x.c: Likewise.
* cpu-tic6x.c: Likewise.
* cpu-tic80.c: Likewise.
* cpu-tilegx.c: Likewise.
* cpu-tilepro.c: Likewise.
* cpu-v850.c: Likewise.
* cpu-v850_rh850.c: Likewise.
* cpu-vax.c: Likewise.
* cpu-visium.c: Likewise.
* cpu-wasm32.c: Likewise.
* cpu-xc16x.c: Likewise.
* cpu-xgate.c: Likewise.
* cpu-xstormy16.c: Likewise.
* cpu-xtensa.c: Likewise.
* cpu-z80.c: Likewise.
* cpu-z8k.c: Likewise.
gas * testsuite/gas/arm/pr24907.s: New test.
* testsuite/gas/arm/pr24907.d: Expected disassembly.
Diffstat (limited to 'binutils')
-rw-r--r-- | binutils/ChangeLog | 10 | ||||
-rw-r--r-- | binutils/objdump.c | 50 |
2 files changed, 45 insertions, 15 deletions
diff --git a/binutils/ChangeLog b/binutils/ChangeLog index 5e8e03d6048..7ccf842955b 100644 --- a/binutils/ChangeLog +++ b/binutils/ChangeLog @@ -1,3 +1,13 @@ +2019-09-10 Nick Clifton <nickc@redhat.com> + + PR 24907 + * objdump.c (null_print): New function. + (disassemble_bytes): Delete previous_octets local and replace with + a test of the max_reloc_offset_into_insn field of the + bfd_arch_info structure. If a reloc is a potential match for the + next insn, then perform a dummy disassembly in order to calculate + its real length. + 2019-09-09 Phil Blundell <pb@pbcl.net> binutils 2.33 branch created. diff --git a/binutils/objdump.c b/binutils/objdump.c index 33d5d72d3d5..2303fe4abf8 100644 --- a/binutils/objdump.c +++ b/binutils/objdump.c @@ -1836,6 +1836,12 @@ objdump_sprintf (SFILE *f, const char *format, ...) #define DEFAULT_SKIP_ZEROES_AT_END 3 +static int +null_print (const void * stream ATTRIBUTE_UNUSED, const char * format ATTRIBUTE_UNUSED, ...) +{ + return 1; +} + /* Disassemble some data in memory between given values. */ static void @@ -1903,10 +1909,7 @@ disassemble_bytes (struct disassemble_info * inf, { bfd_vma z; bfd_boolean need_nl = FALSE; - int previous_octets; - /* Remember the length of the previous instruction. */ - previous_octets = octets; octets = 0; /* Make sure we don't use relocs from previous instructions. */ @@ -1990,26 +1993,43 @@ disassemble_bytes (struct disassemble_info * inf, && *relppp < relppend) { bfd_signed_vma distance_to_rel; + int insn_size = 0; distance_to_rel = (**relppp)->address - (rel_offset + addr_offset); + if (distance_to_rel > 0 + && aux->abfd->arch_info->max_reloc_offset_into_insn <= distance_to_rel) + { + /* This reloc *might* apply to the current insn, + starting somewhere inside it. Discover the length + of the current insn so that the check below will + work. */ + if (insn_width) + insn_size = insn_width; + else + { + /* We find the length by calling the dissassembler + function with a dummy print handler. This should + work unless the disassembler is not expecting to + be called multiple times for the same address. + + This does mean disassembling the instruction + twice, but we only do this when there is a high + probability that there is a reloc that will + affect the instruction. */ + inf->fprintf_func = (fprintf_ftype) null_print; + insn_size = disassemble_fn (section->vma + + addr_offset, inf); + inf->fprintf_func = (fprintf_ftype) objdump_sprintf; + } + } + /* Check to see if the current reloc is associated with the instruction that we are about to disassemble. */ if (distance_to_rel == 0 - /* FIXME: This is wrong. We are trying to catch - relocs that are addressed part way through the - current instruction, as might happen with a packed - VLIW instruction. Unfortunately we do not know the - length of the current instruction since we have not - disassembled it yet. Instead we take a guess based - upon the length of the previous instruction. The - proper solution is to have a new target-specific - disassembler function which just returns the length - of an instruction at a given address without trying - to display its disassembly. */ || (distance_to_rel > 0 - && distance_to_rel < (bfd_signed_vma) (previous_octets/ opb))) + && distance_to_rel < (bfd_signed_vma) (insn_size / opb))) { inf->flags |= INSN_HAS_RELOC; aux->reloc = **relppp; |