diff options
author | Alan Modra <amodra@gmail.com> | 2016-10-05 18:17:02 +1030 |
---|---|---|
committer | Alan Modra <amodra@gmail.com> | 2016-10-06 10:13:15 +1030 |
commit | 1a0670f37442b7ae904932b347353046126b990c (patch) | |
tree | 0dbc69b209e149bff9e8ec0a44eefb866369a750 /gas | |
parent | -Wimplicit-fallthrough noreturn fixes (diff) | |
download | binutils-gdb-1a0670f37442b7ae904932b347353046126b990c.tar.gz binutils-gdb-1a0670f37442b7ae904932b347353046126b990c.tar.bz2 binutils-gdb-1a0670f37442b7ae904932b347353046126b990c.zip |
-Wimplicit-fallthrough warning fixes
Comment changes.
bfd/
* coff-h8300.c: Spell fall through comments consistently.
* coffgen.c: Likewise.
* elf32-hppa.c: Likewise.
* elf32-ppc.c: Likewise.
* elf32-score.c: Likewise.
* elf32-score7.c: Likewise.
* elf64-ppc.c: Likewise.
* elfxx-aarch64.c: Likewise.
* elfxx-mips.c: Likewise.
* cpu-ns32k.c: Add missing fall through comments.
* elf-m10300.c: Likewise.
* elf32-arm.c: Likewise.
* elf32-avr.c: Likewise.
* elf32-bfin.c: Likewise.
* elf32-frv.c: Likewise.
* elf32-i386.c: Likewise.
* elf32-microblaze.c: Likewise.
* elf32-nds32.c: Likewise.
* elf32-ppc.c: Likewise.
* elf32-rl78.c: Likewise.
* elf32-rx.c: Likewise.
* elf32-s390.c: Likewise.
* elf32-sh.c: Likewise.
* elf32-tic6x.c: Likewise.
* elf64-ia64-vms.c: Likewise.
* elf64-ppc.c: Likewise.
* elf64-s390.c: Likewise.
* elf64-x86-64.c: Likewise.
* elflink.c: Likewise.
* elfnn-aarch64.c: Likewise.
* elfnn-ia64.c: Likewise.
* ieee.c: Likewise.
* oasys.c: Likewise.
* pdp11.c: Likewise.
* srec.c: Likewise.
* versados.c: Likewise.
opcodes/
* aarch64-opc.c: Spell fall through comments consistently.
* i386-dis.c: Likewise.
* aarch64-dis.c: Add missing fall through comments.
* aarch64-opc.c: Likewise.
* arc-dis.c: Likewise.
* arm-dis.c: Likewise.
* i386-dis.c: Likewise.
* m68k-dis.c: Likewise.
* mep-asm.c: Likewise.
* ns32k-dis.c: Likewise.
* sh-dis.c: Likewise.
* tic4x-dis.c: Likewise.
* tic6x-dis.c: Likewise.
* vax-dis.c: Likewise.
binutils/
* dlltool.c: Spell fall through comments consistently.
* objcopy.c: Likewise.
* readelf.c: Likewise.
* dwarf.c: Add missing fall through comments.
* elfcomm.c: Likewise.
* sysinfo.y: Likewise.
* readelf.c: Likewise. Also remove extraneous comments.
gas/
* app.c: Add missing fall through comments.
* dw2gencfi.c: Likewise.
* expr.c: Likewise.
* config/tc-alpha.c: Likewise.
* config/tc-arc.c: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-cr16.c: Likewise.
* config/tc-crx.c: Likewise.
* config/tc-dlx.c: Likewise.
* config/tc-h8300.c: Likewise.
* config/tc-hppa.c: Likewise.
* config/tc-i370.c: Likewise.
* config/tc-i386.c: Likewise.
* config/tc-i960.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-m68hc11.c: Likewise.
* config/tc-m68k.c: Likewise.
* config/tc-mep.c: Likewise.
* config/tc-metag.c: Likewise.
* config/tc-microblaze.c: Likewise.
* config/tc-mips.c: Likewise.
* config/tc-ns32k.c: Likewise.
* config/tc-rx.c: Likewise.
* config/tc-score.c: Likewise.
* config/tc-score7.c: Likewise.
* config/tc-sh.c: Likewise.
* config/tc-tic4x.c: Likewise.
* config/tc-vax.c: Likewise.
* config/tc-xstormy16.c: Likewise.
* config/tc-z80.c: Likewise.
* config/tc-z8k.c: Likewise.
* config/obj-elf.c: Likewise.
* config/tc-i386.c: Likewise.
* depend.c: Spell fall through comments consistently.
* config/tc-arm.c: Likewise.
* config/tc-d10v.c: Likewise.
* config/tc-i960.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-m68k.c: Likewise.
* config/tc-mcore.c: Likewise.
* config/tc-mep.c: Likewise.
* config/tc-ns32k.c: Likewise.
* config/tc-visium.c: Likewise.
* config/tc-xstormy16.c: Likewise.
* config/tc-z8k.c: Likewise.
gprof/
* gprof.c: Add missing fall through comments.
ld/
* lexsup.c: Spell fall through comments consistently and add
missing fall through comments.
Diffstat (limited to 'gas')
37 files changed, 193 insertions, 18 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 5ccc133e92b..d0b848934f3 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,53 @@ 2016-10-06 Alan Modra <amodra@gmail.com> + * app.c: Add missing fall through comments. + * dw2gencfi.c: Likewise. + * expr.c: Likewise. + * config/tc-alpha.c: Likewise. + * config/tc-arc.c: Likewise. + * config/tc-arm.c: Likewise. + * config/tc-cr16.c: Likewise. + * config/tc-crx.c: Likewise. + * config/tc-dlx.c: Likewise. + * config/tc-h8300.c: Likewise. + * config/tc-hppa.c: Likewise. + * config/tc-i370.c: Likewise. + * config/tc-i386.c: Likewise. + * config/tc-i960.c: Likewise. + * config/tc-ia64.c: Likewise. + * config/tc-m68hc11.c: Likewise. + * config/tc-m68k.c: Likewise. + * config/tc-mep.c: Likewise. + * config/tc-metag.c: Likewise. + * config/tc-microblaze.c: Likewise. + * config/tc-mips.c: Likewise. + * config/tc-ns32k.c: Likewise. + * config/tc-rx.c: Likewise. + * config/tc-score.c: Likewise. + * config/tc-score7.c: Likewise. + * config/tc-sh.c: Likewise. + * config/tc-tic4x.c: Likewise. + * config/tc-vax.c: Likewise. + * config/tc-xstormy16.c: Likewise. + * config/tc-z80.c: Likewise. + * config/tc-z8k.c: Likewise. + * config/obj-elf.c: Likewise. + * config/tc-i386.c: Likewise. + * depend.c: Spell fall through comments consistently. + * config/tc-arm.c: Likewise. + * config/tc-d10v.c: Likewise. + * config/tc-i960.c: Likewise. + * config/tc-ia64.c: Likewise. + * config/tc-m68k.c: Likewise. + * config/tc-mcore.c: Likewise. + * config/tc-mep.c: Likewise. + * config/tc-ns32k.c: Likewise. + * config/tc-visium.c: Likewise. + * config/tc-xstormy16.c: Likewise. + * config/tc-z8k.c: Likewise. + +2016-10-06 Alan Modra <amodra@gmail.com> + * as.h (as_assert): Add ATTRIBUTE_NORETURN. 2016-10-06 Alan Modra <amodra@gmail.com> diff --git a/gas/app.c b/gas/app.c index 38d8e78f211..4b53ce70612 100644 --- a/gas/app.c +++ b/gas/app.c @@ -695,6 +695,7 @@ do_scrub_chars (size_t (*get) (char *, size_t), char *tostart, size_t tolen) state = 9; break; } + /* Fall through. */ case 17: /* We have seen "af" at the start of a symbol, a ' here is a part of that symbol. */ diff --git a/gas/config/obj-elf.c b/gas/config/obj-elf.c index 8af563fbd24..8d80c77f153 100644 --- a/gas/config/obj-elf.c +++ b/gas/config/obj-elf.c @@ -813,6 +813,7 @@ obj_elf_parse_section_letters (char *str, size_t len, bfd_boolean *is_clone) } break; } + /* Fall through. */ default: { const char *bad_msg = _("unrecognized .section attribute:" diff --git a/gas/config/tc-alpha.c b/gas/config/tc-alpha.c index c70b1648b2b..f7656ec7ee2 100644 --- a/gas/config/tc-alpha.c +++ b/gas/config/tc-alpha.c @@ -1005,6 +1005,7 @@ tokenize_arguments (char *str, /* ... then fall through to plain expression. */ input_line_pointer = hold; } + /* Fall through. */ default: if (saw_arg && !saw_comma) @@ -5583,6 +5584,7 @@ md_atof (int type, char *litP, int *sizeP) case 'G': /* vax_md_atof() doesn't like "G" for some reason. */ type = 'g'; + /* Fall through. */ case 'F': case 'D': return vax_md_atof (type, litP, sizeP); diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c index d480bf1a1e9..f28abf492a6 100644 --- a/gas/config/tc-arc.c +++ b/gas/config/tc-arc.c @@ -1836,7 +1836,7 @@ find_opcode_match (const struct arc_opcode_hash_entry *entry, if (tok[tokidx].X_op != O_constant) goto de_fault; } - /* Fall-through */ + /* Fall through. */ case O_constant: /* Check the range. */ if (operand->bits != 32 @@ -1908,6 +1908,7 @@ find_opcode_match (const struct arc_opcode_hash_entry *entry, goto match_failed; break; } + /* Fall through. */ default: de_fault: if (operand->default_reloc == 0) @@ -1926,6 +1927,7 @@ find_opcode_match (const struct arc_opcode_hash_entry *entry, case O_tlsie: if (!(operand->flags & ARC_OPERAND_LIMM)) goto match_failed; + /* Fall through. */ case O_absent: if (!generic_reloc_p (operand->default_reloc)) goto match_failed; @@ -3022,6 +3024,7 @@ md_apply_fix (fixS *fixP, case BFD_RELOC_ARC_TLS_LE_32: gas_assert (!fixP->fx_addsy); gas_assert (!fixP->fx_subsy); + /* Fall through. */ case BFD_RELOC_ARC_GOTOFF: case BFD_RELOC_ARC_32_ME: @@ -3047,6 +3050,7 @@ md_apply_fix (fixS *fixP, case BFD_RELOC_ARC_S21W_PCREL_PLT: reloc = BFD_RELOC_ARC_S21W_PCREL; + /* Fall through. */ case BFD_RELOC_ARC_S25W_PCREL: case BFD_RELOC_ARC_S21W_PCREL: @@ -3868,6 +3872,7 @@ assemble_insn (const struct arc_opcode *opcode, image = insert_operand (image, operand, regs, NULL, 0); break; } + /* Fall through. */ default: /* This operand needs a relocation. */ diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index db6dd681358..526131c5eae 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -1276,6 +1276,7 @@ arm_reg_alt_syntax (char **ccp, char *start, struct reg_entry *reg, if (*ccp != start && processor <= 15) return processor; } + /* Fall through. */ case REG_TYPE_MMXWC: /* WC includes WCG. ??? I'm not sure this is true for all @@ -17773,7 +17774,7 @@ opcode_lookup (char **str) case OT_odd_infix_unc: if (!unified_syntax) return 0; - /* else fall through */ + /* Fall through. */ case OT_csuffix: case OT_csuffixF: @@ -22842,6 +22843,7 @@ md_apply_fix (fixS * fixP, case BFD_RELOC_ARM_OFFSET_IMM: if (!fixP->fx_done && seg->use_rela_p) value = 0; + /* Fall through. */ case BFD_RELOC_ARM_LITERAL: sign = value > 0; @@ -23200,6 +23202,7 @@ md_apply_fix (fixS * fixP, newval = md_chars_to_number (buf, INSN_SIZE); fixP->fx_done = 0; } + /* Fall through. */ case BFD_RELOC_ARM_PLT32: #endif @@ -24092,6 +24095,7 @@ tc_gen_reloc (asection *section, fixS *fixp) code = BFD_RELOC_8_PCREL; break; } + /* Fall through. */ case BFD_RELOC_16: if (fixp->fx_pcrel) @@ -24099,6 +24103,7 @@ tc_gen_reloc (asection *section, fixS *fixp) code = BFD_RELOC_16_PCREL; break; } + /* Fall through. */ case BFD_RELOC_32: if (fixp->fx_pcrel) @@ -24106,6 +24111,7 @@ tc_gen_reloc (asection *section, fixS *fixp) code = BFD_RELOC_32_PCREL; break; } + /* Fall through. */ case BFD_RELOC_ARM_MOVW: if (fixp->fx_pcrel) @@ -24113,6 +24119,7 @@ tc_gen_reloc (asection *section, fixS *fixp) code = BFD_RELOC_ARM_MOVW_PCREL; break; } + /* Fall through. */ case BFD_RELOC_ARM_MOVT: if (fixp->fx_pcrel) @@ -24120,6 +24127,7 @@ tc_gen_reloc (asection *section, fixS *fixp) code = BFD_RELOC_ARM_MOVT_PCREL; break; } + /* Fall through. */ case BFD_RELOC_ARM_THUMB_MOVW: if (fixp->fx_pcrel) @@ -24127,6 +24135,7 @@ tc_gen_reloc (asection *section, fixS *fixp) code = BFD_RELOC_ARM_THUMB_MOVW_PCREL; break; } + /* Fall through. */ case BFD_RELOC_ARM_THUMB_MOVT: if (fixp->fx_pcrel) @@ -24134,6 +24143,7 @@ tc_gen_reloc (asection *section, fixS *fixp) code = BFD_RELOC_ARM_THUMB_MOVT_PCREL; break; } + /* Fall through. */ case BFD_RELOC_NONE: case BFD_RELOC_ARM_PCREL_BRANCH: diff --git a/gas/config/tc-cr16.c b/gas/config/tc-cr16.c index 40d9ba4d510..186cfb9a56c 100644 --- a/gas/config/tc-cr16.c +++ b/gas/config/tc-cr16.c @@ -1165,6 +1165,7 @@ set_operand (char *operand, ins * cr16_ins) { case arg_ic: /* Case $0x18. */ operandS++; + /* Fall through. */ case arg_c: /* Case 0x18. */ /* Set constant. */ process_label_constant (operandS, cr16_ins); @@ -1182,6 +1183,7 @@ set_operand (char *operand, ins * cr16_ins) *operandE = '\0'; process_label_constant (operandS, cr16_ins); operandS = operandE; + /* Fall through. */ case arg_rbase: /* Case (r1) or (r1,r0). */ operandS++; /* Set register base. */ @@ -1789,7 +1791,9 @@ print_constant (int nbits, int shift, argument *arg) break; case 21: - if ((nbits == 21) && (IS_INSN_TYPE (LD_STOR_INS))) nbits = 20; + if ((nbits == 21) && (IS_INSN_TYPE (LD_STOR_INS))) + nbits = 20; + /* Fall through. */ case 24: case 22: case 20: diff --git a/gas/config/tc-crx.c b/gas/config/tc-crx.c index 9a943d530fe..a9af5bb83ad 100644 --- a/gas/config/tc-crx.c +++ b/gas/config/tc-crx.c @@ -730,6 +730,7 @@ set_operand (char *operand, ins * crx_ins) case arg_sc: /* Case *+0x18. */ case arg_ic: /* Case $0x18. */ operandS++; + /* Fall through. */ case arg_c: /* Case 0x18. */ /* Set constant. */ process_label_constant (operandS, crx_ins); @@ -747,6 +748,7 @@ set_operand (char *operand, ins * crx_ins) *operandE = '\0'; process_label_constant (operandS, crx_ins); operandS = operandE; + /* Fall through. */ case arg_rbase: /* Case (r1). */ operandS++; /* Set register base. */ @@ -1279,6 +1281,7 @@ print_operand (int nbits, int shift, argument *arg) CRX_PRINT (0, getreg_image (arg->r), 12); CRX_PRINT (0, getreg_image (arg->i_r), 8); CRX_PRINT (0, arg->scale, 6); + /* Fall through. */ case arg_ic: case arg_c: print_constant (nbits, shift, arg); diff --git a/gas/config/tc-d10v.c b/gas/config/tc-d10v.c index 03b264d63cf..e7cfcdfa9a1 100644 --- a/gas/config/tc-d10v.c +++ b/gas/config/tc-d10v.c @@ -1548,7 +1548,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) if ( segf && segf->sym != fixP->fx_addsy) value = 0; } - /* Drop through. */ + /* Fall through. */ case BFD_RELOC_D10V_18: /* Instruction addresses are always right-shifted by 2. */ value >>= AT_WORD_RIGHT_SHIFT; diff --git a/gas/config/tc-dlx.c b/gas/config/tc-dlx.c index 079a9b6ae97..a03aa196fb6 100644 --- a/gas/config/tc-dlx.c +++ b/gas/config/tc-dlx.c @@ -780,6 +780,7 @@ machine_ip (char *str) reg_shift = 21; goto general_reg; } + /* Fall through. */ /* The immediate 16 bits literal, bit 0-15. */ case 'i': diff --git a/gas/config/tc-h8300.c b/gas/config/tc-h8300.c index 048d31ea3c3..28566a54c65 100644 --- a/gas/config/tc-h8300.c +++ b/gas/config/tc-h8300.c @@ -1432,6 +1432,7 @@ do_a_fix_imm (int offset, int nibble, struct h8_op *operand, int relaxmode, cons break; default: as_bad (_("Can't work out size of operand.\n")); + /* Fall through. */ case L_16: case L_16U: size = 2; diff --git a/gas/config/tc-hppa.c b/gas/config/tc-hppa.c index f5cdc2c09ff..2ed06a22233 100644 --- a/gas/config/tc-hppa.c +++ b/gas/config/tc-hppa.c @@ -5432,6 +5432,7 @@ pa_ip (char *str) { case SGL: opcode |= 0x20; + /* Fall through. */ case DBL: the_insn.fpof1 = flag; continue; diff --git a/gas/config/tc-i370.c b/gas/config/tc-i370.c index ac8aa95c0e4..6299cc7610a 100644 --- a/gas/config/tc-i370.c +++ b/gas/config/tc-i370.c @@ -956,6 +956,7 @@ i370_dc (int unused ATTRIBUTE_UNUSED) break; case 'E': /* 32-bit */ type = 'f'; + /* Fall through. */ case 'D': /* 64-bit */ md_atof (type, tmp, &nbytes); p = frag_more (nbytes); diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 660d23e68f2..0ab9e1e34bb 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1374,9 +1374,11 @@ operand_type_all_zero (const union i386_operand_type *x) case 3: if (x->array[2]) return 0; + /* Fall through. */ case 2: if (x->array[1]) return 0; + /* Fall through. */ case 1: return !x->array[0]; default: @@ -1391,10 +1393,13 @@ operand_type_set (union i386_operand_type *x, unsigned int v) { case 3: x->array[2] = v; + /* Fall through. */ case 2: x->array[1] = v; + /* Fall through. */ case 1: x->array[0] = v; + /* Fall through. */ break; default: abort (); @@ -1410,9 +1415,11 @@ operand_type_equal (const union i386_operand_type *x, case 3: if (x->array[2] != y->array[2]) return 0; + /* Fall through. */ case 2: if (x->array[1] != y->array[1]) return 0; + /* Fall through. */ case 1: return x->array[0] == y->array[0]; break; @@ -1429,9 +1436,11 @@ cpu_flags_all_zero (const union i386_cpu_flags *x) case 3: if (x->array[2]) return 0; + /* Fall through. */ case 2: if (x->array[1]) return 0; + /* Fall through. */ case 1: return !x->array[0]; default: @@ -1448,9 +1457,11 @@ cpu_flags_equal (const union i386_cpu_flags *x, case 3: if (x->array[2] != y->array[2]) return 0; + /* Fall through. */ case 2: if (x->array[1] != y->array[1]) return 0; + /* Fall through. */ case 1: return x->array[0] == y->array[0]; break; @@ -1473,8 +1484,10 @@ cpu_flags_and (i386_cpu_flags x, i386_cpu_flags y) { case 3: x.array [2] &= y.array [2]; + /* Fall through. */ case 2: x.array [1] &= y.array [1]; + /* Fall through. */ case 1: x.array [0] &= y.array [0]; break; @@ -1491,8 +1504,10 @@ cpu_flags_or (i386_cpu_flags x, i386_cpu_flags y) { case 3: x.array [2] |= y.array [2]; + /* Fall through. */ case 2: x.array [1] |= y.array [1]; + /* Fall through. */ case 1: x.array [0] |= y.array [0]; break; @@ -1509,8 +1524,10 @@ cpu_flags_and_not (i386_cpu_flags x, i386_cpu_flags y) { case 3: x.array [2] &= ~y.array [2]; + /* Fall through. */ case 2: x.array [1] &= ~y.array [1]; + /* Fall through. */ case 1: x.array [0] &= ~y.array [0]; break; @@ -1607,8 +1624,10 @@ operand_type_and (i386_operand_type x, i386_operand_type y) { case 3: x.array [2] &= y.array [2]; + /* Fall through. */ case 2: x.array [1] &= y.array [1]; + /* Fall through. */ case 1: x.array [0] &= y.array [0]; break; @@ -1625,8 +1644,10 @@ operand_type_or (i386_operand_type x, i386_operand_type y) { case 3: x.array [2] |= y.array [2]; + /* Fall through. */ case 2: x.array [1] |= y.array [1]; + /* Fall through. */ case 1: x.array [0] |= y.array [0]; break; @@ -1643,8 +1664,10 @@ operand_type_xor (i386_operand_type x, i386_operand_type y) { case 3: x.array [2] ^= y.array [2]; + /* Fall through. */ case 2: x.array [1] ^= y.array [1]; + /* Fall through. */ case 1: x.array [0] ^= y.array [0]; break; @@ -3928,6 +3951,7 @@ check_suffix: if (intel_syntax && (intel_float_operand (mnemonic) & 2)) i.suffix = SHORT_MNEM_SUFFIX; else + /* Fall through. */ case BYTE_MNEM_SUFFIX: case QWORD_MNEM_SUFFIX: i.suffix = mnem_p[-1]; @@ -4203,6 +4227,7 @@ swap_operands (void) case 5: case 4: swap_2_operands (1, i.operands - 2); + /* Fall through. */ case 3: case 2: swap_2_operands (0, i.operands - 1); @@ -4942,11 +4967,13 @@ match_template (char mnem_suffix) else if (t->opcode_modifier.d) goto check_reverse; } + /* Fall through. */ case 3: /* If we swap operand in encoding, we match the next one. */ if (i.swap_operand && t->opcode_modifier.s) continue; + /* Fall through. */ case 4: case 5: overlap1 = operand_type_and (i.types[1], operand_types[1]); @@ -4998,9 +5025,11 @@ check_reverse: case 5: overlap4 = operand_type_and (i.types[4], operand_types[4]); + /* Fall through. */ case 4: overlap3 = operand_type_and (i.types[3], operand_types[3]); + /* Fall through. */ case 3: overlap2 = operand_type_and (i.types[2], operand_types[2]); @@ -5018,6 +5047,7 @@ check_reverse: i.types[4], operand_types[4])) continue; + /* Fall through. */ case 4: if (!operand_type_match (overlap3, i.types[3]) || (check_register @@ -5028,6 +5058,7 @@ check_reverse: i.types[3], operand_types[3]))) continue; + /* Fall through. */ case 3: /* Here we make use of the fact that there are no reverse match 3 operand instructions, and all 3 @@ -5370,6 +5401,7 @@ process_suffix (void) i.suffix = QWORD_MNEM_SUFFIX; break; } + /* Fall through. */ case CODE_32BIT: if (!i.tm.opcode_modifier.no_lsuf) i.suffix = LONG_MNEM_SUFFIX; @@ -6953,6 +6985,7 @@ output_jump (void) { case 2: *p++ = i.tm.base_opcode >> 8; + /* Fall through. */ case 1: *p++ = i.tm.base_opcode; break; @@ -10694,6 +10727,7 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) return NULL; } #endif + /* Fall through. */ case BFD_RELOC_X86_64_PLT32: case BFD_RELOC_X86_64_GOT32: @@ -10746,6 +10780,7 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) code = fixp->fx_r_type; break; } + /* Fall through. */ default: if (fixp->fx_pcrel) { diff --git a/gas/config/tc-i960.c b/gas/config/tc-i960.c index 5afbb6f313c..70ac3798d85 100644 --- a/gas/config/tc-i960.c +++ b/gas/config/tc-i960.c @@ -1041,7 +1041,7 @@ parse_memop (memS *memP, /* Where to put the results. */ case I_BIT: /* Treat missing displacement as displacement of 0. */ mode |= D_BIT; - /* Fall into next case. */ + /* Fall through. */ case D_BIT | A_BIT | I_BIT: case D_BIT | I_BIT: /* Set MEMB bit in mode, and OR in mode bits. */ @@ -1676,6 +1676,7 @@ md_assemble (char *textP) mem_fmt (args, oP, 1); break; } + /* Fall through. */ case MEM2: case MEM4: case MEM8: diff --git a/gas/config/tc-ia64.c b/gas/config/tc-ia64.c index 83ea813792a..d6c2822b3bf 100644 --- a/gas/config/tc-ia64.c +++ b/gas/config/tc-ia64.c @@ -2738,6 +2738,7 @@ slot_index (unsigned long slot_addr, as_fatal (_("Only constant offsets are supported")); break; } + /* Fall through. */ case rs_fill: s_index += 3 * (first_frag->fr_offset >> 4); break; @@ -5635,6 +5636,7 @@ operand_match (const struct ia64_opcode *idesc, int res_index, expressionS *e) /* SOR must be an integer multiple of 8 */ if (e->X_op == O_constant && e->X_add_number & 0x7) return OPERAND_OUT_OF_RANGE; + /* Fall through. */ case IA64_OPND_SOF: case IA64_OPND_SOL: if (e->X_op == O_constant) @@ -5790,6 +5792,7 @@ operand_match (const struct ia64_opcode *idesc, int res_index, expressionS *e) case IA64_OPND_IMM14: case IA64_OPND_IMM22: relocatable = 1; + /* Fall through. */ case IA64_OPND_IMM1: case IA64_OPND_IMM8: case IA64_OPND_IMM8U4: @@ -5929,6 +5932,7 @@ operand_match (const struct ia64_opcode *idesc, int res_index, expressionS *e) ++CURR_SLOT.num_fixups; return OPERAND_MATCH; } + /* Fall through. */ case IA64_OPND_TAG13: case IA64_OPND_TAG13b: switch (e->X_op) @@ -9281,6 +9285,7 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note) { specs[count++] = tmpl; } + /* Fall through. */ case AR_RSC: if (!rsrc_write && (regno == AR_BSPSTORE @@ -10263,7 +10268,7 @@ remove_marked_resource (struct rsrc *rs) case IA64_DVS_SPECIFIC: if (md.debug_dv) fprintf (stderr, "Implementation-specific, assume worst case...\n"); - /* ...fall through... */ + /* Fall through. */ case IA64_DVS_INSTR: if (md.debug_dv) fprintf (stderr, "Inserting instr serialization\n"); diff --git a/gas/config/tc-m68hc11.c b/gas/config/tc-m68hc11.c index 2f80e0adb23..1fc52b1762c 100644 --- a/gas/config/tc-m68hc11.c +++ b/gas/config/tc-m68hc11.c @@ -2287,6 +2287,7 @@ build_indexed_byte (operand *op, int format ATTRIBUTE_UNUSED, int move_insn) default: as_bad (_("Invalid accumulator register.")); + /* Fall through. */ case REG_D: byte = 0xE6; diff --git a/gas/config/tc-m68k.c b/gas/config/tc-m68k.c index 4d2c0e4d056..4f64f5cf6f9 100644 --- a/gas/config/tc-m68k.c +++ b/gas/config/tc-m68k.c @@ -3003,7 +3003,7 @@ m68k_ip (char *instring) TAB (ABSTOPCREL, SZ_UNDEF)); break; } - /* Fall through into long. */ + /* Fall through. */ case SIZE_LONG: if (isvar (&opP->disp)) add_fix ('l', &opP->disp, 0, 0); @@ -3109,6 +3109,7 @@ m68k_ip (char *instring) break; case '3': tmpreg &= 0xFF; + /* Fall through. */ case '8': case 'C': case 'j': diff --git a/gas/config/tc-mcore.c b/gas/config/tc-mcore.c index 468a01b3f35..ec03a296d2a 100644 --- a/gas/config/tc-mcore.c +++ b/gas/config/tc-mcore.c @@ -979,7 +979,7 @@ md_assemble (char * str) as_bad (_("M340 specific opcode used when assembling for M210")); break; } - /* drop through... */ + /* Fall through. */ case O2: op_end = parse_reg (op_end + 1, & reg); inst |= reg; diff --git a/gas/config/tc-mep.c b/gas/config/tc-mep.c index f018f742747..dac10c941db 100644 --- a/gas/config/tc-mep.c +++ b/gas/config/tc-mep.c @@ -1708,7 +1708,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, operand = MEP_OPERAND_PCREL17A2; break; } - /* ...FALLTHROUGH... */ + /* Fall through. */ case MEP_INSN_JMP: addend = target_address_for (fragP); @@ -1723,6 +1723,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, case MEP_INSN_BNEZ: bit = 1; + /* Fall through. */ case MEP_INSN_BEQZ: fragP->fr_opcode[1^e] = bit | (addend & 0xfe); operand = MEP_OPERAND_PCREL8A2; @@ -1730,6 +1731,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, case MEP_INSN_BNEI: bit = 4; + /* Fall through. */ case MEP_INSN_BEQI: if (subtype_mappings[fragP->fr_subtype].growth) { diff --git a/gas/config/tc-metag.c b/gas/config/tc-metag.c index e9f86876dd2..b56f9d21a7b 100644 --- a/gas/config/tc-metag.c +++ b/gas/config/tc-metag.c @@ -2683,6 +2683,7 @@ parse_alu (const char *line, metag_insn *insn, insn->bits |= (1 << 7); break; } + /* Fall through. */ default: as_bad (_("invalid quickrot register specified")); return NULL; diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c index b4985f09dae..286efd4d25b 100644 --- a/gas/config/tc-microblaze.c +++ b/gas/config/tc-microblaze.c @@ -2132,6 +2132,7 @@ md_apply_fix (fixS * fixP, case BFD_RELOC_MICROBLAZE_64_TLSGD: case BFD_RELOC_MICROBLAZE_64_TLSLD: S_SET_THREAD_LOCAL (fixP->fx_addsy); + /* Fall through. */ case BFD_RELOC_MICROBLAZE_64_GOTPC: case BFD_RELOC_MICROBLAZE_64_GOT: diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 224b9d021fc..283ed80d3c5 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -9848,6 +9848,7 @@ macro (struct mips_cl_insn *ip, char *str) { case M_DABS: dbl = 1; + /* Fall through. */ case M_ABS: /* bgez $a0,1f move v0,$a0 @@ -9997,6 +9998,7 @@ macro (struct mips_cl_insn *ip, char *str) case M_BGEL: likely = 1; + /* Fall through. */ case M_BGE: if (op[1] == 0) macro_build_branch_rs (likely ? M_BGEZL : M_BGEZ, &offset_expr, op[0]); @@ -10022,6 +10024,7 @@ macro (struct mips_cl_insn *ip, char *str) case M_BGTL_I: likely = 1; + /* Fall through. */ case M_BGT_I: /* Check for > max integer. */ if (imm_expr.X_add_number >= GPR_SMAX) @@ -10068,6 +10071,7 @@ macro (struct mips_cl_insn *ip, char *str) case M_BGEUL: likely = 1; + /* Fall through. */ case M_BGEU: if (op[1] == 0) goto do_true; @@ -10085,6 +10089,7 @@ macro (struct mips_cl_insn *ip, char *str) case M_BGTUL_I: likely = 1; + /* Fall through. */ case M_BGTU_I: if (op[0] == 0 || (GPR_SIZE == 32 @@ -10112,6 +10117,7 @@ macro (struct mips_cl_insn *ip, char *str) case M_BGTL: likely = 1; + /* Fall through. */ case M_BGT: if (op[1] == 0) macro_build_branch_rs (likely ? M_BGTZL : M_BGTZ, &offset_expr, op[0]); @@ -10128,6 +10134,7 @@ macro (struct mips_cl_insn *ip, char *str) case M_BGTUL: likely = 1; + /* Fall through. */ case M_BGTU: if (op[1] == 0) macro_build_branch_rsrt (likely ? M_BNEL : M_BNE, @@ -10145,6 +10152,7 @@ macro (struct mips_cl_insn *ip, char *str) case M_BLEL: likely = 1; + /* Fall through. */ case M_BLE: if (op[1] == 0) macro_build_branch_rs (likely ? M_BLEZL : M_BLEZ, &offset_expr, op[0]); @@ -10161,6 +10169,7 @@ macro (struct mips_cl_insn *ip, char *str) case M_BLEL_I: likely = 1; + /* Fall through. */ case M_BLE_I: if (imm_expr.X_add_number >= GPR_SMAX) goto do_true; @@ -10185,6 +10194,7 @@ macro (struct mips_cl_insn *ip, char *str) case M_BLEUL: likely = 1; + /* Fall through. */ case M_BLEU: if (op[1] == 0) macro_build_branch_rsrt (likely ? M_BEQL : M_BEQ, @@ -10202,6 +10212,7 @@ macro (struct mips_cl_insn *ip, char *str) case M_BLEUL_I: likely = 1; + /* Fall through. */ case M_BLEU_I: if (op[0] == 0 || (GPR_SIZE == 32 @@ -10229,6 +10240,7 @@ macro (struct mips_cl_insn *ip, char *str) case M_BLTL: likely = 1; + /* Fall through. */ case M_BLT: if (op[1] == 0) macro_build_branch_rs (likely ? M_BLTZL : M_BLTZ, &offset_expr, op[0]); @@ -10245,6 +10257,7 @@ macro (struct mips_cl_insn *ip, char *str) case M_BLTUL: likely = 1; + /* Fall through. */ case M_BLTU: if (op[1] == 0) goto do_false; @@ -10262,11 +10275,13 @@ macro (struct mips_cl_insn *ip, char *str) case M_DDIV_3: dbl = 1; + /* Fall through. */ case M_DIV_3: s = "mflo"; goto do_div3; case M_DREM_3: dbl = 1; + /* Fall through. */ case M_REM_3: s = "mfhi"; do_div3: @@ -10458,11 +10473,13 @@ macro (struct mips_cl_insn *ip, char *str) case M_DLCA_AB: dbl = 1; + /* Fall through. */ case M_LCA_AB: call = 1; goto do_la; case M_DLA_AB: dbl = 1; + /* Fall through. */ case M_LA_AB: do_la: /* Load the address of a symbol into a register. If breg is not @@ -12685,6 +12702,7 @@ macro (struct mips_cl_insn *ip, char *str) case M_DMUL: dbl = 1; + /* Fall through. */ case M_MUL: if (mips_opts.arch == CPU_R5900) macro_build (NULL, dbl ? "dmultu" : "multu", "d,s,t", op[0], op[1], @@ -12698,6 +12716,7 @@ macro (struct mips_cl_insn *ip, char *str) case M_DMUL_I: dbl = 1; + /* Fall through. */ case M_MUL_I: /* The MIPS assembler some times generates shifts and adds. I'm not trying to be that fancy. GCC should do this for us @@ -12710,12 +12729,14 @@ macro (struct mips_cl_insn *ip, char *str) case M_DMULO_I: dbl = 1; + /* Fall through. */ case M_MULO_I: imm = 1; goto do_mulo; case M_DMULO: dbl = 1; + /* Fall through. */ case M_MULO: do_mulo: start_noreorder (); @@ -12747,12 +12768,14 @@ macro (struct mips_cl_insn *ip, char *str) case M_DMULOU_I: dbl = 1; + /* Fall through. */ case M_MULOU_I: imm = 1; goto do_mulou; case M_DMULOU: dbl = 1; + /* Fall through. */ case M_MULOU: do_mulou: start_noreorder (); @@ -13456,11 +13479,13 @@ mips16_macro (struct mips_cl_insn *ip) case M_DDIV_3: dbl = 1; + /* Fall through. */ case M_DIV_3: s = "mflo"; goto do_div3; case M_DREM_3: dbl = 1; + /* Fall through. */ case M_REM_3: s = "mfhi"; do_div3: @@ -13505,6 +13530,7 @@ mips16_macro (struct mips_cl_insn *ip) case M_DMUL: dbl = 1; + /* Fall through. */ case M_MUL: macro_build (NULL, dbl ? "dmultu" : "multu", "x,y", op[1], op[2]); macro_build (NULL, "mflo", "x", op[0]); diff --git a/gas/config/tc-ns32k.c b/gas/config/tc-ns32k.c index a0db7690ace..570916db6e9 100644 --- a/gas/config/tc-ns32k.c +++ b/gas/config/tc-ns32k.c @@ -432,6 +432,7 @@ addr_mode (char *operand, addrmodeP->disp[0] = str + 2; return -1; } + /* Fall through. */ default: as_bad (_("Invalid syntax in PC-relative addressing mode")); return 0; @@ -481,7 +482,7 @@ addr_mode (char *operand, { case 'f': addrmodeP->float_flag = 1; - /* Drop through. */ + /* Fall through. */ case 'r': if (str[1] >= '0' && str[1] < '8') { @@ -564,7 +565,7 @@ addr_mode (char *operand, str[strl - 4] = 0; return -1; /* reg rel */ } - /* Drop through. */ + /* Fall through. */ default: if (!strncmp (&str[strl - 4], "(fp", 3)) @@ -925,6 +926,7 @@ encode_operand (int argc, case 'f': /* Operand of sfsr turns out to be a nasty specialcase. */ opcode_bit_ptr -= 5; + /* Fall through. */ case 'Z': /* Float not immediate. */ case 'F': /* 32 bit float general form. */ case 'L': /* 64 bit float. */ diff --git a/gas/config/tc-rx.c b/gas/config/tc-rx.c index bb0f689cf1b..07dccc6e83d 100644 --- a/gas/config/tc-rx.c +++ b/gas/config/tc-rx.c @@ -2401,8 +2401,10 @@ md_apply_fix (struct fix * f ATTRIBUTE_UNUSED, case BFD_RELOC_RX_GPRELL: val >>= 1; + /* Fall through. */ case BFD_RELOC_RX_GPRELW: val >>= 1; + /* Fall through. */ case BFD_RELOC_RX_GPRELB: #if RX_OPCODE_BIG_ENDIAN op[1] = val & 0xff; diff --git a/gas/config/tc-score.c b/gas/config/tc-score.c index f96879b3ab1..f68cc6fb616 100644 --- a/gas/config/tc-score.c +++ b/gas/config/tc-score.c @@ -7453,6 +7453,7 @@ s3_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) code = BFD_RELOC_32_PCREL; break; } + /* Fall through. */ case BFD_RELOC_HI16_S: case BFD_RELOC_LO16: case BFD_RELOC_SCORE_JMP: diff --git a/gas/config/tc-score7.c b/gas/config/tc-score7.c index 941467be3bf..d7dd108d6df 100644 --- a/gas/config/tc-score7.c +++ b/gas/config/tc-score7.c @@ -6930,6 +6930,7 @@ s7_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) code = BFD_RELOC_32_PCREL; break; } + /* Fall through. */ case BFD_RELOC_HI16_S: case BFD_RELOC_LO16: case BFD_RELOC_SCORE_JMP: diff --git a/gas/config/tc-sh.c b/gas/config/tc-sh.c index f65fbb22de4..55966e0376c 100644 --- a/gas/config/tc-sh.c +++ b/gas/config/tc-sh.c @@ -2414,11 +2414,13 @@ build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) break; case IMM0_3s: nbuf[indx] |= 0x08; + /* Fall through. */ case IMM0_3c: insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand); break; case IMM0_3Us: nbuf[indx] |= 0x80; + /* Fall through. */ case IMM0_3Uc: insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand); break; diff --git a/gas/config/tc-tic4x.c b/gas/config/tc-tic4x.c index 84c9ece720a..f86a5352c60 100644 --- a/gas/config/tc-tic4x.c +++ b/gas/config/tc-tic4x.c @@ -2638,9 +2638,11 @@ md_apply_fix (fixS *fixP, valueT *value, segT seg ATTRIBUTE_UNUSED) { case BFD_RELOC_32: buf[3] = val >> 24; + /* Fall through. */ case BFD_RELOC_24: case BFD_RELOC_24_PCREL: buf[2] = val >> 16; + /* Fall through. */ case BFD_RELOC_16: case BFD_RELOC_16_PCREL: case BFD_RELOC_LO16: @@ -2718,24 +2720,28 @@ md_parse_option (int c, const char *arg) case 'b': as_warn (_("Option -b is depreciated, please use -mbig")); + /* Fall through. */ case OPTION_BIG: /* big model */ tic4x_big_model = 1; break; case 'p': as_warn (_("Option -p is depreciated, please use -mmemparm")); + /* Fall through. */ case OPTION_MEMPARM: /* push args */ tic4x_reg_args = 0; break; case 'r': as_warn (_("Option -r is depreciated, please use -mregparm")); + /* Fall through. */ case OPTION_REGPARM: /* register args */ tic4x_reg_args = 1; break; case 's': as_warn (_("Option -s is depreciated, please use -msmall")); + /* Fall through. */ case OPTION_SMALL: /* small model */ tic4x_big_model = 0; break; diff --git a/gas/config/tc-vax.c b/gas/config/tc-vax.c index b85b5bb91bd..e358c842cfa 100644 --- a/gas/config/tc-vax.c +++ b/gas/config/tc-vax.c @@ -1796,8 +1796,10 @@ vip_op (char *optext, struct vop *vopP) { case 'l': mode += 2; + /* Fall through. */ case 'w': mode += 2; + /* Fall through. */ case ' ': /* Assumed B^ until our caller changes it. */ case 'b': break; diff --git a/gas/config/tc-visium.c b/gas/config/tc-visium.c index 05e161615a3..5b1d255aa6f 100644 --- a/gas/config/tc-visium.c +++ b/gas/config/tc-visium.c @@ -1520,8 +1520,7 @@ md_assemble (char *str0) return; } this_dest = r1; - - /* fall through... */ + /* Fall through. */ case mode_i: /* MOVIL/WRTL traditionally get an implicit "%l" applied diff --git a/gas/config/tc-xstormy16.c b/gas/config/tc-xstormy16.c index 887160db01d..ca6793e7e1b 100644 --- a/gas/config/tc-xstormy16.c +++ b/gas/config/tc-xstormy16.c @@ -382,6 +382,7 @@ md_cgen_lookup_reloc (const CGEN_INSN * insn ATTRIBUTE_UNUSED, case XSTORMY16_OPERAND_REL8_4: fixP->fx_addnumber -= 2; + /* Fall through. */ case XSTORMY16_OPERAND_REL8_2: fixP->fx_addnumber -= 2; fixP->fx_pcrel = 1; @@ -389,7 +390,7 @@ md_cgen_lookup_reloc (const CGEN_INSN * insn ATTRIBUTE_UNUSED, case XSTORMY16_OPERAND_REL12: fixP->fx_where += 2; - /* Fall through... */ + /* Fall through. */ case XSTORMY16_OPERAND_REL12A: fixP->fx_addnumber -= 2; fixP->fx_pcrel = 1; diff --git a/gas/config/tc-z80.c b/gas/config/tc-z80.c index dcc74f6ed58..b7e075a8094 100644 --- a/gas/config/tc-z80.c +++ b/gas/config/tc-z80.c @@ -317,6 +317,7 @@ z80_start_line_hook (void) *p++ = buf[2]; break; } + /* Fall through. */ case '"': for (quote = *p++; quote != *p && '\n' != *p; ++p) /* No escapes. */ ; @@ -874,6 +875,7 @@ emit_mr (char prefix, char opcode, const char *args) } check_mach (INS_UNPORT); } + /* Fall through. */ case O_register: emit_mx (prefix, opcode, 0, & arg_m); break; @@ -1776,6 +1778,7 @@ emit_mulub (char prefix ATTRIBUTE_UNUSED, char opcode, const char * args) *q = opcode + ((reg - 'b') << 3); break; } + /* Fall through. */ default: ill_op (); } diff --git a/gas/config/tc-z8k.c b/gas/config/tc-z8k.c index 9b6ee3867a5..5be09fd7581 100644 --- a/gas/config/tc-z8k.c +++ b/gas/config/tc-z8k.c @@ -1000,11 +1000,14 @@ apply_fix (char *ptr, bfd_reloc_code_real_type type, expressionS *operand, *ptr++ = n >> 24; *ptr++ = n >> 20; *ptr++ = n >> 16; + /* Fall through. */ case 4: /* 4 nibbles == 16 bits. */ *ptr++ = n >> 12; *ptr++ = n >> 8; + /* Fall through. */ case 2: *ptr++ = n >> 4; + /* Fall through. */ case 1: *ptr++ = n >> 0; break; @@ -1152,7 +1155,7 @@ build_bytes (opcode_entry_type *this_try, struct z8k_op *operand ATTRIBUTE_UNUSE /*case ARG_IMMNMINUS1: not used. */ case ARG_IMM4M1: imm_operand->X_add_number--; - /* Drop through. */ + /* Fall through. */ case ARG_IMM4: if (imm_operand->X_add_number > 15) as_bad (_("immediate value out of range")); @@ -1160,7 +1163,7 @@ build_bytes (opcode_entry_type *this_try, struct z8k_op *operand ATTRIBUTE_UNUSE break; case ARG_NIM8: imm_operand->X_add_number = -imm_operand->X_add_number; - /* Drop through. */ + /* Fall through. */ case ARG_IMM8: output_ptr = apply_fix (output_ptr, BFD_RELOC_8, imm_operand, 2); break; diff --git a/gas/depend.c b/gas/depend.c index 7203e59746f..8b57a679d48 100644 --- a/gas/depend.c +++ b/gas/depend.c @@ -121,8 +121,8 @@ quote_string_for_make (FILE *file, const char *src) if (file) putc (c, file); i++; - /* Fall through. This can mishandle things like "$(" but - there's no easy fix. */ + /* Fall through. */ + /* This can mishandle things like "$(" but there's no easy fix. */ default: ordinary_char: /* This can mishandle characters in the string "\0\n%*?[\\~"; diff --git a/gas/dw2gencfi.c b/gas/dw2gencfi.c index 4fbdf4248e2..7294f179964 100644 --- a/gas/dw2gencfi.c +++ b/gas/dw2gencfi.c @@ -1177,6 +1177,7 @@ dot_cfi_val_encoded_addr (int ignored ATTRIBUTE_UNUSED) case O_constant: if ((encoding & 0x70) != DW_EH_PE_pcrel) break; + /* Fall through. */ default: encoding = DW_EH_PE_omit; break; diff --git a/gas/expr.c b/gas/expr.c index b1cdb38bab5..b9983d86b68 100644 --- a/gas/expr.c +++ b/gas/expr.c @@ -1008,6 +1008,7 @@ operand (expressionS *expressionP, enum expr_mode mode) /* '~' is permitted to start a label on the Delta. */ if (is_name_beginner (c)) goto isname; + /* Fall through. */ case '!': case '-': case '+': |