| Commit message (Expand) | Author | Age | Files | Lines |
* | RISC-V: Support ELF attribute for gas and readelf. | Jim Wilson | 2019-01-16 | 2 | -0/+133 |
* | S12Z: gas: Fix bug when a symbol name was the single letter 'c'. | John Darrington | 2019-01-16 | 1 | -2/+3 |
* | S12Z: gas: Permit "extend" instructions which don't actually extend. | John Darrington | 2019-01-16 | 1 | -10/+5 |
* | S12Z: Emit RELOC_S12Z_OPR instead of RELOC_EXT24 where appropriate. | John Darrington | 2019-01-16 | 1 | -6/+12 |
* | Implement the assembly instructions yield, wfe, wfi and sev for ARMv6T2 in bo... | Srinath Parvathaneni | 2019-01-14 | 1 | -2/+5 |
* | [AArch64][gas] Add -mcpu support for Arm Ares | Kyrylo Tkachov | 2019-01-08 | 1 | -0/+5 |
* | [arm][gas] Add -mcpu support for Arm Ares | Kyrylo Tkachov | 2019-01-07 | 1 | -0/+3 |
* | RX: gas - Add RXv3 instruction support. | Yoshinori Sato | 2019-01-05 | 3 | -50/+338 |
* | Update year range in copyright notice of binutils files | Alan Modra | 2019-01-01 | 234 | -234/+234 |
* | x86: Properly handle PLT expression in directive | H.J. Lu | 2018-12-19 | 1 | -3/+14 |
* | elf: Add PT_GNU_PROPERTY segment type | H.J. Lu | 2018-12-14 | 1 | -1/+0 |
* | Move aarch64 CIE code to aarch64 backend | Sam Tebbs | 2018-12-13 | 1 | -0/+37 |
* | RISC-V: Don't segfault for two regs in auipc or lui. | Jim Wilson | 2018-12-10 | 1 | -1/+8 |
* | x86: Put back BFD_RELOC_X86_64_GOTPCREL | H.J. Lu | 2018-12-09 | 1 | -0/+1 |
* | RISC-V: Fix 4-arg add parsing. | Jim Wilson | 2018-12-07 | 1 | -3/+12 |
* | PowerPC @l, @h and @ha warnings, plus VLE e_li | Alan Modra | 2018-12-06 | 1 | -33/+55 |
* | opcodes/riscv: Hide '.L0 ' fake symbols | Andrew Burgess | 2018-12-06 | 1 | -2/+2 |
* | [aarch64] Add support for pointer authentication B key | Sam Tebbs | 2018-12-05 | 1 | -0/+9 |
* | RISC-V: Accept version, supervisor ext and more than one NSE for -march. | Jim Wilson | 2018-12-03 | 1 | -140/+23 |
* | PR23938, should not free memory alloced in obstack by free() | Alan Modra | 2018-12-01 | 3 | -3/+3 |
* | GAS/MIPS: Add `-mfix-r5900' option for the R5900 short loop erratum | Fredrik Noring | 2018-11-30 | 1 | -1/+24 |
* | RISC-V: Add .insn CA support. | Jim Wilson | 2018-11-27 | 1 | -0/+31 |
* | Tighten the constraints for warning about NOPs for the MSP 430 ISA, so NOPs a... | Jozef Lawrynowicz | 2018-11-27 | 1 | -61/+235 |
* | S12Z: Add alias instructions BHS and BLO. | John Darrington | 2018-11-21 | 1 | -0/+2 |
* | [ARM] Improve indentation of ARM architecture declarations | Thomas Preud'homme | 2018-11-13 | 1 | -51/+51 |
* | [BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging Extension | Sudakshina Das | 2018-11-12 | 1 | -3/+17 |
* | [BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten... | Sudakshina Das | 2018-11-12 | 1 | -0/+6 |
* | [BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex... | Sudakshina Das | 2018-11-12 | 1 | -0/+2 |
* | [BINUTILS, AARCH64, 1/8] Add support for Memory Tagging Extension for ARMv8.5-A | Sudakshina Das | 2018-11-12 | 1 | -0/+2 |
* | S/390: Fix optional operand handling after memory addresses | Andreas Krebbel | 2018-11-09 | 1 | -24/+23 |
* | PowerPC, don't use bfd reloc howto in md_assemble | Alan Modra | 2018-11-09 | 1 | -11/+249 |
* | rx: Add target rx-*-linux. | Yoshinori Sato | 2018-11-07 | 1 | -0/+4 |
* | [arm] Check for neon and condition in vcvt.f16.f32 | Matthew Malcomson | 2018-11-06 | 1 | -0/+2 |
* | PowerPC instruction mask checks | Alan Modra | 2018-11-06 | 1 | -14/+23 |
* | PowerPC instruction operand flag validation | Alan Modra | 2018-11-06 | 1 | -0/+9 |
* | x86: adjust {,E}VEX.W handling outside of 64-bit mode | Jan Beulich | 2018-11-06 | 1 | -2/+2 |
* | x86: Disable GOT relaxation with data prefix | H.J. Lu | 2018-11-05 | 1 | -6/+7 |
* | Move struc-symbol.h to symbols.c | Alan Modra | 2018-10-29 | 20 | -116/+75 |
* | PR23837, Segmentation fault in resolve_symbol_value | Alan Modra | 2018-10-28 | 1 | -2/+1 |
* | S/390: Support vector alignment hints | Andreas Krebbel | 2018-10-23 | 1 | -0/+15 |
* | S12Z: Handle 16 bit fixups which are constant. | John Darrington | 2018-10-23 | 1 | -0/+3 |
* | Apply alpha BFD_RELOC_8 fixups | Alan Modra | 2018-10-22 | 1 | -0/+6 |
* | PR23800, .eqv doesn't always defer expression evaluation | Alan Modra | 2018-10-20 | 1 | -1/+16 |
* | This set of changes clarifies the conditions for the R5900 short loop fix and... | Fredrik Noring | 2018-10-19 | 1 | -5/+17 |
* | x86: fold Size{16,32,64} template attributes | Jan Beulich | 2018-10-10 | 1 | -6/+6 |
* | [PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRS | Sudakshina Das | 2018-10-09 | 1 | -0/+2 |
* | [PATCH, BINUTILS, AARCH64, 7/9] Add BTI instruction | Sudakshina Das | 2018-10-09 | 1 | -0/+52 |
* | [PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructions | Sudakshina Das | 2018-10-09 | 1 | -0/+2 |
* | [PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructions | Sudakshina Das | 2018-10-09 | 1 | -0/+17 |
* | [PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB for ARMv8.5-A | Sudakshina Das | 2018-10-09 | 1 | -0/+2 |