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* x86: drop redundant SYSCALL/SYSRET templatesJan Beulich2019-11-143-26/+5
* x86: fold individual Jump* attributes into a single Jump oneJan Beulich2019-11-145-14858/+10948
* x86: make JumpAbsolute an insn attributeJan Beulich2019-11-146-26480/+26486
* x86: make AnySize an insn attributeJan Beulich2019-11-145-14486/+14499
* RISC-V: Support the INSN_CLASS.*F.* classes for .insn directive.Jim Wilson2019-11-122-60/+66
* [binutils][arm] Update the decoding of MVE VMOV, VMVNMihail Ionescu2019-11-122-6/+18
* x86: fold EsSeg into IsStringJan Beulich2019-11-126-11272/+11287
* x86: eliminate ImmExt abuseJan Beulich2019-11-126-93/+197
* x86: introduce operand type "instance"Jan Beulich2019-11-127-14199/+14252
* Arm64: SVE2's smaxp/sminp require operands 1 and 3 to be the same registerJan Beulich2019-11-112-2/+7
* Arm64: fix build with old glibcJan Beulich2019-11-112-10/+12
* i386: Only check suffix in instruction mnemonicH.J. Lu2019-11-083-4/+10
* x86: convert RegMask and RegBND from bitfield to enumeratorJan Beulich2019-11-087-14560/+14574
* x86: convert RegSIMD and RegMMX from bitfield to enumeratorJan Beulich2019-11-087-19174/+19187
* x86: convert Control/Debug/Test from bitfield to enumeratorJan Beulich2019-11-087-14001/+14015
* x86: convert SReg from bitfield to enumeratorJan Beulich2019-11-087-13810/+13823
* x86: introduce operand type "class"Jan Beulich2019-11-086-105/+165
* [gas][aarch64] Add the v8.6 Data Gathering Hint mnemonic [10/X]Matthew Malcomson2019-11-073-49/+61
* [Patch][binutils][arm] Armv8.6-A Matrix Multiply extension [9/10]Matthew Malcomson2019-11-072-0/+19
* [binutils][aarch64] Matrix Multiply extension enablement [8/X]Matthew Malcomson2019-11-076-462/+877
* [binutils][arm] BFloat16 enablement [4/X]Matthew Malcomson2019-11-072-5/+42
* [Patch][binutils][arm] Create a new generic coprocessor array [3/10]Matthew Malcomson2019-11-072-51/+98
* [binutils][aarch64] Bfloat16 enablement [2/X]Matthew Malcomson2019-11-076-68/+373
* [gas][aarch64] Armv8.6-a option [1/X]Matthew Malcomson2019-11-072-0/+8
* x86: support further AMD Zen2 instructionsJan Beulich2019-11-077-4080/+4160
* x86: adjust register names printed for MONITOR/MWAITJan Beulich2019-11-072-16/+20
* x86/Intel: drop IgnoreSize from operand-less MOVSD/CMPSD againJan Beulich2019-11-073-4/+11
* x86: fold OP_Mwaitx() into OP_Mwait()Jan Beulich2019-11-052-24/+11
* x86: split MONITORX/MWAITX entriesJan Beulich2019-11-052-2/+21
* x86: consolidate disassembler enum naming a littleJan Beulich2019-11-052-75/+130
* Fix potential array overruns when disassembling corrupt v850 binaries.Nick Clifton2019-11-042-60/+129
* Modify the ARNM assembler to accept the omission of the immediate argument fo...Delia Burduv2019-10-304-3/+15
* x86: re-do "shorthand" handlingJan Beulich2019-10-304-219/+214
* x86: slightly rearrange struct insn_templateJan Beulich2019-10-304-3918/+3925
* x86: drop stray WJan Beulich2019-10-305-19/+54
* Fix array overrun when disassembling corrupt TIC30 binaries.Nick Clifton2019-10-292-1/+5
* Fix a potential illegal array access in the D30V disassembler.Nick Clifton2019-10-292-1/+9
* Prevent a left shift by a negative value when disassembling IA64 binaries.Nick Clifton2019-10-292-3/+11
* Fix array overruns in the S12Z disassembler.Nick Clifton2019-10-293-16/+56
* Fix potentially illegal shift and assign operation in CSKY disassembler.Nick Clifton2019-10-282-2/+7
* Fix buffer overrun in TIC30 disassembler.Nick Clifton2019-10-282-7/+27
* Stop potential illegal memory access in the NS32K disassembler.Nick Clifton2019-10-282-1/+17
* Prevent an illegal memory access in the xgate disassembler.Nick Clifton2019-10-282-3/+8
* Fix potential undefined behaviour in the RX disassembler.Nick Clifton2019-10-252-1/+6
* Fix typo in RX disassembler error messages.Nick Clifton2019-10-232-10/+19
* Prevent more potential illegal memory accesses in the RX disassembler.Nick Clifton2019-10-222-16/+41
* Fix potential illegal memory access when disassembling corrupt RX binaries.Nick Clifton2019-10-162-15/+92
* Fix the disassembly of the LDS and STS instructions of the AVR architecture.Nick Clifton2019-10-092-0/+8
* S/390: Add support for z15 as CPU name.Andreas Krebbel2019-10-081-1/+2
* x86/Intel: correct MOVSD and CMPSD handlingJan Beulich2019-10-073-12/+18