aboutsummaryrefslogtreecommitdiff
blob: fee9268511a90c1d7a6bdd59f7ec78932bb1f23f (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
@c Copyright (C) 2001-2017 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@page
@node PDP-11-Dependent
@chapter PDP-11 Dependent Features
@end ifset
@ifclear GENERIC
@node Machine Dependencies
@chapter PDP-11 Dependent Features
@end ifclear

@cindex PDP-11 support

@menu
* PDP-11-Options::		Options
* PDP-11-Pseudos::		Assembler Directives
* PDP-11-Syntax::		DEC Syntax versus BSD Syntax
* PDP-11-Mnemonics::		Instruction Naming
* PDP-11-Synthetic::		Synthetic Instructions
@end menu

@node PDP-11-Options
@section Options

@cindex options for PDP-11

The PDP-11 version of @code{@value{AS}} has a rich set of machine
dependent options.

@subsection Code Generation Options

@table @code
@cindex -mpic
@cindex -mno-pic
@item -mpic | -mno-pic
Generate position-independent (or position-dependent) code.

The default is to generate position-independent code.
@end table

@subsection Instruction Set Extension Options

These options enables or disables the use of extensions over the base
line instruction set as introduced by the first PDP-11 CPU: the KA11.
Most options come in two variants: a @code{-m}@var{extension} that
enables @var{extension}, and a @code{-mno-}@var{extension} that disables
@var{extension}.

The default is to enable all extensions.

@table @code
@cindex -mall
@cindex -mall-extensions
@item -mall | -mall-extensions
Enable all instruction set extensions.

@cindex -mno-extensions
@item -mno-extensions
Disable all instruction set extensions.

@cindex -mcis
@cindex -mno-cis
@item -mcis | -mno-cis
Enable (or disable) the use of the commercial instruction set, which
consists of these instructions: @code{ADDNI}, @code{ADDN}, @code{ADDPI},
@code{ADDP}, @code{ASHNI}, @code{ASHN}, @code{ASHPI}, @code{ASHP},
@code{CMPCI}, @code{CMPC}, @code{CMPNI}, @code{CMPN}, @code{CMPPI},
@code{CMPP}, @code{CVTLNI}, @code{CVTLN}, @code{CVTLPI}, @code{CVTLP},
@code{CVTNLI}, @code{CVTNL}, @code{CVTNPI}, @code{CVTNP}, @code{CVTPLI},
@code{CVTPL}, @code{CVTPNI}, @code{CVTPN}, @code{DIVPI}, @code{DIVP},
@code{L2DR}, @code{L3DR}, @code{LOCCI}, @code{LOCC}, @code{MATCI},
@code{MATC}, @code{MOVCI}, @code{MOVC}, @code{MOVRCI}, @code{MOVRC},
@code{MOVTCI}, @code{MOVTC}, @code{MULPI}, @code{MULP}, @code{SCANCI},
@code{SCANC}, @code{SKPCI}, @code{SKPC}, @code{SPANCI}, @code{SPANC},
@code{SUBNI}, @code{SUBN}, @code{SUBPI}, and @code{SUBP}.

@cindex -mcsm
@cindex -mno-csm
@item -mcsm | -mno-csm
Enable (or disable) the use of the @code{CSM} instruction.

@cindex -meis
@cindex -mno-eis
@item -meis | -mno-eis
Enable (or disable) the use of the extended instruction set, which
consists of these instructions: @code{ASHC}, @code{ASH}, @code{DIV},
@code{MARK}, @code{MUL}, @code{RTT}, @code{SOB} @code{SXT}, and
@code{XOR}.

@cindex -mfis
@cindex -mno-fis
@cindex -mkev11
@cindex -mkev11
@cindex -mno-kev11
@item -mfis | -mkev11
@itemx -mno-fis | -mno-kev11
Enable (or disable) the use of the KEV11 floating-point instructions:
@code{FADD}, @code{FDIV}, @code{FMUL}, and @code{FSUB}.

@cindex -mfpp
@cindex -mno-fpp
@cindex -mfpu
@cindex -mno-fpu
@cindex -mfp-11
@cindex -mno-fp-11
@item -mfpp | -mfpu | -mfp-11
@itemx -mno-fpp | -mno-fpu | -mno-fp-11
Enable (or disable) the use of FP-11 floating-point instructions:
@code{ABSF}, @code{ADDF}, @code{CFCC}, @code{CLRF}, @code{CMPF},
@code{DIVF}, @code{LDCFF}, @code{LDCIF}, @code{LDEXP}, @code{LDF},
@code{LDFPS}, @code{MODF}, @code{MULF}, @code{NEGF}, @code{SETD},
@code{SETF}, @code{SETI}, @code{SETL}, @code{STCFF}, @code{STCFI},
@code{STEXP}, @code{STF}, @code{STFPS}, @code{STST}, @code{SUBF}, and
@code{TSTF}.

@cindex -mlimited-eis
@cindex -mno-limited-eis
@item -mlimited-eis | -mno-limited-eis
Enable (or disable) the use of the limited extended instruction set:
@code{MARK}, @code{RTT}, @code{SOB}, @code{SXT}, and @code{XOR}.

The -mno-limited-eis options also implies -mno-eis.

@cindex -mmfpt
@cindex -mno-mfpt
@item -mmfpt | -mno-mfpt
Enable (or disable) the use of the @code{MFPT} instruction.

@cindex -mmutiproc
@cindex -mno-mutiproc
@item -mmultiproc | -mno-multiproc
Enable (or disable) the use of multiprocessor instructions: @code{TSTSET} and
@code{WRTLCK}.

@cindex -mmxps
@cindex -mno-mxps
@item -mmxps | -mno-mxps
Enable (or disable) the use of the @code{MFPS} and @code{MTPS} instructions.

@cindex -mspl
@cindex -mno-spl
@item -mspl | -mno-spl
Enable (or disable) the use of the @code{SPL} instruction.

@cindex -mmicrocode
@cindex -mno-microcode
Enable (or disable) the use of the microcode instructions: @code{LDUB},
@code{MED}, and @code{XFC}.
@end table

@subsection CPU Model Options

These options enable the instruction set extensions supported by a
particular CPU, and disables all other extensions.

@table @code
@cindex -mka11
@item -mka11
KA11 CPU.  Base line instruction set only.

@cindex -mkb11
@item -mkb11
KB11 CPU.  Enable extended instruction set and @code{SPL}.

@cindex -mkd11a
@item -mkd11a
KD11-A CPU.  Enable limited extended instruction set.

@cindex -mkd11b
@item -mkd11b
KD11-B CPU.  Base line instruction set only.

@cindex -mkd11d
@item -mkd11d
KD11-D CPU.  Base line instruction set only.

@cindex -mkd11e
@item -mkd11e
KD11-E CPU.  Enable extended instruction set, @code{MFPS}, and @code{MTPS}.

@cindex -mkd11f
@cindex -mkd11h
@cindex -mkd11q
@item -mkd11f | -mkd11h | -mkd11q
KD11-F, KD11-H, or KD11-Q CPU.  Enable limited extended instruction set,
@code{MFPS}, and @code{MTPS}.

@cindex -mkd11k
@item -mkd11k
KD11-K CPU.  Enable extended instruction set, @code{LDUB}, @code{MED},
@code{MFPS}, @code{MFPT}, @code{MTPS}, and @code{XFC}.

@cindex -mkd11z
@item -mkd11z
KD11-Z CPU.  Enable extended instruction set, @code{CSM}, @code{MFPS},
@code{MFPT}, @code{MTPS}, and @code{SPL}.

@cindex -mf11
@item -mf11
F11 CPU.  Enable extended instruction set, @code{MFPS}, @code{MFPT}, and
@code{MTPS}.

@cindex -mj11
@item -mj11
J11 CPU.  Enable extended instruction set, @code{CSM}, @code{MFPS},
@code{MFPT}, @code{MTPS}, @code{SPL}, @code{TSTSET}, and @code{WRTLCK}.

@cindex -mt11
@item -mt11
T11 CPU.  Enable limited extended instruction set, @code{MFPS}, and
@code{MTPS}.
@end table

@subsection Machine Model Options

These options enable the instruction set extensions supported by a
particular machine model, and disables all other extensions.

@table @code
@cindex -m11/03
@item -m11/03
Same as @code{-mkd11f}.

@cindex -m11/04
@item -m11/04
Same as @code{-mkd11d}.

@cindex -m11/05
@cindex -m11/10
@item -m11/05 | -m11/10
Same as @code{-mkd11b}.

@cindex -m11/15
@cindex -m11/20
@item -m11/15 | -m11/20
Same as @code{-mka11}.

@cindex -m11/21
@item -m11/21
Same as @code{-mt11}.

@cindex -m11/23
@cindex -m11/24
@item -m11/23 | -m11/24
Same as @code{-mf11}.

@cindex -m11/34
@item -m11/34
Same as @code{-mkd11e}.

@cindex -m11/34a
@item -m11/34a
Ame as @code{-mkd11e} @code{-mfpp}.

@cindex -m11/35
@cindex -m11/40
@item -m11/35 | -m11/40
Same as @code{-mkd11a}.

@cindex -m11/44
@item -m11/44
Same as @code{-mkd11z}.

@cindex -m11/45
@cindex -m11/50
@cindex -m11/55
@cindex -m11/70
@item -m11/45 | -m11/50 | -m11/55 | -m11/70
Same as @code{-mkb11}.

@cindex -m11/53
@cindex -m11/73
@cindex -m11/83
@cindex -m11/84
@cindex -m11/93
@cindex -m11/94
@item -m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94
Same as @code{-mj11}.

@cindex -m11/60
@item -m11/60
Same as @code{-mkd11k}.
@end table

@node PDP-11-Pseudos
@section Assembler Directives

The PDP-11 version of @code{@value{AS}} has a few machine
dependent assembler directives.

@table @code
@item .bss
Switch to the @code{bss} section.

@item .even
Align the location counter to an even number.
@end table

@node PDP-11-Syntax
@section PDP-11 Assembly Language Syntax

@cindex PDP-11 syntax

@cindex DEC syntax
@cindex BSD syntax
@code{@value{AS}} supports both DEC syntax and BSD syntax.  The only
difference is that in DEC syntax, a @code{#} character is used to denote
an immediate constants, while in BSD syntax the character for this
purpose is @code{$}.

@cindex PDP-11 general-purpose register syntax
general-purpose registers are named @code{r0} through @code{r7}.
Mnemonic alternatives for @code{r6} and @code{r7} are @code{sp} and
@code{pc}, respectively.

@cindex PDP-11 floating-point register syntax
Floating-point registers are named @code{ac0} through @code{ac3}, or
alternatively @code{fr0} through @code{fr3}.

@cindex PDP-11 comments
Comments are started with a @code{#} or a @code{/} character, and extend
to the end of the line.  (FIXME: clash with immediates?)

@cindex PDP-11 line separator
Multiple statements on the same line can be separated by the @samp{;} character.

@node PDP-11-Mnemonics
@section Instruction Naming

@cindex PDP-11 instruction naming

Some instructions have alternative names.

@table @code
@item BCC
@code{BHIS}

@item BCS
@code{BLO}

@item L2DR
@code{L2D}

@item L3DR
@code{L3D}

@item SYS
@code{TRAP}
@end table

@node PDP-11-Synthetic
@section Synthetic Instructions

The @code{JBR} and @code{J}@var{CC} synthetic instructions are not
supported yet.