linux kernel 4.11.64.11-8

2 files changed, 492 insertions, 0 deletions

diff --git a/0000_README b/0000_README
index 12a51296..97abba66 100644
--- a/0000_README
+++ b/0000_README
@@ -63,6 +63,10 @@ Patch:  1004_linux-4.11.5.patch
 From:   http://www.kernel.org
 Desc:   Linux 4.11.5
 
+Patch:  1005_linux-4.11.6.patch
+From:   http://www.kernel.org
+Desc:   Linux 4.11.6
+
 Patch:  1500_XATTR_USER_PREFIX.patch
 From:   https://bugs.gentoo.org/show_bug.cgi?id=470644
 Desc:   Support for namespace user.pax.* on tmpfs.
diff --git a/1005_linux-4.11.6.patch b/1005_linux-4.11.6.patch
new file mode 100644
index 00000000..17426576
--- /dev/null
+++ b/1005_linux-4.11.6.patch
@@ -0,0 +1,488 @@
+diff --git a/Makefile b/Makefile
+index 5b3a81d3262e..e46e99cbe5d1 100644
+--- a/Makefile
++++ b/Makefile
+@@ -1,6 +1,6 @@
+ VERSION = 4
+ PATCHLEVEL = 11
+-SUBLEVEL = 5
++SUBLEVEL = 6
+ EXTRAVERSION =
+ NAME = Fearless Coyote
+ 
+diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
+index f3920d684b0e..61d945297449 100644
+--- a/arch/s390/kernel/entry.S
++++ b/arch/s390/kernel/entry.S
+@@ -233,12 +233,17 @@ ENTRY(sie64a)
+ 	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
+ .Lsie_done:
+ # some program checks are suppressing. C code (e.g. do_protection_exception)
+-# will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other
+-# instructions between sie64a and .Lsie_done should not cause program
+-# interrupts. So lets use a nop (47 00 00 00) as a landing pad.
++# will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
++# are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
++# Other instructions between sie64a and .Lsie_done should not cause program
++# interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
+ # See also .Lcleanup_sie
+-.Lrewind_pad:
+-	nop	0
++.Lrewind_pad6:
++	nopr	7
++.Lrewind_pad4:
++	nopr	7
++.Lrewind_pad2:
++	nopr	7
+ 	.globl sie_exit
+ sie_exit:
+ 	lg	%r14,__SF_EMPTY+8(%r15)		# load guest register save area
+@@ -251,7 +256,9 @@ sie_exit:
+ 	stg	%r14,__SF_EMPTY+16(%r15)	# set exit reason code
+ 	j	sie_exit
+ 
+-	EX_TABLE(.Lrewind_pad,.Lsie_fault)
++	EX_TABLE(.Lrewind_pad6,.Lsie_fault)
++	EX_TABLE(.Lrewind_pad4,.Lsie_fault)
++	EX_TABLE(.Lrewind_pad2,.Lsie_fault)
+ 	EX_TABLE(sie_exit,.Lsie_fault)
+ EXPORT_SYMBOL(sie64a)
+ EXPORT_SYMBOL(sie_exit)
+diff --git a/arch/x86/platform/efi/efi-bgrt.c b/arch/x86/platform/efi/efi-bgrt.c
+index 8bf27323f7a3..b58233e4ed71 100644
+--- a/arch/x86/platform/efi/efi-bgrt.c
++++ b/arch/x86/platform/efi/efi-bgrt.c
+@@ -27,6 +27,26 @@ struct bmp_header {
+ 	u32 size;
+ } __packed;
+ 
++static bool efi_bgrt_addr_valid(u64 addr)
++{
++	efi_memory_desc_t *md;
++
++	for_each_efi_memory_desc(md) {
++		u64 size;
++		u64 end;
++
++		if (md->type != EFI_BOOT_SERVICES_DATA)
++			continue;
++
++		size = md->num_pages << EFI_PAGE_SHIFT;
++		end = md->phys_addr + size;
++		if (addr >= md->phys_addr && addr < end)
++			return true;
++	}
++
++	return false;
++}
++
+ void __init efi_bgrt_init(struct acpi_table_header *table)
+ {
+ 	void *image;
+@@ -36,7 +56,7 @@ void __init efi_bgrt_init(struct acpi_table_header *table)
+ 	if (acpi_disabled)
+ 		return;
+ 
+-	if (!efi_enabled(EFI_BOOT))
++	if (!efi_enabled(EFI_MEMMAP))
+ 		return;
+ 
+ 	if (table->length < sizeof(bgrt_tab)) {
+@@ -65,6 +85,10 @@ void __init efi_bgrt_init(struct acpi_table_header *table)
+ 		goto out;
+ 	}
+ 
++	if (!efi_bgrt_addr_valid(bgrt->image_address)) {
++		pr_notice("Ignoring BGRT: invalid image address\n");
++		goto out;
++	}
+ 	image = early_memremap(bgrt->image_address, sizeof(bmp_header));
+ 	if (!image) {
+ 		pr_notice("Ignoring BGRT: failed to map image header memory\n");
+diff --git a/arch/xtensa/include/asm/irq.h b/arch/xtensa/include/asm/irq.h
+index f71f88ea7646..19707db966f1 100644
+--- a/arch/xtensa/include/asm/irq.h
++++ b/arch/xtensa/include/asm/irq.h
+@@ -29,7 +29,8 @@ static inline void variant_irq_disable(unsigned int irq) { }
+ # define PLATFORM_NR_IRQS 0
+ #endif
+ #define XTENSA_NR_IRQS XCHAL_NUM_INTERRUPTS
+-#define NR_IRQS (XTENSA_NR_IRQS + VARIANT_NR_IRQS + PLATFORM_NR_IRQS)
++#define NR_IRQS (XTENSA_NR_IRQS + VARIANT_NR_IRQS + PLATFORM_NR_IRQS + 1)
++#define XTENSA_PIC_LINUX_IRQ(hwirq) ((hwirq) + 1)
+ 
+ #if VARIANT_NR_IRQS == 0
+ static inline void variant_init_irq(void) { }
+diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c
+index a265edd6ac37..99341028cc77 100644
+--- a/arch/xtensa/kernel/irq.c
++++ b/arch/xtensa/kernel/irq.c
+@@ -34,11 +34,6 @@ asmlinkage void do_IRQ(int hwirq, struct pt_regs *regs)
+ {
+ 	int irq = irq_find_mapping(NULL, hwirq);
+ 
+-	if (hwirq >= NR_IRQS) {
+-		printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
+-				__func__, hwirq);
+-	}
+-
+ #ifdef CONFIG_DEBUG_STACKOVERFLOW
+ 	/* Debugging check for stack overflow: is there less than 1KB free? */
+ 	{
+diff --git a/arch/xtensa/platforms/xtfpga/include/platform/hardware.h b/arch/xtensa/platforms/xtfpga/include/platform/hardware.h
+index dbeea2b440a1..1fda7e20dfcb 100644
+--- a/arch/xtensa/platforms/xtfpga/include/platform/hardware.h
++++ b/arch/xtensa/platforms/xtfpga/include/platform/hardware.h
+@@ -24,16 +24,18 @@
+ 
+ /* Interrupt configuration. */
+ 
+-#define PLATFORM_NR_IRQS	10
++#define PLATFORM_NR_IRQS	0
+ 
+ /* Default assignment of LX60 devices to external interrupts. */
+ 
+ #ifdef CONFIG_XTENSA_MX
+ #define DUART16552_INTNUM	XCHAL_EXTINT3_NUM
+ #define OETH_IRQ		XCHAL_EXTINT4_NUM
++#define C67X00_IRQ		XCHAL_EXTINT8_NUM
+ #else
+ #define DUART16552_INTNUM	XCHAL_EXTINT0_NUM
+ #define OETH_IRQ		XCHAL_EXTINT1_NUM
++#define C67X00_IRQ		XCHAL_EXTINT5_NUM
+ #endif
+ 
+ /*
+@@ -63,5 +65,5 @@
+ 
+ #define C67X00_PADDR		(XCHAL_KIO_PADDR + 0x0D0D0000)
+ #define C67X00_SIZE		0x10
+-#define C67X00_IRQ		5
++
+ #endif /* __XTENSA_XTAVNET_HARDWARE_H */
+diff --git a/arch/xtensa/platforms/xtfpga/setup.c b/arch/xtensa/platforms/xtfpga/setup.c
+index 779be723eb2b..42285f35d313 100644
+--- a/arch/xtensa/platforms/xtfpga/setup.c
++++ b/arch/xtensa/platforms/xtfpga/setup.c
+@@ -175,8 +175,8 @@ static struct resource ethoc_res[] = {
+ 		.flags = IORESOURCE_MEM,
+ 	},
+ 	[2] = { /* IRQ number */
+-		.start = OETH_IRQ,
+-		.end   = OETH_IRQ,
++		.start = XTENSA_PIC_LINUX_IRQ(OETH_IRQ),
++		.end   = XTENSA_PIC_LINUX_IRQ(OETH_IRQ),
+ 		.flags = IORESOURCE_IRQ,
+ 	},
+ };
+@@ -213,8 +213,8 @@ static struct resource c67x00_res[] = {
+ 		.flags = IORESOURCE_MEM,
+ 	},
+ 	[1] = { /* IRQ number */
+-		.start = C67X00_IRQ,
+-		.end   = C67X00_IRQ,
++		.start = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ),
++		.end   = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ),
+ 		.flags = IORESOURCE_IRQ,
+ 	},
+ };
+@@ -247,7 +247,7 @@ static struct resource serial_resource = {
+ static struct plat_serial8250_port serial_platform_data[] = {
+ 	[0] = {
+ 		.mapbase	= DUART16552_PADDR,
+-		.irq		= DUART16552_INTNUM,
++		.irq		= XTENSA_PIC_LINUX_IRQ(DUART16552_INTNUM),
+ 		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
+ 				  UPF_IOREMAP,
+ 		.iotype		= XCHAL_HAVE_BE ? UPIO_MEM32BE : UPIO_MEM32,
+diff --git a/block/partitions/msdos.c b/block/partitions/msdos.c
+index 93e7c1b32edd..5610cd537da7 100644
+--- a/block/partitions/msdos.c
++++ b/block/partitions/msdos.c
+@@ -300,6 +300,8 @@ static void parse_bsd(struct parsed_partitions *state,
+ 			continue;
+ 		bsd_start = le32_to_cpu(p->p_offset);
+ 		bsd_size = le32_to_cpu(p->p_size);
++		if (memcmp(flavour, "bsd\0", 4) == 0)
++			bsd_start += offset;
+ 		if (offset == bsd_start && size == bsd_size)
+ 			/* full parent partition, we have it already */
+ 			continue;
+diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
+index 66dbb3c4c6d8..edacd31ae1a1 100644
+--- a/drivers/gpu/drm/i915/i915_drv.c
++++ b/drivers/gpu/drm/i915/i915_drv.c
+@@ -1206,6 +1206,15 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
+ 		goto out_free_priv;
+ 
+ 	pci_set_drvdata(pdev, &dev_priv->drm);
++	/*
++	 * Disable the system suspend direct complete optimization, which can
++	 * leave the device suspended skipping the driver's suspend handlers
++	 * if the device was already runtime suspended. This is needed due to
++	 * the difference in our runtime and system suspend sequence and
++	 * becaue the HDA driver may require us to enable the audio power
++	 * domain during system suspend.
++	 */
++	pdev->dev_flags |= PCI_DEV_FLAGS_NEEDS_RESUME;
+ 
+ 	ret = i915_driver_init_early(dev_priv, ent);
+ 	if (ret < 0)
+@@ -1243,10 +1252,6 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
+ 
+ 	dev_priv->ipc_enabled = false;
+ 
+-	/* Everything is in place, we can now relax! */
+-	DRM_INFO("Initialized %s %d.%d.%d %s for %s on minor %d\n",
+-		 driver.name, driver.major, driver.minor, driver.patchlevel,
+-		 driver.date, pci_name(pdev), dev_priv->drm.primary->index);
+ 	if (IS_ENABLED(CONFIG_DRM_I915_DEBUG))
+ 		DRM_INFO("DRM_I915_DEBUG enabled\n");
+ 	if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
+diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
+index 96e45a4d5441..6eb83684b97b 100644
+--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
++++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
+@@ -755,10 +755,6 @@ static bool gen8_ppgtt_clear_pt(struct i915_address_space *vm,
+ 	GEM_BUG_ON(pte_end > GEN8_PTES);
+ 
+ 	bitmap_clear(pt->used_ptes, pte, num_entries);
+-	if (USES_FULL_PPGTT(vm->i915)) {
+-		if (bitmap_empty(pt->used_ptes, GEN8_PTES))
+-			return true;
+-	}
+ 
+ 	pt_vaddr = kmap_px(pt);
+ 
+@@ -798,9 +794,6 @@ static bool gen8_ppgtt_clear_pd(struct i915_address_space *vm,
+ 		}
+ 	}
+ 
+-	if (bitmap_empty(pd->used_pdes, I915_PDES))
+-		return true;
+-
+ 	return false;
+ }
+ 
+@@ -829,9 +822,6 @@ static bool gen8_ppgtt_clear_pdp(struct i915_address_space *vm,
+ 
+ 	mark_tlbs_dirty(ppgtt);
+ 
+-	if (bitmap_empty(pdp->used_pdpes, I915_PDPES_PER_PDP(dev_priv)))
+-		return true;
+-
+ 	return false;
+ }
+ 
+@@ -3292,7 +3282,8 @@ void i915_ggtt_enable_guc(struct drm_i915_private *i915)
+ 
+ void i915_ggtt_disable_guc(struct drm_i915_private *i915)
+ {
+-	i915->ggtt.invalidate = gen6_ggtt_invalidate;
++	if (i915->ggtt.invalidate == guc_ggtt_invalidate)
++		i915->ggtt.invalidate = gen6_ggtt_invalidate;
+ }
+ 
+ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
+diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
+index 9bbbd4e83e3c..9bfe9520e7a8 100644
+--- a/drivers/gpu/drm/i915/i915_pci.c
++++ b/drivers/gpu/drm/i915/i915_pci.c
+@@ -389,7 +389,6 @@ static const struct intel_device_info intel_skylake_gt3_info = {
+ 	.has_hw_contexts = 1, \
+ 	.has_logical_ring_contexts = 1, \
+ 	.has_guc = 1, \
+-	.has_decoupled_mmio = 1, \
+ 	.has_aliasing_ppgtt = 1, \
+ 	.has_full_ppgtt = 1, \
+ 	.has_full_48bit_ppgtt = 1, \
+diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
+index ed1f4f272b4f..5370dbec7a7d 100644
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -13808,6 +13808,15 @@ static void update_scanline_offset(struct intel_crtc *crtc)
+ 	 * type. For DP ports it behaves like most other platforms, but on HDMI
+ 	 * there's an extra 1 line difference. So we need to add two instead of
+ 	 * one to the value.
++	 *
++	 * On VLV/CHV DSI the scanline counter would appear to increment
++	 * approx. 1/3 of a scanline before start of vblank. Unfortunately
++	 * that means we can't tell whether we're in vblank or not while
++	 * we're on that particular line. We must still set scanline_offset
++	 * to 1 so that the vblank timestamps come out correct when we query
++	 * the scanline counter from within the vblank interrupt handler.
++	 * However if queried just before the start of vblank we'll get an
++	 * answer that's slightly in the future.
+ 	 */
+ 	if (IS_GEN2(dev_priv)) {
+ 		const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
+diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
+index 89fe5c8464df..96414399bed7 100644
+--- a/drivers/gpu/drm/i915/intel_fbc.c
++++ b/drivers/gpu/drm/i915/intel_fbc.c
+@@ -82,20 +82,10 @@ static unsigned int get_crtc_fence_y_offset(struct intel_crtc *crtc)
+ static void intel_fbc_get_plane_source_size(struct intel_fbc_state_cache *cache,
+ 					    int *width, int *height)
+ {
+-	int w, h;
+-
+-	if (drm_rotation_90_or_270(cache->plane.rotation)) {
+-		w = cache->plane.src_h;
+-		h = cache->plane.src_w;
+-	} else {
+-		w = cache->plane.src_w;
+-		h = cache->plane.src_h;
+-	}
+-
+ 	if (width)
+-		*width = w;
++		*width = cache->plane.src_w;
+ 	if (height)
+-		*height = h;
++		*height = cache->plane.src_h;
+ }
+ 
+ static int intel_fbc_calculate_cfb_size(struct drm_i915_private *dev_priv,
+@@ -747,6 +737,11 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
+ 			ilk_pipe_pixel_rate(crtc_state);
+ 
+ 	cache->plane.rotation = plane_state->base.rotation;
++	/*
++	 * Src coordinates are already rotated by 270 degrees for
++	 * the 90/270 degree plane rotation cases (to match the
++	 * GTT mapping), hence no need to account for rotation here.
++	 */
+ 	cache->plane.src_w = drm_rect_width(&plane_state->base.src) >> 16;
+ 	cache->plane.src_h = drm_rect_height(&plane_state->base.src) >> 16;
+ 	cache->plane.visible = plane_state->base.visible;
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index 6a29784d2b41..5132e0cdc684 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -4140,11 +4140,19 @@ skl_compute_wm(struct drm_atomic_state *state)
+ 	struct drm_crtc_state *cstate;
+ 	struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
+ 	struct skl_wm_values *results = &intel_state->wm_results;
++	struct drm_device *dev = state->dev;
+ 	struct skl_pipe_wm *pipe_wm;
+ 	bool changed = false;
+ 	int ret, i;
+ 
+ 	/*
++	 * When we distrust bios wm we always need to recompute to set the
++	 * expected DDB allocations for each CRTC.
++	 */
++	if (to_i915(dev)->wm.distrust_bios_wm)
++		changed = true;
++
++	/*
+ 	 * If this transaction isn't actually touching any CRTC's, don't
+ 	 * bother with watermark calculation.  Note that if we pass this
+ 	 * test, we're guaranteed to hold at least one CRTC state mutex,
+@@ -4154,6 +4162,7 @@ skl_compute_wm(struct drm_atomic_state *state)
+ 	 */
+ 	for_each_crtc_in_state(state, crtc, cstate, i)
+ 		changed = true;
++
+ 	if (!changed)
+ 		return 0;
+ 
+diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
+index 9481ca9a3ae7..59d792b127b9 100644
+--- a/drivers/gpu/drm/i915/intel_sprite.c
++++ b/drivers/gpu/drm/i915/intel_sprite.c
+@@ -81,10 +81,13 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
+  */
+ void intel_pipe_update_start(struct intel_crtc *crtc)
+ {
++	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ 	const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
+ 	long timeout = msecs_to_jiffies_timeout(1);
+ 	int scanline, min, max, vblank_start;
+ 	wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
++	bool need_vlv_dsi_wa = (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
++		intel_crtc_has_type(crtc->config, INTEL_OUTPUT_DSI);
+ 	DEFINE_WAIT(wait);
+ 
+ 	vblank_start = adjusted_mode->crtc_vblank_start;
+@@ -136,6 +139,24 @@ void intel_pipe_update_start(struct intel_crtc *crtc)
+ 
+ 	drm_crtc_vblank_put(&crtc->base);
+ 
++	/*
++	 * On VLV/CHV DSI the scanline counter would appear to
++	 * increment approx. 1/3 of a scanline before start of vblank.
++	 * The registers still get latched at start of vblank however.
++	 * This means we must not write any registers on the first
++	 * line of vblank (since not the whole line is actually in
++	 * vblank). And unfortunately we can't use the interrupt to
++	 * wait here since it will fire too soon. We could use the
++	 * frame start interrupt instead since it will fire after the
++	 * critical scanline, but that would require more changes
++	 * in the interrupt code. So for now we'll just do the nasty
++	 * thing and poll for the bad scanline to pass us by.
++	 *
++	 * FIXME figure out if BXT+ DSI suffers from this as well
++	 */
++	while (need_vlv_dsi_wa && scanline == vblank_start)
++		scanline = intel_get_crtc_scanline(crtc);
++
+ 	crtc->debug.scanline_start = scanline;
+ 	crtc->debug.start_vbl_time = ktime_get();
+ 	crtc->debug.start_vbl_count = intel_crtc_get_vblank_counter(crtc);
+diff --git a/drivers/irqchip/irq-xtensa-mx.c b/drivers/irqchip/irq-xtensa-mx.c
+index bb3ac5fe5846..72a391e01011 100644
+--- a/drivers/irqchip/irq-xtensa-mx.c
++++ b/drivers/irqchip/irq-xtensa-mx.c
+@@ -142,7 +142,7 @@ static struct irq_chip xtensa_mx_irq_chip = {
+ int __init xtensa_mx_init_legacy(struct device_node *interrupt_parent)
+ {
+ 	struct irq_domain *root_domain =
+-		irq_domain_add_legacy(NULL, NR_IRQS, 0, 0,
++		irq_domain_add_legacy(NULL, NR_IRQS - 1, 1, 0,
+ 				&xtensa_mx_irq_domain_ops,
+ 				&xtensa_mx_irq_chip);
+ 	irq_set_default_host(root_domain);
+diff --git a/drivers/irqchip/irq-xtensa-pic.c b/drivers/irqchip/irq-xtensa-pic.c
+index 472ae1770964..f728755fa292 100644
+--- a/drivers/irqchip/irq-xtensa-pic.c
++++ b/drivers/irqchip/irq-xtensa-pic.c
+@@ -89,7 +89,7 @@ static struct irq_chip xtensa_irq_chip = {
+ int __init xtensa_pic_init_legacy(struct device_node *interrupt_parent)
+ {
+ 	struct irq_domain *root_domain =
+-		irq_domain_add_legacy(NULL, NR_IRQS, 0, 0,
++		irq_domain_add_legacy(NULL, NR_IRQS - 1, 1, 0,
+ 				&xtensa_irq_domain_ops, &xtensa_irq_chip);
+ 	irq_set_default_host(root_domain);
+ 	return 0;
+diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
+index d35c0162f9f2..0f6f9a97a81c 100644
+--- a/drivers/pci/pci.c
++++ b/drivers/pci/pci.c
+@@ -2142,7 +2142,8 @@ bool pci_dev_keep_suspended(struct pci_dev *pci_dev)
+ 
+ 	if (!pm_runtime_suspended(dev)
+ 	    || pci_target_state(pci_dev) != pci_dev->current_state
+-	    || platform_pci_need_resume(pci_dev))
++	    || platform_pci_need_resume(pci_dev)
++	    || (pci_dev->dev_flags & PCI_DEV_FLAGS_NEEDS_RESUME))
+ 		return false;
+ 
+ 	/*
+diff --git a/include/linux/pci.h b/include/linux/pci.h
+index eb3da1a04e6c..b2d5580cd9e2 100644
+--- a/include/linux/pci.h
++++ b/include/linux/pci.h
+@@ -178,6 +178,11 @@ enum pci_dev_flags {
+ 	PCI_DEV_FLAGS_NO_PM_RESET = (__force pci_dev_flags_t) (1 << 7),
+ 	/* Get VPD from function 0 VPD */
+ 	PCI_DEV_FLAGS_VPD_REF_F0 = (__force pci_dev_flags_t) (1 << 8),
++	/*
++	 * Resume before calling the driver's system suspend hooks, disabling
++	 * the direct_complete optimization.
++	 */
++	PCI_DEV_FLAGS_NEEDS_RESUME = (__force pci_dev_flags_t) (1 << 11),
+ };
+ 
+ enum pci_irq_reroute_variant {