diff options
Diffstat (limited to '1020_linux-3.2.21.patch')
-rw-r--r-- | 1020_linux-3.2.21.patch | 2499 |
1 files changed, 2499 insertions, 0 deletions
diff --git a/1020_linux-3.2.21.patch b/1020_linux-3.2.21.patch new file mode 100644 index 00000000..6824be2e --- /dev/null +++ b/1020_linux-3.2.21.patch @@ -0,0 +1,2499 @@ +diff --git a/Makefile b/Makefile +index c7e9cc4..7eb465e 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,6 +1,6 @@ + VERSION = 3 + PATCHLEVEL = 2 +-SUBLEVEL = 20 ++SUBLEVEL = 21 + EXTRAVERSION = + NAME = Saber-toothed Squirrel + +diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c +index 89493ab..20ed2d5 100644 +--- a/arch/arm/mach-imx/hotplug.c ++++ b/arch/arm/mach-imx/hotplug.c +@@ -12,6 +12,7 @@ + + #include <linux/errno.h> + #include <asm/cacheflush.h> ++#include <asm/cp15.h> + #include <mach/common.h> + + int platform_cpu_kill(unsigned int cpu) +@@ -19,6 +20,44 @@ int platform_cpu_kill(unsigned int cpu) + return 1; + } + ++static inline void cpu_enter_lowpower(void) ++{ ++ unsigned int v; ++ ++ flush_cache_all(); ++ asm volatile( ++ "mcr p15, 0, %1, c7, c5, 0\n" ++ " mcr p15, 0, %1, c7, c10, 4\n" ++ /* ++ * Turn off coherency ++ */ ++ " mrc p15, 0, %0, c1, c0, 1\n" ++ " bic %0, %0, %3\n" ++ " mcr p15, 0, %0, c1, c0, 1\n" ++ " mrc p15, 0, %0, c1, c0, 0\n" ++ " bic %0, %0, %2\n" ++ " mcr p15, 0, %0, c1, c0, 0\n" ++ : "=&r" (v) ++ : "r" (0), "Ir" (CR_C), "Ir" (0x40) ++ : "cc"); ++} ++ ++static inline void cpu_leave_lowpower(void) ++{ ++ unsigned int v; ++ ++ asm volatile( ++ "mrc p15, 0, %0, c1, c0, 0\n" ++ " orr %0, %0, %1\n" ++ " mcr p15, 0, %0, c1, c0, 0\n" ++ " mrc p15, 0, %0, c1, c0, 1\n" ++ " orr %0, %0, %2\n" ++ " mcr p15, 0, %0, c1, c0, 1\n" ++ : "=&r" (v) ++ : "Ir" (CR_C), "Ir" (0x40) ++ : "cc"); ++} ++ + /* + * platform-specific code to shutdown a CPU + * +@@ -26,9 +65,10 @@ int platform_cpu_kill(unsigned int cpu) + */ + void platform_cpu_die(unsigned int cpu) + { +- flush_cache_all(); ++ cpu_enter_lowpower(); + imx_enable_cpu(cpu, false); + cpu_do_idle(); ++ cpu_leave_lowpower(); + + /* We should never return from idle */ + panic("cpu %d unexpectedly exit from shutdown\n", cpu); +diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c +index 25f8402..ad994b3 100644 +--- a/arch/arm/mach-imx/mach-mx21ads.c ++++ b/arch/arm/mach-imx/mach-mx21ads.c +@@ -32,7 +32,7 @@ + * Memory-mapped I/O on MX21ADS base board + */ + #define MX21ADS_MMIO_BASE_ADDR 0xf5000000 +-#define MX21ADS_MMIO_SIZE SZ_16M ++#define MX21ADS_MMIO_SIZE 0xc00000 + + #define MX21ADS_REG_ADDR(offset) (void __force __iomem *) \ + (MX21ADS_MMIO_BASE_ADDR + (offset)) +diff --git a/arch/arm/mach-mx5/crm_regs.h b/arch/arm/mach-mx5/crm_regs.h +index 5e11ba7..5e3f1f0 100644 +--- a/arch/arm/mach-mx5/crm_regs.h ++++ b/arch/arm/mach-mx5/crm_regs.h +@@ -23,7 +23,7 @@ + #define MX53_DPLL1_BASE MX53_IO_ADDRESS(MX53_PLL1_BASE_ADDR) + #define MX53_DPLL2_BASE MX53_IO_ADDRESS(MX53_PLL2_BASE_ADDR) + #define MX53_DPLL3_BASE MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR) +-#define MX53_DPLL4_BASE MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR) ++#define MX53_DPLL4_BASE MX53_IO_ADDRESS(MX53_PLL4_BASE_ADDR) + + /* PLL Register Offsets */ + #define MXC_PLL_DP_CTL 0x00 +diff --git a/arch/powerpc/kernel/module_32.c b/arch/powerpc/kernel/module_32.c +index 0b6d796..2e3200c 100644 +--- a/arch/powerpc/kernel/module_32.c ++++ b/arch/powerpc/kernel/module_32.c +@@ -176,8 +176,8 @@ int module_frob_arch_sections(Elf32_Ehdr *hdr, + + static inline int entry_matches(struct ppc_plt_entry *entry, Elf32_Addr val) + { +- if (entry->jump[0] == 0x3d600000 + ((val + 0x8000) >> 16) +- && entry->jump[1] == 0x396b0000 + (val & 0xffff)) ++ if (entry->jump[0] == 0x3d800000 + ((val + 0x8000) >> 16) ++ && entry->jump[1] == 0x398c0000 + (val & 0xffff)) + return 1; + return 0; + } +@@ -204,10 +204,9 @@ static uint32_t do_plt_call(void *location, + entry++; + } + +- /* Stolen from Paul Mackerras as well... */ +- entry->jump[0] = 0x3d600000+((val+0x8000)>>16); /* lis r11,sym@ha */ +- entry->jump[1] = 0x396b0000 + (val&0xffff); /* addi r11,r11,sym@l*/ +- entry->jump[2] = 0x7d6903a6; /* mtctr r11 */ ++ entry->jump[0] = 0x3d800000+((val+0x8000)>>16); /* lis r12,sym@ha */ ++ entry->jump[1] = 0x398c0000 + (val&0xffff); /* addi r12,r12,sym@l*/ ++ entry->jump[2] = 0x7d8903a6; /* mtctr r12 */ + entry->jump[3] = 0x4e800420; /* bctr */ + + DEBUGP("Initialized plt for 0x%x at %p\n", val, entry); +diff --git a/arch/x86/crypto/aesni-intel_asm.S b/arch/x86/crypto/aesni-intel_asm.S +index be6d9e3..3470624 100644 +--- a/arch/x86/crypto/aesni-intel_asm.S ++++ b/arch/x86/crypto/aesni-intel_asm.S +@@ -2460,10 +2460,12 @@ ENTRY(aesni_cbc_dec) + pxor IN3, STATE4 + movaps IN4, IV + #else +- pxor (INP), STATE2 +- pxor 0x10(INP), STATE3 + pxor IN1, STATE4 + movaps IN2, IV ++ movups (INP), IN1 ++ pxor IN1, STATE2 ++ movups 0x10(INP), IN2 ++ pxor IN2, STATE3 + #endif + movups STATE1, (OUTP) + movups STATE2, 0x10(OUTP) +diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h +index 1b82f7e..679229f 100644 +--- a/arch/x86/include/asm/uv/uv_bau.h ++++ b/arch/x86/include/asm/uv/uv_bau.h +@@ -149,7 +149,6 @@ + /* 4 bits of software ack period */ + #define UV2_ACK_MASK 0x7UL + #define UV2_ACK_UNITS_SHFT 3 +-#define UV2_LEG_SHFT UV2H_LB_BAU_MISC_CONTROL_USE_LEGACY_DESCRIPTOR_FORMATS_SHFT + #define UV2_EXT_SHFT UV2H_LB_BAU_MISC_CONTROL_ENABLE_EXTENDED_SB_STATUS_SHFT + + /* +diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c +index 0bab2b1..3524e1f 100644 +--- a/arch/x86/kernel/cpu/amd.c ++++ b/arch/x86/kernel/cpu/amd.c +@@ -571,6 +571,24 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) + } + } + ++ /* re-enable TopologyExtensions if switched off by BIOS */ ++ if ((c->x86 == 0x15) && ++ (c->x86_model >= 0x10) && (c->x86_model <= 0x1f) && ++ !cpu_has(c, X86_FEATURE_TOPOEXT)) { ++ u64 val; ++ ++ if (!rdmsrl_amd_safe(0xc0011005, &val)) { ++ val |= 1ULL << 54; ++ wrmsrl_amd_safe(0xc0011005, val); ++ rdmsrl(0xc0011005, val); ++ if (val & (1ULL << 54)) { ++ set_cpu_cap(c, X86_FEATURE_TOPOEXT); ++ printk(KERN_INFO FW_INFO "CPU: Re-enabling " ++ "disabled Topology Extensions Support\n"); ++ } ++ } ++ } ++ + cpu_detect_cache_sizes(c); + + /* Multi core CPU? */ +diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c +index f547421..445a61c 100644 +--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c ++++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c +@@ -52,6 +52,7 @@ struct threshold_block { + unsigned int cpu; + u32 address; + u16 interrupt_enable; ++ bool interrupt_capable; + u16 threshold_limit; + struct kobject kobj; + struct list_head miscj; +@@ -86,6 +87,21 @@ struct thresh_restart { + u16 old_limit; + }; + ++static bool lvt_interrupt_supported(unsigned int bank, u32 msr_high_bits) ++{ ++ /* ++ * bank 4 supports APIC LVT interrupts implicitly since forever. ++ */ ++ if (bank == 4) ++ return true; ++ ++ /* ++ * IntP: interrupt present; if this bit is set, the thresholding ++ * bank can generate APIC LVT interrupts ++ */ ++ return msr_high_bits & BIT(28); ++} ++ + static int lvt_off_valid(struct threshold_block *b, int apic, u32 lo, u32 hi) + { + int msr = (hi & MASK_LVTOFF_HI) >> 20; +@@ -107,8 +123,10 @@ static int lvt_off_valid(struct threshold_block *b, int apic, u32 lo, u32 hi) + return 1; + }; + +-/* must be called with correct cpu affinity */ +-/* Called via smp_call_function_single() */ ++/* ++ * Called via smp_call_function_single(), must be called with correct ++ * cpu affinity. ++ */ + static void threshold_restart_bank(void *_tr) + { + struct thresh_restart *tr = _tr; +@@ -131,6 +149,12 @@ static void threshold_restart_bank(void *_tr) + (new_count & THRESHOLD_MAX); + } + ++ /* clear IntType */ ++ hi &= ~MASK_INT_TYPE_HI; ++ ++ if (!tr->b->interrupt_capable) ++ goto done; ++ + if (tr->set_lvt_off) { + if (lvt_off_valid(tr->b, tr->lvt_off, lo, hi)) { + /* set new lvt offset */ +@@ -139,9 +163,10 @@ static void threshold_restart_bank(void *_tr) + } + } + +- tr->b->interrupt_enable ? +- (hi = (hi & ~MASK_INT_TYPE_HI) | INT_TYPE_APIC) : +- (hi &= ~MASK_INT_TYPE_HI); ++ if (tr->b->interrupt_enable) ++ hi |= INT_TYPE_APIC; ++ ++ done: + + hi |= MASK_COUNT_EN_HI; + wrmsr(tr->b->address, lo, hi); +@@ -206,14 +231,18 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c) + if (shared_bank[bank] && c->cpu_core_id) + break; + #endif +- offset = setup_APIC_mce(offset, +- (high & MASK_LVTOFF_HI) >> 20); + + memset(&b, 0, sizeof(b)); +- b.cpu = cpu; +- b.bank = bank; +- b.block = block; +- b.address = address; ++ b.cpu = cpu; ++ b.bank = bank; ++ b.block = block; ++ b.address = address; ++ b.interrupt_capable = lvt_interrupt_supported(bank, high); ++ ++ if (b.interrupt_capable) { ++ int new = (high & MASK_LVTOFF_HI) >> 20; ++ offset = setup_APIC_mce(offset, new); ++ } + + mce_threshold_block_init(&b, offset); + mce_threshold_vector = amd_threshold_interrupt; +@@ -313,6 +342,9 @@ store_interrupt_enable(struct threshold_block *b, const char *buf, size_t size) + struct thresh_restart tr; + unsigned long new; + ++ if (!b->interrupt_capable) ++ return -EINVAL; ++ + if (strict_strtoul(buf, 0, &new) < 0) + return -EINVAL; + +@@ -471,6 +503,7 @@ static __cpuinit int allocate_threshold_blocks(unsigned int cpu, + b->cpu = cpu; + b->address = address; + b->interrupt_enable = 0; ++ b->interrupt_capable = lvt_interrupt_supported(bank, high); + b->threshold_limit = THRESHOLD_MAX; + + INIT_LIST_HEAD(&b->miscj); +diff --git a/arch/x86/platform/uv/tlb_uv.c b/arch/x86/platform/uv/tlb_uv.c +index 81aee5a..29a69550 100644 +--- a/arch/x86/platform/uv/tlb_uv.c ++++ b/arch/x86/platform/uv/tlb_uv.c +@@ -1304,7 +1304,6 @@ static void __init enable_timeouts(void) + */ + mmr_image |= (1L << SOFTACK_MSHIFT); + if (is_uv2_hub()) { +- mmr_image &= ~(1L << UV2_LEG_SHFT); + mmr_image |= (1L << UV2_EXT_SHFT); + } + write_mmr_misc_control(pnode, mmr_image); +diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c +index cca659e..44d4393 100644 +--- a/arch/x86/xen/enlighten.c ++++ b/arch/x86/xen/enlighten.c +@@ -198,6 +198,9 @@ static void __init xen_banner(void) + xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); + } + ++#define CPUID_THERM_POWER_LEAF 6 ++#define APERFMPERF_PRESENT 0 ++ + static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0; + static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0; + +@@ -218,6 +221,11 @@ static void xen_cpuid(unsigned int *ax, unsigned int *bx, + maskedx = cpuid_leaf1_edx_mask; + break; + ++ case CPUID_THERM_POWER_LEAF: ++ /* Disabling APERFMPERF for kernel usage */ ++ maskecx = ~(1 << APERFMPERF_PRESENT); ++ break; ++ + case 0xb: + /* Suppress extended topology stuff */ + maskebx = 0; +diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c +index b427711..58b49d1 100644 +--- a/drivers/char/agp/intel-agp.c ++++ b/drivers/char/agp/intel-agp.c +@@ -897,6 +897,7 @@ static struct pci_device_id agp_intel_pci_table[] = { + ID(PCI_DEVICE_ID_INTEL_B43_HB), + ID(PCI_DEVICE_ID_INTEL_B43_1_HB), + ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB), ++ ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D2_HB), + ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB), + ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB), + ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB), +diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h +index 5da67f1..6f24604 100644 +--- a/drivers/char/agp/intel-agp.h ++++ b/drivers/char/agp/intel-agp.h +@@ -211,6 +211,7 @@ + #define PCI_DEVICE_ID_INTEL_G41_HB 0x2E30 + #define PCI_DEVICE_ID_INTEL_G41_IG 0x2E32 + #define PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB 0x0040 ++#define PCI_DEVICE_ID_INTEL_IRONLAKE_D2_HB 0x0069 + #define PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG 0x0042 + #define PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB 0x0044 + #define PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB 0x0062 +diff --git a/drivers/char/hw_random/atmel-rng.c b/drivers/char/hw_random/atmel-rng.c +index 241df2e..0477982 100644 +--- a/drivers/char/hw_random/atmel-rng.c ++++ b/drivers/char/hw_random/atmel-rng.c +@@ -36,6 +36,13 @@ static int atmel_trng_read(struct hwrng *rng, void *buf, size_t max, + /* data ready? */ + if (readl(trng->base + TRNG_ODATA) & 1) { + *data = readl(trng->base + TRNG_ODATA); ++ /* ++ ensure data ready is only set again AFTER the next data ++ word is ready in case it got set between checking ISR ++ and reading ODATA, so we don't risk re-reading the ++ same word ++ */ ++ readl(trng->base + TRNG_ISR); + return 4; + } else + return 0; +diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c +index d0f8830..3a1bfd7 100644 +--- a/drivers/gpu/drm/i915/i915_drv.c ++++ b/drivers/gpu/drm/i915/i915_drv.c +@@ -214,6 +214,7 @@ static const struct intel_device_info intel_sandybridge_d_info = { + .need_gfx_hws = 1, .has_hotplug = 1, + .has_bsd_ring = 1, + .has_blt_ring = 1, ++ .has_force_wake = 1, + }; + + static const struct intel_device_info intel_sandybridge_m_info = { +@@ -222,6 +223,7 @@ static const struct intel_device_info intel_sandybridge_m_info = { + .has_fbc = 1, + .has_bsd_ring = 1, + .has_blt_ring = 1, ++ .has_force_wake = 1, + }; + + static const struct intel_device_info intel_ivybridge_d_info = { +@@ -229,6 +231,7 @@ static const struct intel_device_info intel_ivybridge_d_info = { + .need_gfx_hws = 1, .has_hotplug = 1, + .has_bsd_ring = 1, + .has_blt_ring = 1, ++ .has_force_wake = 1, + }; + + static const struct intel_device_info intel_ivybridge_m_info = { +@@ -237,6 +240,7 @@ static const struct intel_device_info intel_ivybridge_m_info = { + .has_fbc = 0, /* FBC is not enabled on Ivybridge mobile yet */ + .has_bsd_ring = 1, + .has_blt_ring = 1, ++ .has_force_wake = 1, + }; + + static const struct pci_device_id pciidlist[] = { /* aka */ +@@ -939,7 +943,7 @@ MODULE_LICENSE("GPL and additional rights"); + + /* We give fast paths for the really cool registers */ + #define NEEDS_FORCE_WAKE(dev_priv, reg) \ +- (((dev_priv)->info->gen >= 6) && \ ++ ((HAS_FORCE_WAKE((dev_priv)->dev)) && \ + ((reg) < 0x40000) && \ + ((reg) != FORCEWAKE) && \ + ((reg) != ECOBUS)) +diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h +index ae294a0..d62c731 100644 +--- a/drivers/gpu/drm/i915/i915_drv.h ++++ b/drivers/gpu/drm/i915/i915_drv.h +@@ -244,6 +244,7 @@ struct intel_device_info { + u8 is_broadwater:1; + u8 is_crestline:1; + u8 is_ivybridge:1; ++ u8 has_force_wake:1; + u8 has_fbc:1; + u8 has_pipe_cxsr:1; + u8 has_hotplug:1; +@@ -1001,6 +1002,8 @@ struct drm_i915_file_private { + #define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT) + #define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX) + ++#define HAS_FORCE_WAKE(dev) (INTEL_INFO(dev)->has_force_wake) ++ + #include "i915_trace.h" + + extern struct drm_ioctl_desc i915_ioctls[]; +diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h +index 06ec1e5..fd53122 100644 +--- a/drivers/gpu/drm/i915/i915_reg.h ++++ b/drivers/gpu/drm/i915/i915_reg.h +@@ -164,6 +164,14 @@ + #define MI_DISPLAY_FLIP MI_INSTR(0x14, 2) + #define MI_DISPLAY_FLIP_I915 MI_INSTR(0x14, 1) + #define MI_DISPLAY_FLIP_PLANE(n) ((n) << 20) ++/* IVB has funny definitions for which plane to flip. */ ++#define MI_DISPLAY_FLIP_IVB_PLANE_A (0 << 19) ++#define MI_DISPLAY_FLIP_IVB_PLANE_B (1 << 19) ++#define MI_DISPLAY_FLIP_IVB_SPRITE_A (2 << 19) ++#define MI_DISPLAY_FLIP_IVB_SPRITE_B (3 << 19) ++#define MI_DISPLAY_FLIP_IVB_PLANE_C (4 << 19) ++#define MI_DISPLAY_FLIP_IVB_SPRITE_C (5 << 19) ++ + #define MI_SET_CONTEXT MI_INSTR(0x18, 0) + #define MI_MM_SPACE_GTT (1<<8) + #define MI_MM_SPACE_PHYSICAL (0<<8) +diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c +index 4720397..5c1cdb8 100644 +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -7009,14 +7009,14 @@ static int intel_gen2_queue_flip(struct drm_device *dev, + + ret = intel_pin_and_fence_fb_obj(dev, obj, LP_RING(dev_priv)); + if (ret) +- goto out; ++ goto err; + + /* Offset into the new buffer for cases of shared fbs between CRTCs */ + offset = crtc->y * fb->pitch + crtc->x * fb->bits_per_pixel/8; + + ret = BEGIN_LP_RING(6); + if (ret) +- goto out; ++ goto err_unpin; + + /* Can't queue multiple flips, so wait for the previous + * one to finish before executing the next. +@@ -7033,7 +7033,11 @@ static int intel_gen2_queue_flip(struct drm_device *dev, + OUT_RING(obj->gtt_offset + offset); + OUT_RING(MI_NOOP); + ADVANCE_LP_RING(); +-out: ++ return 0; ++ ++err_unpin: ++ i915_gem_object_unpin(obj); ++err: + return ret; + } + +@@ -7050,14 +7054,14 @@ static int intel_gen3_queue_flip(struct drm_device *dev, + + ret = intel_pin_and_fence_fb_obj(dev, obj, LP_RING(dev_priv)); + if (ret) +- goto out; ++ goto err; + + /* Offset into the new buffer for cases of shared fbs between CRTCs */ + offset = crtc->y * fb->pitch + crtc->x * fb->bits_per_pixel/8; + + ret = BEGIN_LP_RING(6); + if (ret) +- goto out; ++ goto err_unpin; + + if (intel_crtc->plane) + flip_mask = MI_WAIT_FOR_PLANE_B_FLIP; +@@ -7072,7 +7076,11 @@ static int intel_gen3_queue_flip(struct drm_device *dev, + OUT_RING(MI_NOOP); + + ADVANCE_LP_RING(); +-out: ++ return 0; ++ ++err_unpin: ++ i915_gem_object_unpin(obj); ++err: + return ret; + } + +@@ -7088,11 +7096,11 @@ static int intel_gen4_queue_flip(struct drm_device *dev, + + ret = intel_pin_and_fence_fb_obj(dev, obj, LP_RING(dev_priv)); + if (ret) +- goto out; ++ goto err; + + ret = BEGIN_LP_RING(4); + if (ret) +- goto out; ++ goto err_unpin; + + /* i965+ uses the linear or tiled offsets from the + * Display Registers (which do not change across a page-flip) +@@ -7111,7 +7119,11 @@ static int intel_gen4_queue_flip(struct drm_device *dev, + pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff; + OUT_RING(pf | pipesrc); + ADVANCE_LP_RING(); +-out: ++ return 0; ++ ++err_unpin: ++ i915_gem_object_unpin(obj); ++err: + return ret; + } + +@@ -7127,11 +7139,11 @@ static int intel_gen6_queue_flip(struct drm_device *dev, + + ret = intel_pin_and_fence_fb_obj(dev, obj, LP_RING(dev_priv)); + if (ret) +- goto out; ++ goto err; + + ret = BEGIN_LP_RING(4); + if (ret) +- goto out; ++ goto err_unpin; + + OUT_RING(MI_DISPLAY_FLIP | + MI_DISPLAY_FLIP_PLANE(intel_crtc->plane)); +@@ -7142,7 +7154,11 @@ static int intel_gen6_queue_flip(struct drm_device *dev, + pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff; + OUT_RING(pf | pipesrc); + ADVANCE_LP_RING(); +-out: ++ return 0; ++ ++err_unpin: ++ i915_gem_object_unpin(obj); ++err: + return ret; + } + +@@ -7160,22 +7176,43 @@ static int intel_gen7_queue_flip(struct drm_device *dev, + struct drm_i915_private *dev_priv = dev->dev_private; + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + struct intel_ring_buffer *ring = &dev_priv->ring[BCS]; ++ uint32_t plane_bit = 0; + int ret; + + ret = intel_pin_and_fence_fb_obj(dev, obj, ring); + if (ret) +- goto out; ++ goto err; ++ ++ switch(intel_crtc->plane) { ++ case PLANE_A: ++ plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_A; ++ break; ++ case PLANE_B: ++ plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_B; ++ break; ++ case PLANE_C: ++ plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_C; ++ break; ++ default: ++ WARN_ONCE(1, "unknown plane in flip command\n"); ++ ret = -ENODEV; ++ goto err; ++ } + + ret = intel_ring_begin(ring, 4); + if (ret) +- goto out; ++ goto err_unpin; + +- intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19)); ++ intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | plane_bit); + intel_ring_emit(ring, (fb->pitch | obj->tiling_mode)); + intel_ring_emit(ring, (obj->gtt_offset)); + intel_ring_emit(ring, (MI_NOOP)); + intel_ring_advance(ring); +-out: ++ return 0; ++ ++err_unpin: ++ i915_gem_object_unpin(obj); ++err: + return ret; + } + +diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c +index 62f9ac5..933e66b 100644 +--- a/drivers/gpu/drm/i915/intel_ringbuffer.c ++++ b/drivers/gpu/drm/i915/intel_ringbuffer.c +@@ -263,10 +263,15 @@ u32 intel_ring_get_active_head(struct intel_ring_buffer *ring) + + static int init_ring_common(struct intel_ring_buffer *ring) + { +- drm_i915_private_t *dev_priv = ring->dev->dev_private; ++ struct drm_device *dev = ring->dev; ++ drm_i915_private_t *dev_priv = dev->dev_private; + struct drm_i915_gem_object *obj = ring->obj; ++ int ret = 0; + u32 head; + ++ if (HAS_FORCE_WAKE(dev)) ++ gen6_gt_force_wake_get(dev_priv); ++ + /* Stop the ring if it's running. */ + I915_WRITE_CTL(ring, 0); + I915_WRITE_HEAD(ring, 0); +@@ -314,7 +319,8 @@ static int init_ring_common(struct intel_ring_buffer *ring) + I915_READ_HEAD(ring), + I915_READ_TAIL(ring), + I915_READ_START(ring)); +- return -EIO; ++ ret = -EIO; ++ goto out; + } + + if (!drm_core_check_feature(ring->dev, DRIVER_MODESET)) +@@ -325,7 +331,11 @@ static int init_ring_common(struct intel_ring_buffer *ring) + ring->space = ring_space(ring); + } + +- return 0; ++out: ++ if (HAS_FORCE_WAKE(dev)) ++ gen6_gt_force_wake_put(dev_priv); ++ ++ return ret; + } + + static int +@@ -1045,6 +1055,10 @@ int intel_init_ring_buffer(struct drm_device *dev, + if (ret) + goto err_unref; + ++ ret = i915_gem_object_set_to_gtt_domain(obj, true); ++ if (ret) ++ goto err_unpin; ++ + ring->map.size = ring->size; + ring->map.offset = dev->agp->base + obj->gtt_offset; + ring->map.type = 0; +diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c +index cea6696..1e72db5 100644 +--- a/drivers/gpu/drm/nouveau/nouveau_connector.c ++++ b/drivers/gpu/drm/nouveau/nouveau_connector.c +@@ -602,6 +602,55 @@ nouveau_connector_scaler_modes_add(struct drm_connector *connector) + return modes; + } + ++static void ++nouveau_connector_detect_depth(struct drm_connector *connector) ++{ ++ struct drm_nouveau_private *dev_priv = connector->dev->dev_private; ++ struct nouveau_connector *nv_connector = nouveau_connector(connector); ++ struct nouveau_encoder *nv_encoder = nv_connector->detected_encoder; ++ struct nvbios *bios = &dev_priv->vbios; ++ struct drm_display_mode *mode = nv_connector->native_mode; ++ bool duallink; ++ ++ /* if the edid is feeling nice enough to provide this info, use it */ ++ if (nv_connector->edid && connector->display_info.bpc) ++ return; ++ ++ /* EDID 1.4 is *supposed* to be supported on eDP, but, Apple... */ ++ if (nv_connector->dcb->type == DCB_CONNECTOR_eDP) { ++ connector->display_info.bpc = 6; ++ return; ++ } ++ ++ /* we're out of options unless we're LVDS, default to 8bpc */ ++ if (nv_encoder->dcb->type != OUTPUT_LVDS) { ++ connector->display_info.bpc = 8; ++ return; ++ } ++ ++ connector->display_info.bpc = 6; ++ ++ /* LVDS: panel straps */ ++ if (bios->fp_no_ddc) { ++ if (bios->fp.if_is_24bit) ++ connector->display_info.bpc = 8; ++ return; ++ } ++ ++ /* LVDS: DDC panel, need to first determine the number of links to ++ * know which if_is_24bit flag to check... ++ */ ++ if (nv_connector->edid && ++ nv_connector->dcb->type == DCB_CONNECTOR_LVDS_SPWG) ++ duallink = ((u8 *)nv_connector->edid)[121] == 2; ++ else ++ duallink = mode->clock >= bios->fp.duallink_transition_clk; ++ ++ if ((!duallink && (bios->fp.strapless_is_24bit & 1)) || ++ ( duallink && (bios->fp.strapless_is_24bit & 2))) ++ connector->display_info.bpc = 8; ++} ++ + static int + nouveau_connector_get_modes(struct drm_connector *connector) + { +@@ -646,6 +695,12 @@ nouveau_connector_get_modes(struct drm_connector *connector) + ret = 1; + } + ++ /* Attempt to determine display colour depth, this has to happen after ++ * we've determined the "native" mode for LVDS, as the VBIOS tables ++ * require us to compare against a pixel clock in some cases.. ++ */ ++ nouveau_connector_detect_depth(connector); ++ + if (nv_encoder->dcb->type == OUTPUT_TV) + ret = get_slave_funcs(encoder)->get_modes(encoder, connector); + +diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c +index dac178b..931f4df 100644 +--- a/drivers/gpu/drm/radeon/evergreen.c ++++ b/drivers/gpu/drm/radeon/evergreen.c +@@ -2148,6 +2148,9 @@ static void evergreen_gpu_init(struct radeon_device *rdev) + smx_dc_ctl0 |= NUMBER_OF_SETS(rdev->config.evergreen.sx_num_of_sets); + WREG32(SMX_DC_CTL0, smx_dc_ctl0); + ++ if (rdev->family <= CHIP_SUMO2) ++ WREG32(SMX_SAR_CTL0, 0x00010000); ++ + WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.evergreen.sx_max_export_size / 4) - 1) | + POSITION_BUFFER_SIZE((rdev->config.evergreen.sx_max_export_pos_size / 4) - 1) | + SMX_BUFFER_SIZE((rdev->config.evergreen.sx_max_export_smx_size / 4) - 1))); +diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h +index 0128445..6ecd23f 100644 +--- a/drivers/gpu/drm/radeon/evergreend.h ++++ b/drivers/gpu/drm/radeon/evergreend.h +@@ -270,6 +270,7 @@ + #define SCRATCH_UMSK 0x8540 + #define SCRATCH_ADDR 0x8544 + ++#define SMX_SAR_CTL0 0xA008 + #define SMX_DC_CTL0 0xA020 + #define USE_HASH_FUNCTION (1 << 0) + #define NUMBER_OF_SETS(x) ((x) << 1) +diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c +index 9cdda0b..bdfa82a 100644 +--- a/drivers/gpu/drm/radeon/r600.c ++++ b/drivers/gpu/drm/radeon/r600.c +@@ -1905,6 +1905,7 @@ void r600_gpu_init(struct radeon_device *rdev) + WREG32(PA_CL_ENHANCE, (CLIP_VTX_REORDER_ENA | + NUM_CLIP_SEQ(3))); + WREG32(PA_SC_ENHANCE, FORCE_EOV_MAX_CLK_CNT(4095)); ++ WREG32(VC_ENHANCE, 0); + } + + +diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h +index bfe1b5d..d4d23a8d 100644 +--- a/drivers/gpu/drm/radeon/r600d.h ++++ b/drivers/gpu/drm/radeon/r600d.h +@@ -461,6 +461,7 @@ + #define TC_L2_SIZE(x) ((x)<<5) + #define L2_DISABLE_LATE_HIT (1<<9) + ++#define VC_ENHANCE 0x9714 + + #define VGT_CACHE_INVALIDATION 0x88C4 + #define CACHE_INVALIDATION(x) ((x)<<0) +diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c +index e36ba7f..cc79449 100644 +--- a/drivers/gpu/drm/radeon/rv770.c ++++ b/drivers/gpu/drm/radeon/rv770.c +@@ -782,6 +782,9 @@ static void rv770_gpu_init(struct radeon_device *rdev) + ACK_FLUSH_CTL(3) | + SYNC_FLUSH_CTL)); + ++ if (rdev->family != CHIP_RV770) ++ WREG32(SMX_SAR_CTL0, 0x00003f3f); ++ + db_debug3 = RREG32(DB_DEBUG3); + db_debug3 &= ~DB_CLK_OFF_DELAY(0x1f); + switch (rdev->family) { +@@ -960,7 +963,7 @@ static void rv770_gpu_init(struct radeon_device *rdev) + + WREG32(PA_CL_ENHANCE, (CLIP_VTX_REORDER_ENA | + NUM_CLIP_SEQ(3))); +- ++ WREG32(VC_ENHANCE, 0); + } + + void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc) +diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h +index 7538092..7095a71 100644 +--- a/drivers/gpu/drm/radeon/rv770d.h ++++ b/drivers/gpu/drm/radeon/rv770d.h +@@ -208,6 +208,7 @@ + #define SCRATCH_UMSK 0x8540 + #define SCRATCH_ADDR 0x8544 + ++#define SMX_SAR_CTL0 0xA008 + #define SMX_DC_CTL0 0xA020 + #define USE_HASH_FUNCTION (1 << 0) + #define CACHE_DEPTH(x) ((x) << 1) +@@ -307,6 +308,8 @@ + #define TCP_CNTL 0x9610 + #define TCP_CHAN_STEER 0x9614 + ++#define VC_ENHANCE 0x9714 ++ + #define VGT_CACHE_INVALIDATION 0x88C4 + #define CACHE_INVALIDATION(x) ((x)<<0) + #define VC_ONLY 0 +diff --git a/drivers/hwmon/fam15h_power.c b/drivers/hwmon/fam15h_power.c +index 9a4c3ab..e8e18ca 100644 +--- a/drivers/hwmon/fam15h_power.c ++++ b/drivers/hwmon/fam15h_power.c +@@ -61,14 +61,14 @@ static ssize_t show_power(struct device *dev, + REG_TDP_RUNNING_AVERAGE, &val); + running_avg_capture = (val >> 4) & 0x3fffff; + running_avg_capture = sign_extend32(running_avg_capture, 21); +- running_avg_range = val & 0xf; ++ running_avg_range = (val & 0xf) + 1; + + pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5), + REG_TDP_LIMIT3, &val); + + tdp_limit = val >> 16; +- curr_pwr_watts = tdp_limit + data->base_tdp - +- (s32)(running_avg_capture >> (running_avg_range + 1)); ++ curr_pwr_watts = (tdp_limit + data->base_tdp) << running_avg_range; ++ curr_pwr_watts -= running_avg_capture; + curr_pwr_watts *= data->tdp_to_watts; + + /* +@@ -78,7 +78,7 @@ static ssize_t show_power(struct device *dev, + * scaling factor 1/(2^16). For conversion we use + * (10^6)/(2^16) = 15625/(2^10) + */ +- curr_pwr_watts = (curr_pwr_watts * 15625) >> 10; ++ curr_pwr_watts = (curr_pwr_watts * 15625) >> (10 + running_avg_range); + return sprintf(buf, "%u\n", (unsigned int) curr_pwr_watts); + } + static DEVICE_ATTR(power1_input, S_IRUGO, show_power, NULL); +diff --git a/drivers/net/can/c_can/c_can.c b/drivers/net/can/c_can/c_can.c +index 536bda0..8dc84d6 100644 +--- a/drivers/net/can/c_can/c_can.c ++++ b/drivers/net/can/c_can/c_can.c +@@ -686,7 +686,7 @@ static int c_can_get_berr_counter(const struct net_device *dev, + * + * We iterate from priv->tx_echo to priv->tx_next and check if the + * packet has been transmitted, echo it back to the CAN framework. +- * If we discover a not yet transmitted package, stop looking for more. ++ * If we discover a not yet transmitted packet, stop looking for more. + */ + static void c_can_do_tx(struct net_device *dev) + { +@@ -698,7 +698,7 @@ static void c_can_do_tx(struct net_device *dev) + for (/* nix */; (priv->tx_next - priv->tx_echo) > 0; priv->tx_echo++) { + msg_obj_no = get_tx_echo_msg_obj(priv); + val = c_can_read_reg32(priv, &priv->regs->txrqst1); +- if (!(val & (1 << msg_obj_no))) { ++ if (!(val & (1 << (msg_obj_no - 1)))) { + can_get_echo_skb(dev, + msg_obj_no - C_CAN_MSG_OBJ_TX_FIRST); + stats->tx_bytes += priv->read_reg(priv, +@@ -706,6 +706,8 @@ static void c_can_do_tx(struct net_device *dev) + & IF_MCONT_DLC_MASK; + stats->tx_packets++; + c_can_inval_msg_object(dev, 0, msg_obj_no); ++ } else { ++ break; + } + } + +@@ -950,7 +952,7 @@ static int c_can_poll(struct napi_struct *napi, int quota) + struct net_device *dev = napi->dev; + struct c_can_priv *priv = netdev_priv(dev); + +- irqstatus = priv->read_reg(priv, &priv->regs->interrupt); ++ irqstatus = priv->irqstatus; + if (!irqstatus) + goto end; + +@@ -1028,12 +1030,11 @@ end: + + static irqreturn_t c_can_isr(int irq, void *dev_id) + { +- u16 irqstatus; + struct net_device *dev = (struct net_device *)dev_id; + struct c_can_priv *priv = netdev_priv(dev); + +- irqstatus = priv->read_reg(priv, &priv->regs->interrupt); +- if (!irqstatus) ++ priv->irqstatus = priv->read_reg(priv, &priv->regs->interrupt); ++ if (!priv->irqstatus) + return IRQ_NONE; + + /* disable all interrupts and schedule the NAPI */ +@@ -1063,10 +1064,11 @@ static int c_can_open(struct net_device *dev) + goto exit_irq_fail; + } + ++ napi_enable(&priv->napi); ++ + /* start the c_can controller */ + c_can_start(dev); + +- napi_enable(&priv->napi); + netif_start_queue(dev); + + return 0; +diff --git a/drivers/net/can/c_can/c_can.h b/drivers/net/can/c_can/c_can.h +index 9b7fbef..5f32d34 100644 +--- a/drivers/net/can/c_can/c_can.h ++++ b/drivers/net/can/c_can/c_can.h +@@ -76,6 +76,7 @@ struct c_can_priv { + unsigned int tx_next; + unsigned int tx_echo; + void *priv; /* for board-specific data */ ++ u16 irqstatus; + }; + + struct net_device *alloc_c_can_dev(void); +diff --git a/drivers/net/usb/sierra_net.c b/drivers/net/usb/sierra_net.c +index ed1b432..864448b 100644 +--- a/drivers/net/usb/sierra_net.c ++++ b/drivers/net/usb/sierra_net.c +@@ -943,7 +943,7 @@ struct sk_buff *sierra_net_tx_fixup(struct usbnet *dev, struct sk_buff *skb, + } + + static const u8 sierra_net_ifnum_list[] = { 7, 10, 11 }; +-static const struct sierra_net_info_data sierra_net_info_data_68A3 = { ++static const struct sierra_net_info_data sierra_net_info_data_direct_ip = { + .rx_urb_size = 8 * 1024, + .whitelist = { + .infolen = ARRAY_SIZE(sierra_net_ifnum_list), +@@ -951,7 +951,7 @@ static const struct sierra_net_info_data sierra_net_info_data_68A3 = { + } + }; + +-static const struct driver_info sierra_net_info_68A3 = { ++static const struct driver_info sierra_net_info_direct_ip = { + .description = "Sierra Wireless USB-to-WWAN Modem", + .flags = FLAG_WWAN | FLAG_SEND_ZLP, + .bind = sierra_net_bind, +@@ -959,12 +959,18 @@ static const struct driver_info sierra_net_info_68A3 = { + .status = sierra_net_status, + .rx_fixup = sierra_net_rx_fixup, + .tx_fixup = sierra_net_tx_fixup, +- .data = (unsigned long)&sierra_net_info_data_68A3, ++ .data = (unsigned long)&sierra_net_info_data_direct_ip, + }; + + static const struct usb_device_id products[] = { + {USB_DEVICE(0x1199, 0x68A3), /* Sierra Wireless USB-to-WWAN modem */ +- .driver_info = (unsigned long) &sierra_net_info_68A3}, ++ .driver_info = (unsigned long) &sierra_net_info_direct_ip}, ++ {USB_DEVICE(0x0F3D, 0x68A3), /* AT&T Direct IP modem */ ++ .driver_info = (unsigned long) &sierra_net_info_direct_ip}, ++ {USB_DEVICE(0x1199, 0x68AA), /* Sierra Wireless Direct IP LTE modem */ ++ .driver_info = (unsigned long) &sierra_net_info_direct_ip}, ++ {USB_DEVICE(0x0F3D, 0x68AA), /* AT&T Direct IP LTE modem */ ++ .driver_info = (unsigned long) &sierra_net_info_direct_ip}, + + {}, /* last item */ + }; +diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c +index 0b9f797..9b6b010 100644 +--- a/drivers/net/wireless/iwlwifi/iwl-6000.c ++++ b/drivers/net/wireless/iwlwifi/iwl-6000.c +@@ -49,17 +49,20 @@ + #define IWL6000_UCODE_API_MAX 6 + #define IWL6050_UCODE_API_MAX 5 + #define IWL6000G2_UCODE_API_MAX 6 ++#define IWL6035_UCODE_API_MAX 6 + + /* Oldest version we won't warn about */ + #define IWL6000_UCODE_API_OK 4 + #define IWL6000G2_UCODE_API_OK 5 + #define IWL6050_UCODE_API_OK 5 + #define IWL6000G2B_UCODE_API_OK 6 ++#define IWL6035_UCODE_API_OK 6 + + /* Lowest firmware API version supported */ + #define IWL6000_UCODE_API_MIN 4 + #define IWL6050_UCODE_API_MIN 4 +-#define IWL6000G2_UCODE_API_MIN 4 ++#define IWL6000G2_UCODE_API_MIN 5 ++#define IWL6035_UCODE_API_MIN 6 + + #define IWL6000_FW_PRE "iwlwifi-6000-" + #define IWL6000_MODULE_FIRMWARE(api) IWL6000_FW_PRE __stringify(api) ".ucode" +@@ -436,9 +439,24 @@ struct iwl_cfg iwl6030_2bg_cfg = { + IWL_DEVICE_6030, + }; + ++#define IWL_DEVICE_6035 \ ++ .fw_name_pre = IWL6030_FW_PRE, \ ++ .ucode_api_max = IWL6035_UCODE_API_MAX, \ ++ .ucode_api_ok = IWL6035_UCODE_API_OK, \ ++ .ucode_api_min = IWL6035_UCODE_API_MIN, \ ++ .eeprom_ver = EEPROM_6030_EEPROM_VERSION, \ ++ .eeprom_calib_ver = EEPROM_6030_TX_POWER_VERSION, \ ++ .lib = &iwl6030_lib, \ ++ .base_params = &iwl6000_g2_base_params, \ ++ .bt_params = &iwl6000_bt_params, \ ++ .need_dc_calib = true, \ ++ .need_temp_offset_calib = true, \ ++ .led_mode = IWL_LED_RF_STATE, \ ++ .adv_pm = true ++ + struct iwl_cfg iwl6035_2agn_cfg = { + .name = "6035 Series 2x2 AGN/BT", +- IWL_DEVICE_6030, ++ IWL_DEVICE_6035, + .ht_params = &iwl6000_ht_params, + }; + +diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-sta.c b/drivers/net/wireless/iwlwifi/iwl-agn-sta.c +index 5cfb3d1..ccf1524 100644 +--- a/drivers/net/wireless/iwlwifi/iwl-agn-sta.c ++++ b/drivers/net/wireless/iwlwifi/iwl-agn-sta.c +@@ -1245,7 +1245,7 @@ int iwl_remove_dynamic_key(struct iwl_priv *priv, + key_flags |= STA_KEY_MULTICAST_MSK; + + sta_cmd.key.key_flags = key_flags; +- sta_cmd.key.key_offset = WEP_INVALID_OFFSET; ++ sta_cmd.key.key_offset = keyconf->hw_key_idx; + sta_cmd.sta.modify_mask = STA_MODIFY_KEY_MASK; + sta_cmd.mode = STA_CONTROL_MODIFY_MSK; + +diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c +index d7d2512..16cdd12 100644 +--- a/drivers/net/wireless/iwlwifi/iwl-agn.c ++++ b/drivers/net/wireless/iwlwifi/iwl-agn.c +@@ -1696,6 +1696,7 @@ static int iwlagn_mac_setup_register(struct iwl_priv *priv, + WIPHY_FLAG_DISABLE_BEACON_HINTS | + WIPHY_FLAG_IBSS_RSN; + ++#ifdef CONFIG_PM_SLEEP + if (priv->ucode_wowlan.code.len && device_can_wakeup(bus(priv)->dev)) { + hw->wiphy->wowlan.flags = WIPHY_WOWLAN_MAGIC_PKT | + WIPHY_WOWLAN_DISCONNECT | +@@ -1712,6 +1713,7 @@ static int iwlagn_mac_setup_register(struct iwl_priv *priv, + hw->wiphy->wowlan.pattern_max_len = + IWLAGN_WOWLAN_MAX_PATTERN_LEN; + } ++#endif + + if (iwlagn_mod_params.power_save) + hw->wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT; +@@ -1739,6 +1741,7 @@ static int iwlagn_mac_setup_register(struct iwl_priv *priv, + ret = ieee80211_register_hw(priv->hw); + if (ret) { + IWL_ERR(priv, "Failed to register hw (error %d)\n", ret); ++ iwl_leds_exit(priv); + return ret; + } + priv->mac80211_registered = 1; +diff --git a/drivers/net/wireless/iwlwifi/iwl-prph.h b/drivers/net/wireless/iwlwifi/iwl-prph.h +index d9b089e..0683006 100644 +--- a/drivers/net/wireless/iwlwifi/iwl-prph.h ++++ b/drivers/net/wireless/iwlwifi/iwl-prph.h +@@ -228,6 +228,7 @@ + #define SCD_TXFACT (SCD_BASE + 0x10) + #define SCD_ACTIVE (SCD_BASE + 0x14) + #define SCD_QUEUECHAIN_SEL (SCD_BASE + 0xe8) ++#define SCD_CHAINEXT_EN (SCD_BASE + 0x244) + #define SCD_AGGR_SEL (SCD_BASE + 0x248) + #define SCD_INTERRUPT_MASK (SCD_BASE + 0x108) + +diff --git a/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c b/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c +index 5f17ab8..5815cf5 100644 +--- a/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c ++++ b/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c +@@ -868,6 +868,11 @@ static void iwl_trans_pcie_tx_start(struct iwl_trans *trans) + iwl_write_prph(bus(trans), SCD_DRAM_BASE_ADDR, + trans_pcie->scd_bc_tbls.dma >> 10); + ++ /* The chain extension of the SCD doesn't work well. This feature is ++ * enabled by default by the HW, so we need to disable it manually. ++ */ ++ iwl_write_prph(bus(trans), SCD_CHAINEXT_EN, 0); ++ + /* Enable DMA channel */ + for (chan = 0; chan < FH_TCSR_CHNL_NUM ; chan++) + iwl_write_direct32(bus(trans), FH_TCSR_CHNL_TX_CONFIG_REG(chan), +diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h +index 99ff12d..c778164 100644 +--- a/drivers/net/wireless/rt2x00/rt2x00.h ++++ b/drivers/net/wireless/rt2x00/rt2x00.h +@@ -390,8 +390,7 @@ struct rt2x00_intf { + * for hardware which doesn't support hardware + * sequence counting. + */ +- spinlock_t seqlock; +- u16 seqno; ++ atomic_t seqno; + }; + + static inline struct rt2x00_intf* vif_to_intf(struct ieee80211_vif *vif) +diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c +index 373dae1..921da9a 100644 +--- a/drivers/net/wireless/rt2x00/rt2x00mac.c ++++ b/drivers/net/wireless/rt2x00/rt2x00mac.c +@@ -277,7 +277,6 @@ int rt2x00mac_add_interface(struct ieee80211_hw *hw, + else + rt2x00dev->intf_sta_count++; + +- spin_lock_init(&intf->seqlock); + mutex_init(&intf->beacon_skb_mutex); + intf->beacon = entry; + +diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c +index 9b1b2b7..50f92d5 100644 +--- a/drivers/net/wireless/rt2x00/rt2x00queue.c ++++ b/drivers/net/wireless/rt2x00/rt2x00queue.c +@@ -207,6 +207,7 @@ static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev *rt2x00dev, + struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); + struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; + struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif); ++ u16 seqno; + + if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)) + return; +@@ -227,15 +228,13 @@ static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev *rt2x00dev, + * sequence counting per-frame, since those will override the + * sequence counter given by mac80211. + */ +- spin_lock(&intf->seqlock); +- + if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags)) +- intf->seqno += 0x10; +- hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); +- hdr->seq_ctrl |= cpu_to_le16(intf->seqno); +- +- spin_unlock(&intf->seqlock); ++ seqno = atomic_add_return(0x10, &intf->seqno); ++ else ++ seqno = atomic_read(&intf->seqno); + ++ hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); ++ hdr->seq_ctrl |= cpu_to_le16(seqno); + } + + static void rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev *rt2x00dev, +diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c +index 6d4a531..e5b75eb 100644 +--- a/drivers/pci/pci.c ++++ b/drivers/pci/pci.c +@@ -1689,6 +1689,11 @@ int pci_prepare_to_sleep(struct pci_dev *dev) + if (target_state == PCI_POWER_ERROR) + return -EIO; + ++ /* Some devices mustn't be in D3 during system sleep */ ++ if (target_state == PCI_D3hot && ++ (dev->dev_flags & PCI_DEV_FLAGS_NO_D3_DURING_SLEEP)) ++ return 0; ++ + pci_enable_wake(dev, target_state, device_may_wakeup(&dev->dev)); + + error = pci_set_power_state(dev, target_state); +diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c +index 78fda9c..3c56fec 100644 +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -2940,6 +2940,32 @@ static void __devinit disable_igfx_irq(struct pci_dev *dev) + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0102, disable_igfx_irq); + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq); + ++/* ++ * The Intel 6 Series/C200 Series chipset's EHCI controllers on many ++ * ASUS motherboards will cause memory corruption or a system crash ++ * if they are in D3 while the system is put into S3 sleep. ++ */ ++static void __devinit asus_ehci_no_d3(struct pci_dev *dev) ++{ ++ const char *sys_info; ++ static const char good_Asus_board[] = "P8Z68-V"; ++ ++ if (dev->dev_flags & PCI_DEV_FLAGS_NO_D3_DURING_SLEEP) ++ return; ++ if (dev->subsystem_vendor != PCI_VENDOR_ID_ASUSTEK) ++ return; ++ sys_info = dmi_get_system_info(DMI_BOARD_NAME); ++ if (sys_info && memcmp(sys_info, good_Asus_board, ++ sizeof(good_Asus_board) - 1) == 0) ++ return; ++ ++ dev_info(&dev->dev, "broken D3 during system sleep on ASUS\n"); ++ dev->dev_flags |= PCI_DEV_FLAGS_NO_D3_DURING_SLEEP; ++ device_set_wakeup_capable(&dev->dev, false); ++} ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1c26, asus_ehci_no_d3); ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1c2d, asus_ehci_no_d3); ++ + static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f, + struct pci_fixup *end) + { +diff --git a/drivers/scsi/mpt2sas/mpt2sas_base.c b/drivers/scsi/mpt2sas/mpt2sas_base.c +index ac336e1..e903077 100644 +--- a/drivers/scsi/mpt2sas/mpt2sas_base.c ++++ b/drivers/scsi/mpt2sas/mpt2sas_base.c +@@ -1739,7 +1739,7 @@ static inline void _base_writeq(__u64 b, volatile void __iomem *addr, + static inline u8 + _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc) + { +- return ioc->cpu_msix_table[smp_processor_id()]; ++ return ioc->cpu_msix_table[raw_smp_processor_id()]; + } + + /** +diff --git a/drivers/target/target_core_alua.c b/drivers/target/target_core_alua.c +index 5b05744..0364ca2 100644 +--- a/drivers/target/target_core_alua.c ++++ b/drivers/target/target_core_alua.c +@@ -352,9 +352,11 @@ int target_emulate_set_target_port_groups(struct se_task *task) + + out: + transport_kunmap_data_sg(cmd); +- task->task_scsi_status = GOOD; +- transport_complete_task(task, 1); +- return 0; ++ if (!rc) { ++ task->task_scsi_status = GOOD; ++ transport_complete_task(task, 1); ++ } ++ return rc; + } + + static inline int core_alua_state_nonoptimized( +diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c +index e61d9c4..1094469 100644 +--- a/drivers/usb/class/cdc-acm.c ++++ b/drivers/usb/class/cdc-acm.c +@@ -498,6 +498,14 @@ static int acm_tty_open(struct tty_struct *tty, struct file *filp) + + usb_autopm_put_interface(acm->control); + ++ /* ++ * Unthrottle device in case the TTY was closed while throttled. ++ */ ++ spin_lock_irq(&acm->read_lock); ++ acm->throttled = 0; ++ acm->throttle_req = 0; ++ spin_unlock_irq(&acm->read_lock); ++ + if (acm_submit_read_urbs(acm, GFP_KERNEL)) + goto bail_out; + +diff --git a/drivers/usb/class/cdc-wdm.c b/drivers/usb/class/cdc-wdm.c +index 554ac90..19fb5fa 100644 +--- a/drivers/usb/class/cdc-wdm.c ++++ b/drivers/usb/class/cdc-wdm.c +@@ -31,6 +31,8 @@ + #define DRIVER_AUTHOR "Oliver Neukum" + #define DRIVER_DESC "USB Abstract Control Model driver for USB WCM Device Management" + ++#define HUAWEI_VENDOR_ID 0x12D1 ++ + static const struct usb_device_id wdm_ids[] = { + { + .match_flags = USB_DEVICE_ID_MATCH_INT_CLASS | +@@ -38,6 +40,20 @@ static const struct usb_device_id wdm_ids[] = { + .bInterfaceClass = USB_CLASS_COMM, + .bInterfaceSubClass = USB_CDC_SUBCLASS_DMM + }, ++ { ++ /* ++ * Huawei E392, E398 and possibly other Qualcomm based modems ++ * embed the Qualcomm QMI protocol inside CDC on CDC ECM like ++ * control interfaces. Userspace access to this is required ++ * to configure the accompanying data interface ++ */ ++ .match_flags = USB_DEVICE_ID_MATCH_VENDOR | ++ USB_DEVICE_ID_MATCH_INT_INFO, ++ .idVendor = HUAWEI_VENDOR_ID, ++ .bInterfaceClass = USB_CLASS_VENDOR_SPEC, ++ .bInterfaceSubClass = 1, ++ .bInterfaceProtocol = 9, /* NOTE: CDC ECM control interface! */ ++ }, + { } + }; + +diff --git a/drivers/usb/core/hcd-pci.c b/drivers/usb/core/hcd-pci.c +index 5f1404a..61d08dd 100644 +--- a/drivers/usb/core/hcd-pci.c ++++ b/drivers/usb/core/hcd-pci.c +@@ -495,15 +495,6 @@ static int hcd_pci_suspend_noirq(struct device *dev) + + pci_save_state(pci_dev); + +- /* +- * Some systems crash if an EHCI controller is in D3 during +- * a sleep transition. We have to leave such controllers in D0. +- */ +- if (hcd->broken_pci_sleep) { +- dev_dbg(dev, "Staying in PCI D0\n"); +- return retval; +- } +- + /* If the root hub is dead rather than suspended, disallow remote + * wakeup. usb_hc_died() should ensure that both hosts are marked as + * dying, so we only need to check the primary roothub. +diff --git a/drivers/usb/core/message.c b/drivers/usb/core/message.c +index ca717da..ef116a5 100644 +--- a/drivers/usb/core/message.c ++++ b/drivers/usb/core/message.c +@@ -1803,7 +1803,6 @@ free_interfaces: + intfc = cp->intf_cache[i]; + intf->altsetting = intfc->altsetting; + intf->num_altsetting = intfc->num_altsetting; +- intf->intf_assoc = find_iad(dev, cp, i); + kref_get(&intfc->ref); + + alt = usb_altnum_to_altsetting(intf, 0); +@@ -1816,6 +1815,8 @@ free_interfaces: + if (!alt) + alt = &intf->altsetting[0]; + ++ intf->intf_assoc = ++ find_iad(dev, cp, alt->desc.bInterfaceNumber); + intf->cur_altsetting = alt; + usb_enable_interface(dev, intf, true); + intf->dev.parent = &dev->dev; +diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c +index da2f711..339be10 100644 +--- a/drivers/usb/host/ehci-hcd.c ++++ b/drivers/usb/host/ehci-hcd.c +@@ -620,6 +620,9 @@ static int ehci_init(struct usb_hcd *hcd) + hw = ehci->async->hw; + hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma); + hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD); ++#if defined(CONFIG_PPC_PS3) ++ hw->hw_info1 |= cpu_to_hc32(ehci, (1 << 7)); /* I = 1 */ ++#endif + hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT); + hw->hw_qtd_next = EHCI_LIST_END(ehci); + ehci->async->qh_state = QH_STATE_LINKED; +diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c +index ee85e81..a79e64b 100644 +--- a/drivers/usb/host/ehci-pci.c ++++ b/drivers/usb/host/ehci-pci.c +@@ -144,14 +144,6 @@ static int ehci_pci_setup(struct usb_hcd *hcd) + hcd->has_tt = 1; + tdi_reset(ehci); + } +- if (pdev->subsystem_vendor == PCI_VENDOR_ID_ASUSTEK) { +- /* EHCI #1 or #2 on 6 Series/C200 Series chipset */ +- if (pdev->device == 0x1c26 || pdev->device == 0x1c2d) { +- ehci_info(ehci, "broken D3 during system sleep on ASUS\n"); +- hcd->broken_pci_sleep = 1; +- device_set_wakeup_capable(&pdev->dev, false); +- } +- } + break; + case PCI_VENDOR_ID_TDI: + if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) { +diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c +index 4232e868..a40ab98 100644 +--- a/drivers/usb/host/xhci-mem.c ++++ b/drivers/usb/host/xhci-mem.c +@@ -693,10 +693,9 @@ static void xhci_free_tt_info(struct xhci_hcd *xhci, + struct xhci_virt_device *virt_dev, + int slot_id) + { +- struct list_head *tt; + struct list_head *tt_list_head; +- struct list_head *tt_next; +- struct xhci_tt_bw_info *tt_info; ++ struct xhci_tt_bw_info *tt_info, *next; ++ bool slot_found = false; + + /* If the device never made it past the Set Address stage, + * it may not have the real_port set correctly. +@@ -708,34 +707,16 @@ static void xhci_free_tt_info(struct xhci_hcd *xhci, + } + + tt_list_head = &(xhci->rh_bw[virt_dev->real_port - 1].tts); +- if (list_empty(tt_list_head)) +- return; +- +- list_for_each(tt, tt_list_head) { +- tt_info = list_entry(tt, struct xhci_tt_bw_info, tt_list); +- if (tt_info->slot_id == slot_id) ++ list_for_each_entry_safe(tt_info, next, tt_list_head, tt_list) { ++ /* Multi-TT hubs will have more than one entry */ ++ if (tt_info->slot_id == slot_id) { ++ slot_found = true; ++ list_del(&tt_info->tt_list); ++ kfree(tt_info); ++ } else if (slot_found) { + break; ++ } + } +- /* Cautionary measure in case the hub was disconnected before we +- * stored the TT information. +- */ +- if (tt_info->slot_id != slot_id) +- return; +- +- tt_next = tt->next; +- tt_info = list_entry(tt, struct xhci_tt_bw_info, +- tt_list); +- /* Multi-TT hubs will have more than one entry */ +- do { +- list_del(tt); +- kfree(tt_info); +- tt = tt_next; +- if (list_empty(tt_list_head)) +- break; +- tt_next = tt->next; +- tt_info = list_entry(tt, struct xhci_tt_bw_info, +- tt_list); +- } while (tt_info->slot_id == slot_id); + } + + int xhci_alloc_tt_info(struct xhci_hcd *xhci, +@@ -1699,17 +1680,9 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci) + { + struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); + struct dev_info *dev_info, *next; +- struct list_head *tt_list_head; +- struct list_head *tt; +- struct list_head *endpoints; +- struct list_head *ep, *q; +- struct xhci_tt_bw_info *tt_info; +- struct xhci_interval_bw_table *bwt; +- struct xhci_virt_ep *virt_ep; +- + unsigned long flags; + int size; +- int i; ++ int i, j, num_ports; + + /* Free the Event Ring Segment Table and the actual Event Ring */ + size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries); +@@ -1766,21 +1739,22 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci) + } + spin_unlock_irqrestore(&xhci->lock, flags); + +- bwt = &xhci->rh_bw->bw_table; +- for (i = 0; i < XHCI_MAX_INTERVAL; i++) { +- endpoints = &bwt->interval_bw[i].endpoints; +- list_for_each_safe(ep, q, endpoints) { +- virt_ep = list_entry(ep, struct xhci_virt_ep, bw_endpoint_list); +- list_del(&virt_ep->bw_endpoint_list); +- kfree(virt_ep); ++ num_ports = HCS_MAX_PORTS(xhci->hcs_params1); ++ for (i = 0; i < num_ports; i++) { ++ struct xhci_interval_bw_table *bwt = &xhci->rh_bw[i].bw_table; ++ for (j = 0; j < XHCI_MAX_INTERVAL; j++) { ++ struct list_head *ep = &bwt->interval_bw[j].endpoints; ++ while (!list_empty(ep)) ++ list_del_init(ep->next); + } + } + +- tt_list_head = &xhci->rh_bw->tts; +- list_for_each_safe(tt, q, tt_list_head) { +- tt_info = list_entry(tt, struct xhci_tt_bw_info, tt_list); +- list_del(tt); +- kfree(tt_info); ++ for (i = 0; i < num_ports; i++) { ++ struct xhci_tt_bw_info *tt, *n; ++ list_for_each_entry_safe(tt, n, &xhci->rh_bw[i].tts, tt_list) { ++ list_del(&tt->tt_list); ++ kfree(tt); ++ } + } + + xhci->num_usb2_ports = 0; +diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c +index 4c00606..05f82e9 100644 +--- a/drivers/usb/host/xhci.c ++++ b/drivers/usb/host/xhci.c +@@ -783,8 +783,8 @@ int xhci_suspend(struct xhci_hcd *xhci) + command = xhci_readl(xhci, &xhci->op_regs->command); + command |= CMD_CSS; + xhci_writel(xhci, command, &xhci->op_regs->command); +- if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10*100)) { +- xhci_warn(xhci, "WARN: xHC CMD_CSS timeout\n"); ++ if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10 * 1000)) { ++ xhci_warn(xhci, "WARN: xHC save state timeout\n"); + spin_unlock_irq(&xhci->lock); + return -ETIMEDOUT; + } +@@ -836,8 +836,8 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated) + command |= CMD_CRS; + xhci_writel(xhci, command, &xhci->op_regs->command); + if (handshake(xhci, &xhci->op_regs->status, +- STS_RESTORE, 0, 10*100)) { +- xhci_dbg(xhci, "WARN: xHC CMD_CSS timeout\n"); ++ STS_RESTORE, 0, 10 * 1000)) { ++ xhci_warn(xhci, "WARN: xHC restore state timeout\n"); + spin_unlock_irq(&xhci->lock); + return -ETIMEDOUT; + } +diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c +index c860597..9c8845a 100644 +--- a/drivers/usb/musb/musb_gadget.c ++++ b/drivers/usb/musb/musb_gadget.c +@@ -1234,6 +1234,7 @@ static int musb_gadget_disable(struct usb_ep *ep) + } + + musb_ep->desc = NULL; ++ musb_ep->end_point.desc = NULL; + + /* abort all pending DMA and requests */ + nuke(musb_ep, -ESHUTDOWN); +diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c +index f2c57e0..aa0c43f 100644 +--- a/drivers/usb/serial/cp210x.c ++++ b/drivers/usb/serial/cp210x.c +@@ -82,6 +82,7 @@ static const struct usb_device_id id_table[] = { + { USB_DEVICE(0x10C4, 0x8066) }, /* Argussoft In-System Programmer */ + { USB_DEVICE(0x10C4, 0x806F) }, /* IMS USB to RS422 Converter Cable */ + { USB_DEVICE(0x10C4, 0x807A) }, /* Crumb128 board */ ++ { USB_DEVICE(0x10C4, 0x80C4) }, /* Cygnal Integrated Products, Inc., Optris infrared thermometer */ + { USB_DEVICE(0x10C4, 0x80CA) }, /* Degree Controls Inc */ + { USB_DEVICE(0x10C4, 0x80DD) }, /* Tracient RFID */ + { USB_DEVICE(0x10C4, 0x80F6) }, /* Suunto sports instrument */ +diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c +index 450bdfe..4045e39 100644 +--- a/drivers/usb/serial/ftdi_sio.c ++++ b/drivers/usb/serial/ftdi_sio.c +@@ -737,6 +737,7 @@ static struct usb_device_id id_table_combined [] = { + { USB_DEVICE(TELLDUS_VID, TELLDUS_TELLSTICK_PID) }, + { USB_DEVICE(RTSYSTEMS_VID, RTSYSTEMS_SERIAL_VX7_PID) }, + { USB_DEVICE(RTSYSTEMS_VID, RTSYSTEMS_CT29B_PID) }, ++ { USB_DEVICE(RTSYSTEMS_VID, RTSYSTEMS_RTS01_PID) }, + { USB_DEVICE(FTDI_VID, FTDI_MAXSTREAM_PID) }, + { USB_DEVICE(FTDI_VID, FTDI_PHI_FISCO_PID) }, + { USB_DEVICE(TML_VID, TML_USB_SERIAL_PID) }, +diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h +index 219b199..d27d7d7 100644 +--- a/drivers/usb/serial/ftdi_sio_ids.h ++++ b/drivers/usb/serial/ftdi_sio_ids.h +@@ -784,6 +784,7 @@ + #define RTSYSTEMS_VID 0x2100 /* Vendor ID */ + #define RTSYSTEMS_SERIAL_VX7_PID 0x9e52 /* Serial converter for VX-7 Radios using FT232RL */ + #define RTSYSTEMS_CT29B_PID 0x9e54 /* CT29B Radio Cable */ ++#define RTSYSTEMS_RTS01_PID 0x9e57 /* USB-RTS01 Radio Cable */ + + + /* +diff --git a/drivers/usb/serial/mct_u232.c b/drivers/usb/serial/mct_u232.c +index ba0d287..42de17b 100644 +--- a/drivers/usb/serial/mct_u232.c ++++ b/drivers/usb/serial/mct_u232.c +@@ -359,13 +359,16 @@ static int mct_u232_set_modem_ctrl(struct usb_serial *serial, + MCT_U232_SET_REQUEST_TYPE, + 0, 0, buf, MCT_U232_SET_MODEM_CTRL_SIZE, + WDR_TIMEOUT); +- if (rc < 0) +- dev_err(&serial->dev->dev, +- "Set MODEM CTRL 0x%x failed (error = %d)\n", mcr, rc); ++ kfree(buf); ++ + dbg("set_modem_ctrl: state=0x%x ==> mcr=0x%x", control_state, mcr); + +- kfree(buf); +- return rc; ++ if (rc < 0) { ++ dev_err(&serial->dev->dev, ++ "Set MODEM CTRL 0x%x failed (error = %d)\n", mcr, rc); ++ return rc; ++ } ++ return 0; + } /* mct_u232_set_modem_ctrl */ + + static int mct_u232_get_modem_stat(struct usb_serial *serial, +diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c +index cbe3451..61d6c31 100644 +--- a/drivers/usb/serial/option.c ++++ b/drivers/usb/serial/option.c +@@ -47,6 +47,7 @@ + /* Function prototypes */ + static int option_probe(struct usb_serial *serial, + const struct usb_device_id *id); ++static void option_release(struct usb_serial *serial); + static int option_send_setup(struct usb_serial_port *port); + static void option_instat_callback(struct urb *urb); + +@@ -425,7 +426,7 @@ static void option_instat_callback(struct urb *urb); + #define SAMSUNG_VENDOR_ID 0x04e8 + #define SAMSUNG_PRODUCT_GT_B3730 0x6889 + +-/* YUGA products www.yuga-info.com*/ ++/* YUGA products www.yuga-info.com gavin.kx@qq.com */ + #define YUGA_VENDOR_ID 0x257A + #define YUGA_PRODUCT_CEM600 0x1601 + #define YUGA_PRODUCT_CEM610 0x1602 +@@ -442,6 +443,8 @@ static void option_instat_callback(struct urb *urb); + #define YUGA_PRODUCT_CEU516 0x160C + #define YUGA_PRODUCT_CEU528 0x160D + #define YUGA_PRODUCT_CEU526 0x160F ++#define YUGA_PRODUCT_CEU881 0x161F ++#define YUGA_PRODUCT_CEU882 0x162F + + #define YUGA_PRODUCT_CWM600 0x2601 + #define YUGA_PRODUCT_CWM610 0x2602 +@@ -457,23 +460,26 @@ static void option_instat_callback(struct urb *urb); + #define YUGA_PRODUCT_CWU518 0x260B + #define YUGA_PRODUCT_CWU516 0x260C + #define YUGA_PRODUCT_CWU528 0x260D ++#define YUGA_PRODUCT_CWU581 0x260E + #define YUGA_PRODUCT_CWU526 0x260F +- +-#define YUGA_PRODUCT_CLM600 0x2601 +-#define YUGA_PRODUCT_CLM610 0x2602 +-#define YUGA_PRODUCT_CLM500 0x2603 +-#define YUGA_PRODUCT_CLM510 0x2604 +-#define YUGA_PRODUCT_CLM800 0x2605 +-#define YUGA_PRODUCT_CLM900 0x2606 +- +-#define YUGA_PRODUCT_CLU718 0x2607 +-#define YUGA_PRODUCT_CLU716 0x2608 +-#define YUGA_PRODUCT_CLU728 0x2609 +-#define YUGA_PRODUCT_CLU726 0x260A +-#define YUGA_PRODUCT_CLU518 0x260B +-#define YUGA_PRODUCT_CLU516 0x260C +-#define YUGA_PRODUCT_CLU528 0x260D +-#define YUGA_PRODUCT_CLU526 0x260F ++#define YUGA_PRODUCT_CWU582 0x261F ++#define YUGA_PRODUCT_CWU583 0x262F ++ ++#define YUGA_PRODUCT_CLM600 0x3601 ++#define YUGA_PRODUCT_CLM610 0x3602 ++#define YUGA_PRODUCT_CLM500 0x3603 ++#define YUGA_PRODUCT_CLM510 0x3604 ++#define YUGA_PRODUCT_CLM800 0x3605 ++#define YUGA_PRODUCT_CLM900 0x3606 ++ ++#define YUGA_PRODUCT_CLU718 0x3607 ++#define YUGA_PRODUCT_CLU716 0x3608 ++#define YUGA_PRODUCT_CLU728 0x3609 ++#define YUGA_PRODUCT_CLU726 0x360A ++#define YUGA_PRODUCT_CLU518 0x360B ++#define YUGA_PRODUCT_CLU516 0x360C ++#define YUGA_PRODUCT_CLU528 0x360D ++#define YUGA_PRODUCT_CLU526 0x360F + + /* Viettel products */ + #define VIETTEL_VENDOR_ID 0x2262 +@@ -666,6 +672,8 @@ static const struct usb_device_id option_ids[] = { + { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K3806, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K4605, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t) &huawei_cdc12_blacklist }, ++ { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K4605, 0xff, 0x01, 0x31) }, ++ { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K4605, 0xff, 0x01, 0x32) }, + { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K3770, 0xff, 0x02, 0x31) }, + { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K3770, 0xff, 0x02, 0x32) }, + { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K3771, 0xff, 0x02, 0x31) }, +@@ -1207,6 +1215,11 @@ static const struct usb_device_id option_ids[] = { + { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLU516) }, + { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLU528) }, + { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLU526) }, ++ { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEU881) }, ++ { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEU882) }, ++ { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CWU581) }, ++ { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CWU582) }, ++ { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CWU583) }, + { USB_DEVICE_AND_INTERFACE_INFO(VIETTEL_VENDOR_ID, VIETTEL_PRODUCT_VT1000, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZD_VENDOR_ID, ZD_PRODUCT_7000, 0xff, 0xff, 0xff) }, + { USB_DEVICE(LG_VENDOR_ID, LG_PRODUCT_L02C) }, /* docomo L-02C modem */ +@@ -1257,7 +1270,7 @@ static struct usb_serial_driver option_1port_device = { + .ioctl = usb_wwan_ioctl, + .attach = usb_wwan_startup, + .disconnect = usb_wwan_disconnect, +- .release = usb_wwan_release, ++ .release = option_release, + .read_int_callback = option_instat_callback, + #ifdef CONFIG_PM + .suspend = usb_wwan_suspend, +@@ -1267,35 +1280,6 @@ static struct usb_serial_driver option_1port_device = { + + static int debug; + +-/* per port private data */ +- +-#define N_IN_URB 4 +-#define N_OUT_URB 4 +-#define IN_BUFLEN 4096 +-#define OUT_BUFLEN 4096 +- +-struct option_port_private { +- /* Input endpoints and buffer for this port */ +- struct urb *in_urbs[N_IN_URB]; +- u8 *in_buffer[N_IN_URB]; +- /* Output endpoints and buffer for this port */ +- struct urb *out_urbs[N_OUT_URB]; +- u8 *out_buffer[N_OUT_URB]; +- unsigned long out_busy; /* Bit vector of URBs in use */ +- int opened; +- struct usb_anchor delayed; +- +- /* Settings for the port */ +- int rts_state; /* Handshaking pins (outputs) */ +- int dtr_state; +- int cts_state; /* Handshaking pins (inputs) */ +- int dsr_state; +- int dcd_state; +- int ri_state; +- +- unsigned long tx_start_time[N_OUT_URB]; +-}; +- + /* Functions used by new usb-serial code. */ + static int __init option_init(void) + { +@@ -1393,12 +1377,22 @@ static int option_probe(struct usb_serial *serial, + return 0; + } + ++static void option_release(struct usb_serial *serial) ++{ ++ struct usb_wwan_intf_private *priv = usb_get_serial_data(serial); ++ ++ usb_wwan_release(serial); ++ ++ kfree(priv); ++} ++ + static void option_instat_callback(struct urb *urb) + { + int err; + int status = urb->status; + struct usb_serial_port *port = urb->context; +- struct option_port_private *portdata = usb_get_serial_port_data(port); ++ struct usb_wwan_port_private *portdata = ++ usb_get_serial_port_data(port); + + dbg("%s", __func__); + dbg("%s: urb %p port %p has data %p", __func__, urb, port, portdata); +@@ -1459,7 +1453,7 @@ static int option_send_setup(struct usb_serial_port *port) + struct usb_serial *serial = port->serial; + struct usb_wwan_intf_private *intfdata = + (struct usb_wwan_intf_private *) serial->private; +- struct option_port_private *portdata; ++ struct usb_wwan_port_private *portdata; + int ifNum = serial->interface->cur_altsetting->desc.bInterfaceNumber; + int val = 0; + dbg("%s", __func__); +diff --git a/drivers/usb/serial/qcserial.c b/drivers/usb/serial/qcserial.c +index 3187d8b..6634477 100644 +--- a/drivers/usb/serial/qcserial.c ++++ b/drivers/usb/serial/qcserial.c +@@ -105,7 +105,13 @@ static const struct usb_device_id id_table[] = { + {USB_DEVICE(0x1410, 0xa021)}, /* Novatel Gobi 3000 Composite */ + {USB_DEVICE(0x413c, 0x8193)}, /* Dell Gobi 3000 QDL */ + {USB_DEVICE(0x413c, 0x8194)}, /* Dell Gobi 3000 Composite */ ++ {USB_DEVICE(0x1199, 0x9010)}, /* Sierra Wireless Gobi 3000 QDL */ ++ {USB_DEVICE(0x1199, 0x9012)}, /* Sierra Wireless Gobi 3000 QDL */ + {USB_DEVICE(0x1199, 0x9013)}, /* Sierra Wireless Gobi 3000 Modem device (MC8355) */ ++ {USB_DEVICE(0x1199, 0x9014)}, /* Sierra Wireless Gobi 3000 QDL */ ++ {USB_DEVICE(0x1199, 0x9015)}, /* Sierra Wireless Gobi 3000 Modem device */ ++ {USB_DEVICE(0x1199, 0x9018)}, /* Sierra Wireless Gobi 3000 QDL */ ++ {USB_DEVICE(0x1199, 0x9019)}, /* Sierra Wireless Gobi 3000 Modem device */ + {USB_DEVICE(0x12D1, 0x14F0)}, /* Sony Gobi 3000 QDL */ + {USB_DEVICE(0x12D1, 0x14F1)}, /* Sony Gobi 3000 Composite */ + { } /* Terminating entry */ +diff --git a/drivers/usb/serial/sierra.c b/drivers/usb/serial/sierra.c +index e093585..535d087 100644 +--- a/drivers/usb/serial/sierra.c ++++ b/drivers/usb/serial/sierra.c +@@ -304,6 +304,10 @@ static const struct usb_device_id id_table[] = { + { USB_DEVICE(0x1199, 0x68A3), /* Sierra Wireless Direct IP modems */ + .driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist + }, ++ /* AT&T Direct IP LTE modems */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x0F3D, 0x68AA, 0xFF, 0xFF, 0xFF), ++ .driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist ++ }, + { USB_DEVICE(0x0f3d, 0x68A3), /* Airprime/Sierra Wireless Direct IP modems */ + .driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist + }, +diff --git a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c +index 38d7ebd..8bea45c 100644 +--- a/drivers/usb/serial/usb-serial.c ++++ b/drivers/usb/serial/usb-serial.c +@@ -669,12 +669,14 @@ exit: + static struct usb_serial_driver *search_serial_device( + struct usb_interface *iface) + { +- const struct usb_device_id *id; ++ const struct usb_device_id *id = NULL; + struct usb_serial_driver *drv; ++ struct usb_driver *driver = to_usb_driver(iface->dev.driver); + + /* Check if the usb id matches a known device */ + list_for_each_entry(drv, &usb_serial_driver_list, driver_list) { +- id = get_iface_id(drv, iface); ++ if (drv->usb_driver == driver) ++ id = get_iface_id(drv, iface); + if (id) + return drv; + } +diff --git a/fs/fuse/dir.c b/fs/fuse/dir.c +index 9f63e49..5ef7afb 100644 +--- a/fs/fuse/dir.c ++++ b/fs/fuse/dir.c +@@ -858,6 +858,7 @@ int fuse_update_attributes(struct inode *inode, struct kstat *stat, + if (stat) { + generic_fillattr(inode, stat); + stat->mode = fi->orig_i_mode; ++ stat->ino = fi->orig_ino; + } + } + +diff --git a/fs/fuse/fuse_i.h b/fs/fuse/fuse_i.h +index cf6db0a..89c4a58 100644 +--- a/fs/fuse/fuse_i.h ++++ b/fs/fuse/fuse_i.h +@@ -82,6 +82,9 @@ struct fuse_inode { + preserve the original mode */ + mode_t orig_i_mode; + ++ /** 64 bit inode number */ ++ u64 orig_ino; ++ + /** Version of last attribute change */ + u64 attr_version; + +diff --git a/fs/fuse/inode.c b/fs/fuse/inode.c +index aa83109..1f82d95 100644 +--- a/fs/fuse/inode.c ++++ b/fs/fuse/inode.c +@@ -91,6 +91,7 @@ static struct inode *fuse_alloc_inode(struct super_block *sb) + fi->nlookup = 0; + fi->attr_version = 0; + fi->writectr = 0; ++ fi->orig_ino = 0; + INIT_LIST_HEAD(&fi->write_files); + INIT_LIST_HEAD(&fi->queued_writes); + INIT_LIST_HEAD(&fi->writepages); +@@ -140,6 +141,18 @@ static int fuse_remount_fs(struct super_block *sb, int *flags, char *data) + return 0; + } + ++/* ++ * ino_t is 32-bits on 32-bit arch. We have to squash the 64-bit value down ++ * so that it will fit. ++ */ ++static ino_t fuse_squash_ino(u64 ino64) ++{ ++ ino_t ino = (ino_t) ino64; ++ if (sizeof(ino_t) < sizeof(u64)) ++ ino ^= ino64 >> (sizeof(u64) - sizeof(ino_t)) * 8; ++ return ino; ++} ++ + void fuse_change_attributes_common(struct inode *inode, struct fuse_attr *attr, + u64 attr_valid) + { +@@ -149,7 +162,7 @@ void fuse_change_attributes_common(struct inode *inode, struct fuse_attr *attr, + fi->attr_version = ++fc->attr_version; + fi->i_time = attr_valid; + +- inode->i_ino = attr->ino; ++ inode->i_ino = fuse_squash_ino(attr->ino); + inode->i_mode = (inode->i_mode & S_IFMT) | (attr->mode & 07777); + set_nlink(inode, attr->nlink); + inode->i_uid = attr->uid; +@@ -175,6 +188,8 @@ void fuse_change_attributes_common(struct inode *inode, struct fuse_attr *attr, + fi->orig_i_mode = inode->i_mode; + if (!(fc->flags & FUSE_DEFAULT_PERMISSIONS)) + inode->i_mode &= ~S_ISVTX; ++ ++ fi->orig_ino = attr->ino; + } + + void fuse_change_attributes(struct inode *inode, struct fuse_attr *attr, +diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c +index a3cae5d..8000459 100644 +--- a/fs/nfs/nfs4proc.c ++++ b/fs/nfs/nfs4proc.c +@@ -1825,6 +1825,7 @@ static struct nfs4_state *nfs4_do_open(struct inode *dir, struct dentry *dentry, + struct nfs4_state *res; + int status; + ++ fmode &= FMODE_READ|FMODE_WRITE; + do { + status = _nfs4_do_open(dir, dentry, fmode, flags, sattr, cred, &res); + if (status == 0) +diff --git a/include/linux/pci.h b/include/linux/pci.h +index 7cda65b..c0cfa0d 100644 +--- a/include/linux/pci.h ++++ b/include/linux/pci.h +@@ -176,6 +176,8 @@ enum pci_dev_flags { + PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2, + /* Provide indication device is assigned by a Virtual Machine Manager */ + PCI_DEV_FLAGS_ASSIGNED = (__force pci_dev_flags_t) 4, ++ /* Device causes system crash if in D3 during S3 sleep */ ++ PCI_DEV_FLAGS_NO_D3_DURING_SLEEP = (__force pci_dev_flags_t) 8, + }; + + enum pci_irq_reroute_variant { +diff --git a/include/linux/swapops.h b/include/linux/swapops.h +index 2189d3f..d6955607 100644 +--- a/include/linux/swapops.h ++++ b/include/linux/swapops.h +@@ -8,13 +8,15 @@ + * get good packing density in that tree, so the index should be dense in + * the low-order bits. + * +- * We arrange the `type' and `offset' fields so that `type' is at the five ++ * We arrange the `type' and `offset' fields so that `type' is at the seven + * high-order bits of the swp_entry_t and `offset' is right-aligned in the +- * remaining bits. ++ * remaining bits. Although `type' itself needs only five bits, we allow for ++ * shmem/tmpfs to shift it all up a further two bits: see swp_to_radix_entry(). + * + * swp_entry_t's are *never* stored anywhere in their arch-dependent format. + */ +-#define SWP_TYPE_SHIFT(e) (sizeof(e.val) * 8 - MAX_SWAPFILES_SHIFT) ++#define SWP_TYPE_SHIFT(e) ((sizeof(e.val) * 8) - \ ++ (MAX_SWAPFILES_SHIFT + RADIX_TREE_EXCEPTIONAL_SHIFT)) + #define SWP_OFFSET_MASK(e) ((1UL << SWP_TYPE_SHIFT(e)) - 1) + + /* +diff --git a/include/linux/usb/hcd.h b/include/linux/usb/hcd.h +index 64cec8d..03354d5 100644 +--- a/include/linux/usb/hcd.h ++++ b/include/linux/usb/hcd.h +@@ -128,8 +128,6 @@ struct usb_hcd { + unsigned wireless:1; /* Wireless USB HCD */ + unsigned authorized_default:1; + unsigned has_tt:1; /* Integrated TT in root hub */ +- unsigned broken_pci_sleep:1; /* Don't put the +- controller in PCI-D3 for system sleep */ + + int irq; /* irq allocated */ + void __iomem *regs; /* device memory/io */ +diff --git a/kernel/sched.c b/kernel/sched.c +index 299f55c..576a27f 100644 +--- a/kernel/sched.c ++++ b/kernel/sched.c +@@ -7429,11 +7429,8 @@ int sched_domain_level_max; + + static int __init setup_relax_domain_level(char *str) + { +- unsigned long val; +- +- val = simple_strtoul(str, NULL, 0); +- if (val < sched_domain_level_max) +- default_relax_domain_level = val; ++ if (kstrtoint(str, 0, &default_relax_domain_level)) ++ pr_warn("Unable to set relax_domain_level\n"); + + return 1; + } +@@ -7636,7 +7633,6 @@ struct sched_domain *build_sched_domain(struct sched_domain_topology_level *tl, + if (!sd) + return child; + +- set_domain_attribute(sd, attr); + cpumask_and(sched_domain_span(sd), cpu_map, tl->mask(cpu)); + if (child) { + sd->level = child->level + 1; +@@ -7644,6 +7640,7 @@ struct sched_domain *build_sched_domain(struct sched_domain_topology_level *tl, + child->parent = sd; + } + sd->child = child; ++ set_domain_attribute(sd, attr); + + return sd; + } +diff --git a/mm/swapfile.c b/mm/swapfile.c +index d3955f2..fad1830 100644 +--- a/mm/swapfile.c ++++ b/mm/swapfile.c +@@ -1921,24 +1921,20 @@ static unsigned long read_swap_header(struct swap_info_struct *p, + + /* + * Find out how many pages are allowed for a single swap +- * device. There are three limiting factors: 1) the number ++ * device. There are two limiting factors: 1) the number + * of bits for the swap offset in the swp_entry_t type, and + * 2) the number of bits in the swap pte as defined by the +- * the different architectures, and 3) the number of free bits +- * in an exceptional radix_tree entry. In order to find the ++ * different architectures. In order to find the + * largest possible bit mask, a swap entry with swap type 0 + * and swap offset ~0UL is created, encoded to a swap pte, + * decoded to a swp_entry_t again, and finally the swap + * offset is extracted. This will mask all the bits from + * the initial ~0UL mask that can't be encoded in either + * the swp_entry_t or the architecture definition of a +- * swap pte. Then the same is done for a radix_tree entry. ++ * swap pte. + */ + maxpages = swp_offset(pte_to_swp_entry( +- swp_entry_to_pte(swp_entry(0, ~0UL)))); +- maxpages = swp_offset(radix_to_swp_entry( +- swp_to_radix_entry(swp_entry(0, maxpages)))) + 1; +- ++ swp_entry_to_pte(swp_entry(0, ~0UL)))) + 1; + if (maxpages > swap_header->info.last_page) { + maxpages = swap_header->info.last_page + 1; + /* p->max is an unsigned int: don't overflow it */ +diff --git a/net/mac80211/iface.c b/net/mac80211/iface.c +index 30d7355..f4ddf34 100644 +--- a/net/mac80211/iface.c ++++ b/net/mac80211/iface.c +@@ -495,6 +495,18 @@ static void ieee80211_do_stop(struct ieee80211_sub_if_data *sdata, + ieee80211_configure_filter(local); + break; + default: ++ mutex_lock(&local->mtx); ++ if (local->hw_roc_dev == sdata->dev && ++ local->hw_roc_channel) { ++ /* ignore return value since this is racy */ ++ drv_cancel_remain_on_channel(local); ++ ieee80211_queue_work(&local->hw, &local->hw_roc_done); ++ } ++ mutex_unlock(&local->mtx); ++ ++ flush_work(&local->hw_roc_start); ++ flush_work(&local->hw_roc_done); ++ + flush_work(&sdata->work); + /* + * When we get here, the interface is marked down. +diff --git a/net/mac80211/offchannel.c b/net/mac80211/offchannel.c +index 1b239be..db2c215 100644 +--- a/net/mac80211/offchannel.c ++++ b/net/mac80211/offchannel.c +@@ -246,6 +246,22 @@ static void ieee80211_hw_roc_done(struct work_struct *work) + return; + } + ++ /* was never transmitted */ ++ if (local->hw_roc_skb) { ++ u64 cookie; ++ ++ cookie = local->hw_roc_cookie ^ 2; ++ ++ cfg80211_mgmt_tx_status(local->hw_roc_dev, cookie, ++ local->hw_roc_skb->data, ++ local->hw_roc_skb->len, false, ++ GFP_KERNEL); ++ ++ kfree_skb(local->hw_roc_skb); ++ local->hw_roc_skb = NULL; ++ local->hw_roc_skb_for_status = NULL; ++ } ++ + if (!local->hw_roc_for_tx) + cfg80211_remain_on_channel_expired(local->hw_roc_dev, + local->hw_roc_cookie, +diff --git a/net/sunrpc/svc.c b/net/sunrpc/svc.c +index d4ad50e..c80c162 100644 +--- a/net/sunrpc/svc.c ++++ b/net/sunrpc/svc.c +@@ -1358,7 +1358,8 @@ bc_svc_process(struct svc_serv *serv, struct rpc_rqst *req, + sizeof(req->rq_snd_buf)); + return bc_send(req); + } else { +- /* Nothing to do to drop request */ ++ /* drop request */ ++ xprt_free_bc_request(req); + return 0; + } + } +diff --git a/net/wireless/util.c b/net/wireless/util.c +index 8bf8902..d38815d 100644 +--- a/net/wireless/util.c ++++ b/net/wireless/util.c +@@ -943,6 +943,7 @@ int cfg80211_can_change_interface(struct cfg80211_registered_device *rdev, + enum nl80211_iftype iftype) + { + struct wireless_dev *wdev_iter; ++ u32 used_iftypes = BIT(iftype); + int num[NUM_NL80211_IFTYPES]; + int total = 1; + int i, j; +@@ -976,12 +977,14 @@ int cfg80211_can_change_interface(struct cfg80211_registered_device *rdev, + + num[wdev_iter->iftype]++; + total++; ++ used_iftypes |= BIT(wdev_iter->iftype); + } + mutex_unlock(&rdev->devlist_mtx); + + for (i = 0; i < rdev->wiphy.n_iface_combinations; i++) { + const struct ieee80211_iface_combination *c; + struct ieee80211_iface_limit *limits; ++ u32 all_iftypes = 0; + + c = &rdev->wiphy.iface_combinations[i]; + +@@ -996,6 +999,7 @@ int cfg80211_can_change_interface(struct cfg80211_registered_device *rdev, + if (rdev->wiphy.software_iftypes & BIT(iftype)) + continue; + for (j = 0; j < c->n_limits; j++) { ++ all_iftypes |= limits[j].types; + if (!(limits[j].types & BIT(iftype))) + continue; + if (limits[j].max < num[iftype]) +@@ -1003,7 +1007,20 @@ int cfg80211_can_change_interface(struct cfg80211_registered_device *rdev, + limits[j].max -= num[iftype]; + } + } +- /* yay, it fits */ ++ ++ /* ++ * Finally check that all iftypes that we're currently ++ * using are actually part of this combination. If they ++ * aren't then we can't use this combination and have ++ * to continue to the next. ++ */ ++ if ((all_iftypes & used_iftypes) != used_iftypes) ++ goto cont; ++ ++ /* ++ * This combination covered all interface types and ++ * supported the requested numbers, so we're good. ++ */ + kfree(limits); + return 0; + cont: +diff --git a/sound/pci/hda/hda_codec.h b/sound/pci/hda/hda_codec.h +index 71f6744..78b2223 100644 +--- a/sound/pci/hda/hda_codec.h ++++ b/sound/pci/hda/hda_codec.h +@@ -858,6 +858,7 @@ struct hda_codec { + unsigned int pins_shutup:1; /* pins are shut up */ + unsigned int no_trigger_sense:1; /* don't trigger at pin-sensing */ + unsigned int ignore_misc_bit:1; /* ignore MISC_NO_PRESENCE bit */ ++ unsigned int no_jack_detect:1; /* Machine has no jack-detection */ + #ifdef CONFIG_SND_HDA_POWER_SAVE + unsigned int power_on :1; /* current (global) power-state */ + unsigned int power_transition :1; /* power-state in transition */ +diff --git a/sound/pci/hda/hda_local.h b/sound/pci/hda/hda_local.h +index 368f0c5..c78b753 100644 +--- a/sound/pci/hda/hda_local.h ++++ b/sound/pci/hda/hda_local.h +@@ -515,6 +515,8 @@ int snd_hda_jack_detect(struct hda_codec *codec, hda_nid_t nid); + + static inline bool is_jack_detectable(struct hda_codec *codec, hda_nid_t nid) + { ++ if (codec->no_jack_detect) ++ return false; + if (!(snd_hda_query_pin_caps(codec, nid) & AC_PINCAP_PRES_DETECT)) + return false; + if (!codec->ignore_misc_bit && +diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c +index 0bc5a46..0005bde 100644 +--- a/sound/pci/hda/patch_realtek.c ++++ b/sound/pci/hda/patch_realtek.c +@@ -5278,8 +5278,10 @@ static const struct hda_amp_list alc861_loopbacks[] = { + + /* Pin config fixes */ + enum { +- PINFIX_FSC_AMILO_PI1505, +- PINFIX_ASUS_A6RP, ++ ALC861_FIXUP_FSC_AMILO_PI1505, ++ ALC861_FIXUP_AMP_VREF_0F, ++ ALC861_FIXUP_NO_JACK_DETECT, ++ ALC861_FIXUP_ASUS_A6RP, + }; + + /* On some laptops, VREF of pin 0x0f is abused for controlling the main amp */ +@@ -5301,8 +5303,16 @@ static void alc861_fixup_asus_amp_vref_0f(struct hda_codec *codec, + spec->keep_vref_in_automute = 1; + } + ++/* suppress the jack-detection */ ++static void alc_fixup_no_jack_detect(struct hda_codec *codec, ++ const struct alc_fixup *fix, int action) ++{ ++ if (action == ALC_FIXUP_ACT_PRE_PROBE) ++ codec->no_jack_detect = 1; ++} ++ + static const struct alc_fixup alc861_fixups[] = { +- [PINFIX_FSC_AMILO_PI1505] = { ++ [ALC861_FIXUP_FSC_AMILO_PI1505] = { + .type = ALC_FIXUP_PINS, + .v.pins = (const struct alc_pincfg[]) { + { 0x0b, 0x0221101f }, /* HP */ +@@ -5310,16 +5320,29 @@ static const struct alc_fixup alc861_fixups[] = { + { } + } + }, +- [PINFIX_ASUS_A6RP] = { ++ [ALC861_FIXUP_AMP_VREF_0F] = { + .type = ALC_FIXUP_FUNC, + .v.func = alc861_fixup_asus_amp_vref_0f, + }, ++ [ALC861_FIXUP_NO_JACK_DETECT] = { ++ .type = ALC_FIXUP_FUNC, ++ .v.func = alc_fixup_no_jack_detect, ++ }, ++ [ALC861_FIXUP_ASUS_A6RP] = { ++ .type = ALC_FIXUP_FUNC, ++ .v.func = alc861_fixup_asus_amp_vref_0f, ++ .chained = true, ++ .chain_id = ALC861_FIXUP_NO_JACK_DETECT, ++ } + }; + + static const struct snd_pci_quirk alc861_fixup_tbl[] = { +- SND_PCI_QUIRK_VENDOR(0x1043, "ASUS laptop", PINFIX_ASUS_A6RP), +- SND_PCI_QUIRK(0x1584, 0x2b01, "Haier W18", PINFIX_ASUS_A6RP), +- SND_PCI_QUIRK(0x1734, 0x10c7, "FSC Amilo Pi1505", PINFIX_FSC_AMILO_PI1505), ++ SND_PCI_QUIRK(0x1043, 0x1393, "ASUS A6Rp", ALC861_FIXUP_ASUS_A6RP), ++ SND_PCI_QUIRK_VENDOR(0x1043, "ASUS laptop", ALC861_FIXUP_AMP_VREF_0F), ++ SND_PCI_QUIRK(0x1462, 0x7254, "HP DX2200", ALC861_FIXUP_NO_JACK_DETECT), ++ SND_PCI_QUIRK(0x1584, 0x2b01, "Haier W18", ALC861_FIXUP_AMP_VREF_0F), ++ SND_PCI_QUIRK(0x1584, 0x0000, "Uniwill ECS M31EI", ALC861_FIXUP_AMP_VREF_0F), ++ SND_PCI_QUIRK(0x1734, 0x10c7, "FSC Amilo Pi1505", ALC861_FIXUP_FSC_AMILO_PI1505), + {} + }; + +@@ -5571,6 +5594,8 @@ enum { + ALC662_FIXUP_ASUS_MODE6, + ALC662_FIXUP_ASUS_MODE7, + ALC662_FIXUP_ASUS_MODE8, ++ ALC662_FIXUP_NO_JACK_DETECT, ++ ALC662_FIXUP_ZOTAC_Z68, + }; + + static const struct alc_fixup alc662_fixups[] = { +@@ -5716,6 +5741,17 @@ static const struct alc_fixup alc662_fixups[] = { + .chained = true, + .chain_id = ALC662_FIXUP_SKU_IGNORE + }, ++ [ALC662_FIXUP_NO_JACK_DETECT] = { ++ .type = ALC_FIXUP_FUNC, ++ .v.func = alc_fixup_no_jack_detect, ++ }, ++ [ALC662_FIXUP_ZOTAC_Z68] = { ++ .type = ALC_FIXUP_PINS, ++ .v.pins = (const struct alc_pincfg[]) { ++ { 0x1b, 0x02214020 }, /* Front HP */ ++ { } ++ } ++ }, + }; + + static const struct snd_pci_quirk alc662_fixup_tbl[] = { +@@ -5724,10 +5760,12 @@ static const struct snd_pci_quirk alc662_fixup_tbl[] = { + SND_PCI_QUIRK(0x1025, 0x031c, "Gateway NV79", ALC662_FIXUP_SKU_IGNORE), + SND_PCI_QUIRK(0x1025, 0x038b, "Acer Aspire 8943G", ALC662_FIXUP_ASPIRE), + SND_PCI_QUIRK(0x103c, 0x1632, "HP RP5800", ALC662_FIXUP_HP_RP5800), ++ SND_PCI_QUIRK(0x1043, 0x8469, "ASUS mobo", ALC662_FIXUP_NO_JACK_DETECT), + SND_PCI_QUIRK(0x105b, 0x0cd6, "Foxconn", ALC662_FIXUP_ASUS_MODE2), + SND_PCI_QUIRK(0x144d, 0xc051, "Samsung R720", ALC662_FIXUP_IDEAPAD), + SND_PCI_QUIRK(0x17aa, 0x38af, "Lenovo Ideapad Y550P", ALC662_FIXUP_IDEAPAD), + SND_PCI_QUIRK(0x17aa, 0x3a0d, "Lenovo Ideapad Y550", ALC662_FIXUP_IDEAPAD), ++ SND_PCI_QUIRK(0x19da, 0xa130, "Zotac Z68", ALC662_FIXUP_ZOTAC_Z68), + SND_PCI_QUIRK(0x1b35, 0x2206, "CZC P10T", ALC662_FIXUP_CZC_P10T), + + #if 0 +diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c +index 3e7aa22..de61b8a 100644 +--- a/sound/soc/codecs/wm8994.c ++++ b/sound/soc/codecs/wm8994.c +@@ -41,6 +41,39 @@ + #define WM8994_NUM_DRC 3 + #define WM8994_NUM_EQ 3 + ++static struct { ++ unsigned int reg; ++ unsigned int mask; ++} wm8994_vu_bits[] = { ++ { WM8994_LEFT_LINE_INPUT_1_2_VOLUME, WM8994_IN1_VU }, ++ { WM8994_RIGHT_LINE_INPUT_1_2_VOLUME, WM8994_IN1_VU }, ++ { WM8994_LEFT_LINE_INPUT_3_4_VOLUME, WM8994_IN2_VU }, ++ { WM8994_RIGHT_LINE_INPUT_3_4_VOLUME, WM8994_IN2_VU }, ++ { WM8994_SPEAKER_VOLUME_LEFT, WM8994_SPKOUT_VU }, ++ { WM8994_SPEAKER_VOLUME_RIGHT, WM8994_SPKOUT_VU }, ++ { WM8994_LEFT_OUTPUT_VOLUME, WM8994_HPOUT1_VU }, ++ { WM8994_RIGHT_OUTPUT_VOLUME, WM8994_HPOUT1_VU }, ++ { WM8994_LEFT_OPGA_VOLUME, WM8994_MIXOUT_VU }, ++ { WM8994_RIGHT_OPGA_VOLUME, WM8994_MIXOUT_VU }, ++ ++ { WM8994_AIF1_DAC1_LEFT_VOLUME, WM8994_AIF1DAC1_VU }, ++ { WM8994_AIF1_DAC1_RIGHT_VOLUME, WM8994_AIF1DAC1_VU }, ++ { WM8994_AIF1_DAC2_LEFT_VOLUME, WM8994_AIF1DAC2_VU }, ++ { WM8994_AIF1_DAC2_RIGHT_VOLUME, WM8994_AIF1DAC2_VU }, ++ { WM8994_AIF2_DAC_LEFT_VOLUME, WM8994_AIF2DAC_VU }, ++ { WM8994_AIF2_DAC_RIGHT_VOLUME, WM8994_AIF2DAC_VU }, ++ { WM8994_AIF1_ADC1_LEFT_VOLUME, WM8994_AIF1ADC1_VU }, ++ { WM8994_AIF1_ADC1_RIGHT_VOLUME, WM8994_AIF1ADC1_VU }, ++ { WM8994_AIF1_ADC2_LEFT_VOLUME, WM8994_AIF1ADC2_VU }, ++ { WM8994_AIF1_ADC2_RIGHT_VOLUME, WM8994_AIF1ADC2_VU }, ++ { WM8994_AIF2_ADC_LEFT_VOLUME, WM8994_AIF2ADC_VU }, ++ { WM8994_AIF2_ADC_RIGHT_VOLUME, WM8994_AIF1ADC2_VU }, ++ { WM8994_DAC1_LEFT_VOLUME, WM8994_DAC1_VU }, ++ { WM8994_DAC1_RIGHT_VOLUME, WM8994_DAC1_VU }, ++ { WM8994_DAC2_LEFT_VOLUME, WM8994_DAC2_VU }, ++ { WM8994_DAC2_RIGHT_VOLUME, WM8994_DAC2_VU }, ++}; ++ + static int wm8994_drc_base[] = { + WM8994_AIF1_DRC1_1, + WM8994_AIF1_DRC2_1, +@@ -889,6 +922,7 @@ static int aif1clk_ev(struct snd_soc_dapm_widget *w, + struct snd_soc_codec *codec = w->codec; + struct wm8994 *control = codec->control_data; + int mask = WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC1R_ENA; ++ int i; + int dac; + int adc; + int val; +@@ -947,6 +981,13 @@ static int aif1clk_ev(struct snd_soc_dapm_widget *w, + WM8994_AIF1DAC2L_ENA); + break; + ++ case SND_SOC_DAPM_POST_PMU: ++ for (i = 0; i < ARRAY_SIZE(wm8994_vu_bits); i++) ++ snd_soc_write(codec, wm8994_vu_bits[i].reg, ++ snd_soc_read(codec, ++ wm8994_vu_bits[i].reg)); ++ break; ++ + case SND_SOC_DAPM_PRE_PMD: + case SND_SOC_DAPM_POST_PMD: + snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5, +@@ -972,6 +1013,7 @@ static int aif2clk_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) + { + struct snd_soc_codec *codec = w->codec; ++ int i; + int dac; + int adc; + int val; +@@ -1022,6 +1064,13 @@ static int aif2clk_ev(struct snd_soc_dapm_widget *w, + WM8994_AIF2DACR_ENA); + break; + ++ case SND_SOC_DAPM_POST_PMU: ++ for (i = 0; i < ARRAY_SIZE(wm8994_vu_bits); i++) ++ snd_soc_write(codec, wm8994_vu_bits[i].reg, ++ snd_soc_read(codec, ++ wm8994_vu_bits[i].reg)); ++ break; ++ + case SND_SOC_DAPM_PRE_PMD: + case SND_SOC_DAPM_POST_PMD: + snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5, +@@ -1090,17 +1139,19 @@ static int late_enable_ev(struct snd_soc_dapm_widget *w, + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + if (wm8994->aif1clk_enable) { +- aif1clk_ev(w, kcontrol, event); ++ aif1clk_ev(w, kcontrol, SND_SOC_DAPM_PRE_PMU); + snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, + WM8994_AIF1CLK_ENA_MASK, + WM8994_AIF1CLK_ENA); ++ aif1clk_ev(w, kcontrol, SND_SOC_DAPM_POST_PMU); + wm8994->aif1clk_enable = 0; + } + if (wm8994->aif2clk_enable) { +- aif2clk_ev(w, kcontrol, event); ++ aif2clk_ev(w, kcontrol, SND_SOC_DAPM_PRE_PMU); + snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, + WM8994_AIF2CLK_ENA_MASK, + WM8994_AIF2CLK_ENA); ++ aif2clk_ev(w, kcontrol, SND_SOC_DAPM_POST_PMU); + wm8994->aif2clk_enable = 0; + } + break; +@@ -1121,15 +1172,17 @@ static int late_disable_ev(struct snd_soc_dapm_widget *w, + switch (event) { + case SND_SOC_DAPM_POST_PMD: + if (wm8994->aif1clk_disable) { ++ aif1clk_ev(w, kcontrol, SND_SOC_DAPM_PRE_PMD); + snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, + WM8994_AIF1CLK_ENA_MASK, 0); +- aif1clk_ev(w, kcontrol, event); ++ aif1clk_ev(w, kcontrol, SND_SOC_DAPM_POST_PMD); + wm8994->aif1clk_disable = 0; + } + if (wm8994->aif2clk_disable) { ++ aif2clk_ev(w, kcontrol, SND_SOC_DAPM_PRE_PMD); + snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, + WM8994_AIF2CLK_ENA_MASK, 0); +- aif2clk_ev(w, kcontrol, event); ++ aif2clk_ev(w, kcontrol, SND_SOC_DAPM_POST_PMD); + wm8994->aif2clk_disable = 0; + } + break; +@@ -1466,9 +1519,11 @@ SND_SOC_DAPM_POST("Late Disable PGA", late_disable_ev) + + static const struct snd_soc_dapm_widget wm8994_lateclk_widgets[] = { + SND_SOC_DAPM_SUPPLY("AIF1CLK", WM8994_AIF1_CLOCKING_1, 0, 0, aif1clk_ev, +- SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), ++ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | ++ SND_SOC_DAPM_PRE_PMD), + SND_SOC_DAPM_SUPPLY("AIF2CLK", WM8994_AIF2_CLOCKING_1, 0, 0, aif2clk_ev, +- SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), ++ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | ++ SND_SOC_DAPM_PRE_PMD), + SND_SOC_DAPM_PGA("Direct Voice", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("SPKL", WM8994_POWER_MANAGEMENT_3, 8, 0, + left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)), +@@ -3482,39 +3537,11 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) + + wm8994_set_bias_level(codec, SND_SOC_BIAS_STANDBY); + +- /* Latch volume updates (right only; we always do left then right). */ +- snd_soc_update_bits(codec, WM8994_AIF1_DAC1_LEFT_VOLUME, +- WM8994_AIF1DAC1_VU, WM8994_AIF1DAC1_VU); +- snd_soc_update_bits(codec, WM8994_AIF1_DAC1_RIGHT_VOLUME, +- WM8994_AIF1DAC1_VU, WM8994_AIF1DAC1_VU); +- snd_soc_update_bits(codec, WM8994_AIF1_DAC2_LEFT_VOLUME, +- WM8994_AIF1DAC2_VU, WM8994_AIF1DAC2_VU); +- snd_soc_update_bits(codec, WM8994_AIF1_DAC2_RIGHT_VOLUME, +- WM8994_AIF1DAC2_VU, WM8994_AIF1DAC2_VU); +- snd_soc_update_bits(codec, WM8994_AIF2_DAC_LEFT_VOLUME, +- WM8994_AIF2DAC_VU, WM8994_AIF2DAC_VU); +- snd_soc_update_bits(codec, WM8994_AIF2_DAC_RIGHT_VOLUME, +- WM8994_AIF2DAC_VU, WM8994_AIF2DAC_VU); +- snd_soc_update_bits(codec, WM8994_AIF1_ADC1_LEFT_VOLUME, +- WM8994_AIF1ADC1_VU, WM8994_AIF1ADC1_VU); +- snd_soc_update_bits(codec, WM8994_AIF1_ADC1_RIGHT_VOLUME, +- WM8994_AIF1ADC1_VU, WM8994_AIF1ADC1_VU); +- snd_soc_update_bits(codec, WM8994_AIF1_ADC2_LEFT_VOLUME, +- WM8994_AIF1ADC2_VU, WM8994_AIF1ADC2_VU); +- snd_soc_update_bits(codec, WM8994_AIF1_ADC2_RIGHT_VOLUME, +- WM8994_AIF1ADC2_VU, WM8994_AIF1ADC2_VU); +- snd_soc_update_bits(codec, WM8994_AIF2_ADC_LEFT_VOLUME, +- WM8994_AIF2ADC_VU, WM8994_AIF1ADC2_VU); +- snd_soc_update_bits(codec, WM8994_AIF2_ADC_RIGHT_VOLUME, +- WM8994_AIF2ADC_VU, WM8994_AIF1ADC2_VU); +- snd_soc_update_bits(codec, WM8994_DAC1_LEFT_VOLUME, +- WM8994_DAC1_VU, WM8994_DAC1_VU); +- snd_soc_update_bits(codec, WM8994_DAC1_RIGHT_VOLUME, +- WM8994_DAC1_VU, WM8994_DAC1_VU); +- snd_soc_update_bits(codec, WM8994_DAC2_LEFT_VOLUME, +- WM8994_DAC2_VU, WM8994_DAC2_VU); +- snd_soc_update_bits(codec, WM8994_DAC2_RIGHT_VOLUME, +- WM8994_DAC2_VU, WM8994_DAC2_VU); ++ /* Latch volume update bits */ ++ for (i = 0; i < ARRAY_SIZE(wm8994_vu_bits); i++) ++ snd_soc_update_bits(codec, wm8994_vu_bits[i].reg, ++ wm8994_vu_bits[i].mask, ++ wm8994_vu_bits[i].mask); + + /* Set the low bit of the 3D stereo depth so TLV matches */ + snd_soc_update_bits(codec, WM8994_AIF1_DAC1_FILTERS_2, |