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authorJakov Smolić <jsmolic@gentoo.org>2024-07-19 18:51:15 +0200
committerJakov Smolić <jsmolic@gentoo.org>2024-07-19 19:01:48 +0200
commitc7004197a2f486c7807e7ae8c5fc2fba65816ac9 (patch)
tree94b934046c544bd2be0b5777bdf385fbeb1c3b93 /dev-libs/openssl
parentdev-ml/opam: drop 2.0.9, 2.0.10-r1 (diff)
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dev-libs/openssl: Fix riscv build issue in version 3.3.1
Closes: https://bugs.gentoo.org/936311 Signed-off-by: Jakov Smolić <jsmolic@gentoo.org>
Diffstat (limited to 'dev-libs/openssl')
-rw-r--r--dev-libs/openssl/files/openssl-3.3.1-riscv.patch96
-rw-r--r--dev-libs/openssl/openssl-3.3.1.ebuild2
2 files changed, 98 insertions, 0 deletions
diff --git a/dev-libs/openssl/files/openssl-3.3.1-riscv.patch b/dev-libs/openssl/files/openssl-3.3.1-riscv.patch
new file mode 100644
index 000000000000..90cad6d92a00
--- /dev/null
+++ b/dev-libs/openssl/files/openssl-3.3.1-riscv.patch
@@ -0,0 +1,96 @@
+# https://bugs.gentoo.org/936311
+# Taken from https://github.com/openssl/openssl/pull/24486
+
+From b1dd4a8005cf172053d986c0dd85fd104f005307 Mon Sep 17 00:00:00 2001
+From: Hongren Zheng <i@zenithal.me>
+Date: Fri, 24 May 2024 14:12:47 +0800
+Subject: [PATCH] riscv: Fix cpuid_obj asm checks for sm4/sm3
+
+Similar to #22881 / #23752
+---
+ crypto/sm3/sm3_local.h | 2 +-
+ include/crypto/sm4_platform.h | 2 +-
+ providers/implementations/ciphers/cipher_sm4_ccm_hw.c | 2 +-
+ providers/implementations/ciphers/cipher_sm4_gcm_hw.c | 2 +-
+ providers/implementations/ciphers/cipher_sm4_hw.c | 2 +-
+ providers/implementations/ciphers/cipher_sm4_xts_hw.c | 2 +-
+ 6 files changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/crypto/sm3/sm3_local.h b/crypto/sm3/sm3_local.h
+index d2845f9678967..a467cc98eb13e 100644
+--- a/crypto/sm3/sm3_local.h
++++ b/crypto/sm3/sm3_local.h
+@@ -39,7 +39,7 @@
+ # define HWSM3_CAPABLE (OPENSSL_armcap_P & ARMV8_SM3)
+ void ossl_hwsm3_block_data_order(SM3_CTX *c, const void *p, size_t num);
+ # endif
+-# if defined(__riscv) && __riscv_xlen == 64
++# if defined(OPENSSL_CPUID_OBJ) && defined(__riscv) && __riscv_xlen == 64
+ # include "crypto/riscv_arch.h"
+ # define HWSM3_CAPABLE 1
+ void ossl_hwsm3_block_data_order(SM3_CTX *c, const void *p, size_t num);
+diff --git a/include/crypto/sm4_platform.h b/include/crypto/sm4_platform.h
+index 928dc17ff0838..4d70d291450a1 100644
+--- a/include/crypto/sm4_platform.h
++++ b/include/crypto/sm4_platform.h
+@@ -38,7 +38,7 @@ static inline int vpsm4_ex_capable(void)
+ # define HWSM4_cbc_encrypt sm4_v8_cbc_encrypt
+ # define HWSM4_ecb_encrypt sm4_v8_ecb_encrypt
+ # define HWSM4_ctr32_encrypt_blocks sm4_v8_ctr32_encrypt_blocks
+-# elif defined(__riscv) && __riscv_xlen == 64
++# elif defined(OPENSSL_CPUID_OBJ) && defined(__riscv) && __riscv_xlen == 64
+ /* RV64 support */
+ # include "riscv_arch.h"
+ /* Zvksed extension (vector crypto SM4). */
+diff --git a/providers/implementations/ciphers/cipher_sm4_ccm_hw.c b/providers/implementations/ciphers/cipher_sm4_ccm_hw.c
+index 34f0e751e007d..293bb69d64272 100644
+--- a/providers/implementations/ciphers/cipher_sm4_ccm_hw.c
++++ b/providers/implementations/ciphers/cipher_sm4_ccm_hw.c
+@@ -59,7 +59,7 @@ static const PROV_CCM_HW ccm_sm4 = {
+ ossl_ccm_generic_gettag
+ };
+
+-#if defined(__riscv) && __riscv_xlen == 64
++#if defined(OPENSSL_CPUID_OBJ) && defined(__riscv) && __riscv_xlen == 64
+ # include "cipher_sm4_ccm_hw_rv64i.inc"
+ #else
+ const PROV_CCM_HW *ossl_prov_sm4_hw_ccm(size_t keybits)
+diff --git a/providers/implementations/ciphers/cipher_sm4_gcm_hw.c b/providers/implementations/ciphers/cipher_sm4_gcm_hw.c
+index 06ca450782ff2..e3b4e9f588807 100644
+--- a/providers/implementations/ciphers/cipher_sm4_gcm_hw.c
++++ b/providers/implementations/ciphers/cipher_sm4_gcm_hw.c
+@@ -89,7 +89,7 @@ static const PROV_GCM_HW sm4_gcm = {
+ ossl_gcm_one_shot
+ };
+
+-#if defined(__riscv) && __riscv_xlen == 64
++#if defined(OPENSSL_CPUID_OBJ) && defined(__riscv) && __riscv_xlen == 64
+ # include "cipher_sm4_gcm_hw_rv64i.inc"
+ #else
+ const PROV_GCM_HW *ossl_prov_sm4_hw_gcm(size_t keybits)
+diff --git a/providers/implementations/ciphers/cipher_sm4_hw.c b/providers/implementations/ciphers/cipher_sm4_hw.c
+index c4f2f97cccd8d..70dc66ffae233 100644
+--- a/providers/implementations/ciphers/cipher_sm4_hw.c
++++ b/providers/implementations/ciphers/cipher_sm4_hw.c
+@@ -134,7 +134,7 @@ const PROV_CIPHER_HW *ossl_prov_cipher_hw_sm4_##mode(size_t keybits) \
+ return &sm4_##mode; \
+ }
+
+-#if defined(__riscv) && __riscv_xlen == 64
++#if defined(OPENSSL_CPUID_OBJ) && defined(__riscv) && __riscv_xlen == 64
+ # include "cipher_sm4_hw_rv64i.inc"
+ #else
+ /* The generic case */
+diff --git a/providers/implementations/ciphers/cipher_sm4_xts_hw.c b/providers/implementations/ciphers/cipher_sm4_xts_hw.c
+index 6cf58e851f5d4..423598317d217 100644
+--- a/providers/implementations/ciphers/cipher_sm4_xts_hw.c
++++ b/providers/implementations/ciphers/cipher_sm4_xts_hw.c
+@@ -89,7 +89,7 @@ static const PROV_CIPHER_HW sm4_generic_xts = {
+ cipher_hw_sm4_xts_copyctx
+ };
+
+-#if defined(__riscv) && __riscv_xlen == 64
++#if defined(OPENSSL_CPUID_OBJ) && defined(__riscv) && __riscv_xlen == 64
+ # include "cipher_sm4_xts_hw_rv64i.inc"
+ #else
+ const PROV_CIPHER_HW *ossl_prov_cipher_hw_sm4_xts(size_t keybits)
diff --git a/dev-libs/openssl/openssl-3.3.1.ebuild b/dev-libs/openssl/openssl-3.3.1.ebuild
index bc558bb65a06..d348842d29b0 100644
--- a/dev-libs/openssl/openssl-3.3.1.ebuild
+++ b/dev-libs/openssl/openssl-3.3.1.ebuild
@@ -57,6 +57,8 @@ MULTILIB_WRAPPED_HEADERS=(
)
PATCHES=(
+ # bug 936311, drop on next version bump
+ "${FILESDIR}"/${P}-riscv.patch
)
pkg_setup() {