x11-drivers/xf86-video-i810: add patches from the upcoming 2.4.1

Package-Manager: portage-2.2_rc6/cvs/Linux 2.6.25-gentoo-r6 x86_64

11 files changed, 448 insertions, 2 deletions

diff --git a/x11-drivers/xf86-video-i810/ChangeLog b/x11-drivers/xf86-video-i810/ChangeLog
index 884d425a3e30..850fa1c887d5 100644
--- a/x11-drivers/xf86-video-i810/ChangeLog
+++ b/x11-drivers/xf86-video-i810/ChangeLog
@@ -1,6 +1,20 @@
 # ChangeLog for x11-drivers/xf86-video-i810
 # Copyright 1999-2008 Gentoo Foundation; Distributed under the GPL v2
-# $Header: /var/cvsroot/gentoo-x86/x11-drivers/xf86-video-i810/ChangeLog,v 1.97 2008/08/03 21:50:55 remi Exp $
+# $Header: /var/cvsroot/gentoo-x86/x11-drivers/xf86-video-i810/ChangeLog,v 1.98 2008/08/11 09:17:51 remi Exp $
+
+*xf86-video-i810-2.4.0-r1 (11 Aug 2008)
+
+  11 Aug 2008; Rémi Cardona <remi@gentoo.org>
+  +files/2.4.0/0007-Disable-display-clock-gating-for-4-series-chips.patch,
+  +files/2.4.0/0001-Update-DSPARB-while-planes-are-still-off.patch,
+  +files/2.4.0/0002-Reorder-visuals-reported-by-the-intel-driver.patch,
+  +files/2.4.0/0003-Don-t-program-dsparb-on-new-Intel-chip.patch,
+  +files/2.4.0/0004-Fix-SDVO-reg-definition.patch,
+  +files/2.4.0/0005-Fix-up-the-HP-Pavilion-ze4944ea-quirk.patch,
+  +files/2.4.0/0008-Fix-possible-spurious-interrupts-in-hotplug-detect-o.pat
+  ch, +files/2.4.0/0006-Fix-SDVO-HDMI-encoding-detect-16920.patch,
+  +xf86-video-i810-2.4.0-r1.ebuild:
+  add patches from the upcoming 2.4.1
 
 *xf86-video-i810-2.4.0 (03 Aug 2008)
 
diff --git a/x11-drivers/xf86-video-i810/Manifest b/x11-drivers/xf86-video-i810/Manifest
index 2188a38b882e..3bbd5aae72ae 100644
--- a/x11-drivers/xf86-video-i810/Manifest
+++ b/x11-drivers/xf86-video-i810/Manifest
@@ -26,6 +26,14 @@ AUX 2.3.1/0022-Fix-TV-programming-add-vblank-wait-after-TV_CTL-wr.patch 1236 RMD
 AUX 2.3.1/0023-Two-more-Dell-quirks.patch 1382 RMD160 029fc98641dabb2ea268268649f0215b22cb6502 SHA1 a1f7bfac3ed0df71816f2eda7908cf8e575cb1f3 SHA256 9773277474bf50a441a96a4f22b0c4c685cb628ef9a6e6a2c6419e9689da5046
 AUX 2.3.1/0024-Set-up-restore-PWRCTXA-from-enter-leavevt-not-server.patch 2320 RMD160 4b68ce5535f6ce328af9454f7325e74c36ed5f92 SHA1 e94653f0f0d21f3fc850c2f8a510835a851c7308 SHA256 3b82228ce6fad78c3accae720dcc359c5b0745e9545dcddf0e3537f1cdc9098b
 AUX 2.3.1/0025-Fix-compiler-warning-when-disable-xvmc-config.patch 646 RMD160 3a3651c1843d5b152d45742dfa8085250502dc7f SHA1 8e3bd4821e9670cde100a9ef3ef0e9be5af3076c SHA256 f75a3a3588d65aba333fe0a9bae12eb2a6b0e3ed49da6602ffad06bc52b27c74
+AUX 2.4.0/0001-Update-DSPARB-while-planes-are-still-off.patch 1058 RMD160 d611b146d49c5f1f21b1d65d8f57d459386bd547 SHA1 9ebc83e50a6fad216028df249ed39de8298ed545 SHA256 a66739c6416bfa5ad27ad2ef3d00047a26ad4236ac817362c06b7dc29cb042a5
+AUX 2.4.0/0002-Reorder-visuals-reported-by-the-intel-driver.patch 1161 RMD160 c3f177688c4c38236ae1d30169e8ab1493b72736 SHA1 3b37638d20ea7d61f6d49b48c66f6b1723693a62 SHA256 584978d05403286f685bb631c0abf85b31eb612b4b52c064b30f55de64dc8172
+AUX 2.4.0/0003-Don-t-program-dsparb-on-new-Intel-chip.patch 2524 RMD160 57f04693eceb9633468b7171ff4c2764d1345d2b SHA1 7e7ac299045bd27f469627aafa9a4a462b954b1d SHA256 5252232f7a432b5422cb0c2a00c5a57f1b69b1653d23b8bc506669e04d921407
+AUX 2.4.0/0004-Fix-SDVO-reg-definition.patch 2526 RMD160 6e62b42d5b2952e13c5c7e21e524d1cb365a3b9d SHA1 871cdfd87eb0b1a76e51a2a95afb0a5dae1d382b SHA256 f01f2d51268d325a175efbaec5d1b3ff2dc37660d48b178d6c7c5e1ac803a5ef
+AUX 2.4.0/0005-Fix-up-the-HP-Pavilion-ze4944ea-quirk.patch 1359 RMD160 7ba63506b8116f11313873c2713a10f0b9632d3c SHA1 e6b95e4852587b00b8d35f5364968a1d5cb58f9f SHA256 c2b2df9ab26684241591cc8f5f497ef4f33e7db526016e21105a4e7808d0a71e
+AUX 2.4.0/0006-Fix-SDVO-HDMI-encoding-detect-16920.patch 2836 RMD160 7998b46b81c56ec3471e3ab4cb6e7ad6d5622961 SHA1 6c926f3d628f21c64d8ca10fff3a2d16db4032ff SHA256 34a93cf53bd62d4a4f472c2fa409ae1df5a527c245cd862e43ab9b8e4ae54515
+AUX 2.4.0/0007-Disable-display-clock-gating-for-4-series-chips.patch 744 RMD160 44b7abf6890d9f898cfb330f1918746e41c10fbe SHA1 c9a1afac69a02b2905de16bc4ca9c7c627adc37e SHA256 cb8e48ab2a6b3d1cc7e633ea0d1a4b45576ef5f1350c08762ff1d5d33a48173e
+AUX 2.4.0/0008-Fix-possible-spurious-interrupts-in-hotplug-detect-o.patch 1238 RMD160 1d51e2d26487d8841f11951e7b99bff43139aac8 SHA1 2befec320daea8b6a94ecb774ba0527e3b78af03 SHA256 f34846c64ea31be74240d4ea4f7309c6116c48bf6c8c039450413ecbcb6c6d10
 AUX i810.xinf 1442 RMD160 38dff5ef3b6548c9fdea8f6df2b607eee8f670f2 SHA1 cf0b700f6fa0734ea56ff9a167098649d8e3767e SHA256 c690ba8705e21394dcb927f4a5499c7dbdba492042d7d54eb3c21daf5d326347
 AUX xf86-video-i810-2.1.1-fix_build_without_dri.patch 1207 RMD160 8f562c70bb6f0612981bacf28bd0bc005d358cf3 SHA1 226de2c0d345099c3eb4eb48fddd37c384b5557c SHA256 48d2864503d3bc756fcb766cd61a7e0f4b71bfa0fbe78b3a22bf46cf6249ee61
 DIST xf86-video-i810-1.6.5.tar.bz2 439503 RMD160 1a55fdfe89f855dd7bf1e16619c89da42383eef6 SHA1 7d9cf4fa18ec6dd7eefcb1589675c7bcffa384d0 SHA256 30d0cd555d8b8b5bb53d93eaae1ad2aecb5c94a760e2346d60b6e194c254e40f
@@ -41,6 +49,7 @@ EBUILD xf86-video-i810-2.1.1.ebuild 1248 RMD160 c527823789e4446ab2fe5202e9f88a78
 EBUILD xf86-video-i810-2.2.0.90.ebuild 1184 RMD160 9afd30f21c9112b2a70c8d6318465839de7ea4b9 SHA1 f7afbc5a7bfca23defa9e36e633563c5e24ddd93 SHA256 d763f3f3795fd8999daa9c3386e9c2f6408006eb3c2cfc3242aa31c8686bbab2
 EBUILD xf86-video-i810-2.2.1.ebuild 1246 RMD160 784e0fb29f68161a01f9f330caad8fb241196b66 SHA1 d8c938d8b33e97e79a36ad9481553ba54405eee8 SHA256 287b7127f3635d35b05dc6ec57fe9c3667b9d8dac586f0df782292c57de7bd4d
 EBUILD xf86-video-i810-2.3.2.ebuild 1243 RMD160 a181cae7052a45d4c0d311c0bfbffb000adf8726 SHA1 aeb643b781acec378b8adde57cf9b7cd8659b732 SHA256 267edfdebab39955765c314f04d59583bcfdb9952aed5d42f2b7f339863a7e9b
+EBUILD xf86-video-i810-2.4.0-r1.ebuild 1768 RMD160 f57afc77581e5b63e3c1ac3cb3a76044e962d765 SHA1 c2198086ad559d0399b87f407b9669655b656b93 SHA256 19770063197640f4800a0b8692d10d79bcfc858863f730370902401a06235b98
 EBUILD xf86-video-i810-2.4.0.ebuild 1180 RMD160 633eba78ab222a0390fbf9780c60fc686c5eac5a SHA1 7133103f35d9d6b6e7a7e60ba8c9314128cb9151 SHA256 fcec2f0345c9f1fd3496f8d356f044fc453b9013d6788a2b7457300cc0cb5bd0
-MISC ChangeLog 20025 RMD160 2d3fc8c3489ddb7b8c0de0a0ab2a6876a9cd3adc SHA1 f543ee228010c2be1ba4125998617a3a67773e9c SHA256 c2bc62df3e091316e1a22f6050ff62f5c8e16970ea9fddbdf718a0a8efc3227a
+MISC ChangeLog 20729 RMD160 67a317f7a0cff18cf611b53068ada185a0e088b5 SHA1 2c0a089dfa6299bdfaec9331d50f3216bbf06627 SHA256 8f5d2adcf7a99ca4c4b0d72401470bceecf9f959b7ba08890ecc47dd17cd9fb8
 MISC metadata.xml 248 RMD160 1bc22252fb59ed171fe013e765baa171151843cf SHA1 1df26c31e85768bb440888be23ba6fdcb421843d SHA256 a52fe0f6937ba347182a10ae3c710ee5524086af9b011567f5629ba165bf7dcd
diff --git a/x11-drivers/xf86-video-i810/files/2.4.0/0001-Update-DSPARB-while-planes-are-still-off.patch b/x11-drivers/xf86-video-i810/files/2.4.0/0001-Update-DSPARB-while-planes-are-still-off.patch
new file mode 100644
index 000000000000..acfb71f0f8f0
--- /dev/null
+++ b/x11-drivers/xf86-video-i810/files/2.4.0/0001-Update-DSPARB-while-planes-are-still-off.patch
@@ -0,0 +1,32 @@
+From c0c63c9d8329d93288dc12a05fe0ba3cf71fd5af Mon Sep 17 00:00:00 2001
+From: Jesse Barnes <jbarnes@hobbes.lan>
+Date: Thu, 31 Jul 2008 13:07:20 -0700
+Subject: [PATCH] Update DSPARB while planes are still off
+
+This avoids the flickering people reported in the 2.4.0 release.
+
+diff --git a/src/i830_display.c b/src/i830_display.c
+index 6176447..2a267f1 100644
+--- a/src/i830_display.c
++++ b/src/i830_display.c
+@@ -1477,6 +1477,8 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
+     /* Wait for the clocks to stabilize. */
+     usleep(150);
+ 
++    i830_update_dsparb(pScrn);
++
+     OUTREG(htot_reg, (adjusted_mode->CrtcHDisplay - 1) |
+ 	((adjusted_mode->CrtcHTotal - 1) << 16));
+     OUTREG(hblank_reg, (adjusted_mode->CrtcHBlankStart - 1) |
+@@ -1510,8 +1512,6 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
+     
+     i830WaitForVblank(pScrn);
+ 
+-    i830_update_dsparb(pScrn);
+-
+     /* Clear any FIFO underrun status that may have occurred normally */
+     OUTREG(pipestat_reg, INREG(pipestat_reg) | FIFO_UNDERRUN);
+ }
+-- 
+1.5.6.4
+
diff --git a/x11-drivers/xf86-video-i810/files/2.4.0/0002-Reorder-visuals-reported-by-the-intel-driver.patch b/x11-drivers/xf86-video-i810/files/2.4.0/0002-Reorder-visuals-reported-by-the-intel-driver.patch
new file mode 100644
index 000000000000..a40c9a683e46
--- /dev/null
+++ b/x11-drivers/xf86-video-i810/files/2.4.0/0002-Reorder-visuals-reported-by-the-intel-driver.patch
@@ -0,0 +1,29 @@
+From 42e96f1d02ef6d842db6ba68353558a11d7d66e9 Mon Sep 17 00:00:00 2001
+From: Tomas Carnecky <tom@dbservice.com>
+Date: Sun, 15 Jun 2008 14:27:16 +0200
+Subject: [PATCH] Reorder visuals reported by the intel driver
+
+The root window visual can not be changed. Neither at runtime nor
+through the configuration file. The xserver simply selects the first one
+that matches the class (usually TrueColor). I need a root window visual
+with stencil buffer because my compiz plugin uses the it for some
+operations. This patch reorders the visuals that the 3D driver reports
+and puts the one with stencil (and depth) bits as first.
+(cherry picked from commit 42fb06f3f14fbec070350cf48361be4a0be0af04)
+
+diff --git a/src/i830_dri.c b/src/i830_dri.c
+index 4361ad0..6bc4957 100644
+--- a/src/i830_dri.c
++++ b/src/i830_dri.c
+@@ -386,7 +386,7 @@ I830InitVisualConfigs(ScreenPtr pScreen)
+ 
+       i = 0;
+       for (accum = 0; accum <= 1; accum++) {
+-	 for (depth = 0; depth <= 1; depth++) {	/* and stencil */
++	 for (depth = 1; depth >= 0; depth--) {	/* and stencil */
+ 	    for (db = 1; db >= 0; db--) {
+ 	       pConfigs[i].vid = -1;
+ 	       pConfigs[i].class = -1;
+-- 
+1.5.6.4
+
diff --git a/x11-drivers/xf86-video-i810/files/2.4.0/0003-Don-t-program-dsparb-on-new-Intel-chip.patch b/x11-drivers/xf86-video-i810/files/2.4.0/0003-Don-t-program-dsparb-on-new-Intel-chip.patch
new file mode 100644
index 000000000000..960c6d6749b9
--- /dev/null
+++ b/x11-drivers/xf86-video-i810/files/2.4.0/0003-Don-t-program-dsparb-on-new-Intel-chip.patch
@@ -0,0 +1,70 @@
+From 01bbbd8c6c73229b5cb0c88e8eb2ac9b49a5dad8 Mon Sep 17 00:00:00 2001
+From: Zhenyu Wang <zhenyu.z.wang@intel.com>
+Date: Thu, 31 Jul 2008 13:13:45 +0800
+Subject: [PATCH] Don't program dsparb on new Intel chip
+
+On new chip, DSPARB is controlled by hardware only.
+
+diff --git a/src/common.h b/src/common.h
+index 57db6cb..f2ae502 100644
+--- a/src/common.h
++++ b/src/common.h
+@@ -374,6 +374,8 @@ extern int I810_DEBUG;
+ /* chipsets require status page in non stolen memory */
+ #define HWS_NEED_NONSTOLEN(pI810) (IS_GM45(pI810) || IS_G4X(pI810))
+ #define SUPPORTS_INTEGRATED_HDMI(pI810) (IS_GM45(pI810) || IS_G4X(pI810))
++/* dsparb controlled by hw only */
++#define DSPARB_HWCONTROL(pI810) (IS_G4X(pI810) || IS_GM45(pI810))
+ 
+ #define GTT_PAGE_SIZE			KB(4)
+ #define ROUND_TO(x, y)			(((x) + (y) - 1) / (y) * (y))
+diff --git a/src/i830_display.c b/src/i830_display.c
+index 2a267f1..e1dad03 100644
+--- a/src/i830_display.c
++++ b/src/i830_display.c
+@@ -1477,7 +1477,8 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
+     /* Wait for the clocks to stabilize. */
+     usleep(150);
+ 
+-    i830_update_dsparb(pScrn);
++    if (!DSPARB_HWCONTROL(pI830))
++	i830_update_dsparb(pScrn);
+ 
+     OUTREG(htot_reg, (adjusted_mode->CrtcHDisplay - 1) |
+ 	((adjusted_mode->CrtcHTotal - 1) << 16));
+diff --git a/src/i830_driver.c b/src/i830_driver.c
+index 4bb9b81..f5aa114 100644
+--- a/src/i830_driver.c
++++ b/src/i830_driver.c
+@@ -2018,7 +2018,8 @@ SaveHWState(ScrnInfoPtr pScrn)
+    }
+ 
+    /* Save video mode information for native mode-setting. */
+-   pI830->saveDSPARB = INREG(DSPARB);
++   if (!DSPARB_HWCONTROL(pI830))
++       pI830->saveDSPARB = INREG(DSPARB);
+ 
+    pI830->saveDSPACNTR = INREG(DSPACNTR);
+    pI830->savePIPEACONF = INREG(PIPEACONF);
+@@ -2161,7 +2162,8 @@ RestoreHWState(ScrnInfoPtr pScrn)
+    if (!IS_I830(pI830) && !IS_845G(pI830))
+      OUTREG(PFIT_CONTROL, pI830->savePFIT_CONTROL);
+ 
+-   OUTREG(DSPARB, pI830->saveDSPARB);
++   if (!DSPARB_HWCONTROL(pI830))
++       OUTREG(DSPARB, pI830->saveDSPARB);
+ 
+    OUTREG(DSPCLK_GATE_D, pI830->saveDSPCLK_GATE_D);
+    OUTREG(RENCLK_GATE_D1, pI830->saveRENCLK_GATE_D1);
+@@ -2512,7 +2514,7 @@ I830BlockHandler(int i,
+      * (except for mode setting, where it may occur naturally).
+      * Check & ack the condition.
+      */
+-    if (pScrn->vtSema) {
++    if (pScrn->vtSema && !DSPARB_HWCONTROL(pI830)) {
+ 	if (xf86_config->crtc[0]->enabled &&
+ 		(INREG(PIPEASTAT) & FIFO_UNDERRUN)) {
+ 	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "underrun on pipe A!\n");
+-- 
+1.5.6.4
+
diff --git a/x11-drivers/xf86-video-i810/files/2.4.0/0004-Fix-SDVO-reg-definition.patch b/x11-drivers/xf86-video-i810/files/2.4.0/0004-Fix-SDVO-reg-definition.patch
new file mode 100644
index 000000000000..5d3e18e75ea4
--- /dev/null
+++ b/x11-drivers/xf86-video-i810/files/2.4.0/0004-Fix-SDVO-reg-definition.patch
@@ -0,0 +1,60 @@
+From dbb288d55a071a44eed1c9e21f5f835f416327be Mon Sep 17 00:00:00 2001
+From: Zhenyu Wang <zhenyu.z.wang@intel.com>
+Date: Thu, 31 Jul 2008 16:59:43 +0800
+Subject: [PATCH] Fix SDVO reg definition
+
+Remove wrong set tv resolution command, adding HDMI regs in dump.
+(cherry picked from commit 76eb8e6f1f0c6962b23550564f4273f392567857)
+
+diff --git a/src/i830_sdvo.c b/src/i830_sdvo.c
+index d9b76d4..701aeaa 100644
+--- a/src/i830_sdvo.c
++++ b/src/i830_sdvo.c
+@@ -228,23 +228,30 @@ const static struct _sdvo_cmd_name {
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODER_POWER_STATE),
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
+-    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_RESOLUTION_SUPPORT),
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
+     /* HDMI op code */
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
++    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
++    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
++    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
++    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
++    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
+     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
++    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
++    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
++    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
+ };
+ 
+ static I2CSlaveAddr slaveAddr;
+diff --git a/src/i830_sdvo_regs.h b/src/i830_sdvo_regs.h
+index 747f2cd..4d55555 100644
+--- a/src/i830_sdvo_regs.h
++++ b/src/i830_sdvo_regs.h
+@@ -503,8 +503,6 @@ struct i830_sdvo_enhancements_arg {
+ # define SDVO_DITHER_ON						(1 << 0)
+ # define SDVO_DITHER_DEFAULT_ON					(1 << 1)
+ 
+-#define SDVO_CMD_SET_TV_RESOLUTION_SUPPORT		0x93
+-
+ #define SDVO_CMD_SET_CONTROL_BUS_SWITCH			0x7a
+ # define SDVO_CONTROL_BUS_PROM				(1 << 0)
+ # define SDVO_CONTROL_BUS_DDC1				(1 << 1)
+-- 
+1.5.6.4
+
diff --git a/x11-drivers/xf86-video-i810/files/2.4.0/0005-Fix-up-the-HP-Pavilion-ze4944ea-quirk.patch b/x11-drivers/xf86-video-i810/files/2.4.0/0005-Fix-up-the-HP-Pavilion-ze4944ea-quirk.patch
new file mode 100644
index 000000000000..d938b1cbed9b
--- /dev/null
+++ b/x11-drivers/xf86-video-i810/files/2.4.0/0005-Fix-up-the-HP-Pavilion-ze4944ea-quirk.patch
@@ -0,0 +1,33 @@
+From 6aeea1a7abd05745fab666b8fadab94caed6d53a Mon Sep 17 00:00:00 2001
+From: Julien Cristau <jcristau@debian.org>
+Date: Mon, 4 Aug 2008 12:18:12 +0200
+Subject: [PATCH] Fix up the HP Pavilion ze4944ea quirk
+
+The chip is 855GM, not GM45.
+(cherry picked from commit 1a59cc6b9acf312de1755d67757bf7f1967342e4)
+
+diff --git a/src/i830_quirks.c b/src/i830_quirks.c
+index 5ae2898..6fc8e53 100644
+--- a/src/i830_quirks.c
++++ b/src/i830_quirks.c
+@@ -271,8 +271,6 @@ static i830_quirk i830_quirk_list[] = {
+ 
+     /* HP Compaq 6730s has no TV output */
+     { PCI_CHIP_GM45_GM, 0x103c, 0x30e8, quirk_ignore_tv },
+-    /* HP Pavilion ze4944ea needs pipe A force quirk (See LP: #242389) */
+-    { PCI_CHIP_GM45_GM, 0x103c, 0x3084, quirk_pipea_force },
+ 
+     /* Thinkpad R31 needs pipe A force quirk */
+     { PCI_CHIP_I830_M, 0x1014, 0x0505, quirk_pipea_force },
+@@ -292,6 +290,8 @@ static i830_quirk i830_quirk_list[] = {
+     { PCI_CHIP_I855_GM, 0x1028, 0x00c8, quirk_pipea_force },
+     /* Intel 855GM hardware (See Novell Bugzilla #406123) */
+     { PCI_CHIP_I855_GM, 0x10cf, 0x1215, quirk_pipea_force },
++    /* HP Pavilion ze4944ea needs pipe A force quirk (See LP: #242389) */
++    { PCI_CHIP_I855_GM, 0x103c, 0x3084, quirk_pipea_force },
+ 
+     /* ThinkPad X40 needs pipe A force quirk */
+     { PCI_CHIP_I855_GM, 0x1014, 0x0557, quirk_pipea_force },
+-- 
+1.5.6.4
+
diff --git a/x11-drivers/xf86-video-i810/files/2.4.0/0006-Fix-SDVO-HDMI-encoding-detect-16920.patch b/x11-drivers/xf86-video-i810/files/2.4.0/0006-Fix-SDVO-HDMI-encoding-detect-16920.patch
new file mode 100644
index 000000000000..4d53e8d28d20
--- /dev/null
+++ b/x11-drivers/xf86-video-i810/files/2.4.0/0006-Fix-SDVO-HDMI-encoding-detect-16920.patch
@@ -0,0 +1,81 @@
+From 2b0705993a151b24c82d7955eed1c9c17ee0d8bd Mon Sep 17 00:00:00 2001
+From: Zhenyu Wang <zhenyu.z.wang@intel.com>
+Date: Wed, 6 Aug 2008 16:19:29 +0800
+Subject: [PATCH] Fix SDVO HDMI encoding detect (#16920)
+
+Check return value of get supported encode command and current
+encoding mode, which could be DVI or HDMI.
+(cherry picked from commit f91134795b545c8baebf218975b261c76a0e5873)
+
+diff --git a/src/i830_sdvo.c b/src/i830_sdvo.c
+index 701aeaa..8f1b20b 100644
+--- a/src/i830_sdvo.c
++++ b/src/i830_sdvo.c
+@@ -79,6 +79,11 @@ struct i830_sdvo_priv {
+     Bool is_tv;
+ 
+     /**
++     * This is set if we treat the device as HDMI, instead of DVI.
++     */
++    Bool is_hdmi;
++
++    /**
+      * Returned SDTV resolutions allowed for the current format, if the
+      * device reported it.
+      */
+@@ -770,7 +775,7 @@ i830_sdvo_get_supp_encode(xf86OutputPtr output, struct i830_sdvo_encode *encode)
+ 
+     i830_sdvo_write_cmd(output, SDVO_CMD_GET_SUPP_ENCODE, NULL, 0);
+     status = i830_sdvo_read_response(output, encode, sizeof(*encode));
+-    if (status != SDVO_CMD_STATUS_SUCCESS) {
++    if (status != SDVO_CMD_STATUS_SUCCESS) { /* non-support means DVI */
+ 	memset(encode, 0, sizeof(*encode));
+ 	return FALSE;
+     }
+@@ -1034,7 +1039,7 @@ i830_sdvo_mode_set(xf86OutputPtr output, DisplayModePtr mode,
+ 			&in_out, sizeof(in_out));
+     status = i830_sdvo_read_response(output, NULL, 0);
+ 
+-    if (dev_priv->encode.hdmi_rev)
++    if (dev_priv->is_hdmi)
+ 	i830_sdvo_set_avi_infoframe(output, mode);
+ 
+     i830_sdvo_get_dtd_from_mode(&input_dtd, mode);
+@@ -1722,6 +1727,22 @@ i830_sdvo_select_ddc_bus(struct i830_sdvo_priv *dev_priv)
+     dev_priv->ddc_bus = 1 << num_bits;
+ }
+ 
++static Bool
++i830_sdvo_get_digital_encoding_mode(xf86OutputPtr output)
++{
++    I830OutputPrivatePtr    intel_output = output->driver_private;
++    struct i830_sdvo_priv   *dev_priv = intel_output->dev_priv;
++    uint8_t status;
++
++    i830_sdvo_set_target_output(output, dev_priv->controlled_output);
++
++    i830_sdvo_write_cmd(output, SDVO_CMD_GET_ENCODE, NULL, 0);
++    status = i830_sdvo_read_response(output, &dev_priv->is_hdmi, 1);
++    if (status != SDVO_CMD_STATUS_SUCCESS)
++	return FALSE;
++    return TRUE;
++}
++
+ Bool
+ i830_sdvo_init(ScrnInfoPtr pScrn, int output_device)
+ {
+@@ -1849,8 +1870,9 @@ i830_sdvo_init(ScrnInfoPtr pScrn, int output_device)
+         output->subpixel_order = SubPixelHorizontalRGB;
+ 	name_prefix="TMDS";
+ 
+-	i830_sdvo_get_supp_encode(output, &dev_priv->encode);
+-	if (dev_priv->encode.hdmi_rev != 0) {
++	if (i830_sdvo_get_supp_encode(output, &dev_priv->encode) &&
++		i830_sdvo_get_digital_encoding_mode(output) &&
++		dev_priv->is_hdmi) {
+ 	    /* enable hdmi encoding mode if supported */
+ 	    i830_sdvo_set_encode(output, SDVO_ENCODE_HDMI);
+ 	    i830_sdvo_set_colorimetry(output, SDVO_COLORIMETRY_RGB256);
+-- 
+1.5.6.4
+
diff --git a/x11-drivers/xf86-video-i810/files/2.4.0/0007-Disable-display-clock-gating-for-4-series-chips.patch b/x11-drivers/xf86-video-i810/files/2.4.0/0007-Disable-display-clock-gating-for-4-series-chips.patch
new file mode 100644
index 000000000000..0ab269a0c14e
--- /dev/null
+++ b/x11-drivers/xf86-video-i810/files/2.4.0/0007-Disable-display-clock-gating-for-4-series-chips.patch
@@ -0,0 +1,23 @@
+From 02844d4dc0995f07dd438997ecc39bd9e3c4779b Mon Sep 17 00:00:00 2001
+From: Zhenyu Wang <zhenyu.z.wang@intel.com>
+Date: Mon, 11 Aug 2008 15:16:09 +0800
+Subject: [PATCH] Disable display clock gating for 4 series chips
+ (cherry picked from commit d0018a96064ee0adfe87c2d50c341bf7d2e45eb0)
+
+
+diff --git a/src/i830_driver.c b/src/i830_driver.c
+index f5aa114..f27d957 100644
+--- a/src/i830_driver.c
++++ b/src/i830_driver.c
+@@ -973,7 +973,7 @@ i830_init_clock_gating(ScrnInfoPtr pScrn)
+ 
+     /* Disable clock gating reported to work incorrectly according to the specs.
+      */
+-    if (IS_GM45(pI830)) {
++    if (IS_GM45(pI830) || IS_G4X(pI830)) {
+ 	OUTREG(RENCLK_GATE_D1, 0);
+ 	OUTREG(RENCLK_GATE_D2, 0);
+ 	OUTREG(RAMCLK_GATE_D, 0);
+-- 
+1.5.6.4
+
diff --git a/x11-drivers/xf86-video-i810/files/2.4.0/0008-Fix-possible-spurious-interrupts-in-hotplug-detect-o.patch b/x11-drivers/xf86-video-i810/files/2.4.0/0008-Fix-possible-spurious-interrupts-in-hotplug-detect-o.patch
new file mode 100644
index 000000000000..b5e291e0ff92
--- /dev/null
+++ b/x11-drivers/xf86-video-i810/files/2.4.0/0008-Fix-possible-spurious-interrupts-in-hotplug-detect-o.patch
@@ -0,0 +1,41 @@
+From 81bd24d8b1a3cdb8a539f4ca0c5f546e4c8070ed Mon Sep 17 00:00:00 2001
+From: Zhenyu Wang <zhenyu.z.wang@intel.com>
+Date: Mon, 11 Aug 2008 15:16:44 +0800
+Subject: [PATCH] Fix possible spurious interrupts in hotplug detect on 4 series chip
+ (cherry picked from commit d592eabc806b752053ade3c18e9dd8e0f39b45a3)
+
+
+diff --git a/src/i810_reg.h b/src/i810_reg.h
+index 515e73d..8690954 100644
+--- a/src/i810_reg.h
++++ b/src/i810_reg.h
+@@ -2813,4 +2813,6 @@ typedef enum {
+ #define DPFC_STATUS2		0x3214
+ #define DPFC_FENCE_YOFF		0x3218
+ 
++#define PEG_BAND_GAP_DATA	0x14d68
++
+ #endif /* _I810_REG_H */
+diff --git a/src/i830_hdmi.c b/src/i830_hdmi.c
+index 58d1c49..d56eec9 100644
+--- a/src/i830_hdmi.c
++++ b/src/i830_hdmi.c
+@@ -140,6 +140,15 @@ i830_hdmi_detect(xf86OutputPtr output)
+     I830Ptr pI830 = I830PTR(pScrn);
+     uint32_t temp, bit;
+ 
++    /* For G4X, PEG_BAND_GAP_DATA 3:0 must first be written 0xd.
++     * Failure to do so will result in spurious interrupts being
++     * generated on the port when a cable is not attached.
++     */
++    if (IS_G4X(pI830)) {
++	temp = INREG(PEG_BAND_GAP_DATA);
++	OUTREG(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
++    }
++
+     temp = INREG(PORT_HOTPLUG_EN);
+ 
+     OUTREG(PORT_HOTPLUG_EN,
+-- 
+1.5.6.4
+
diff --git a/x11-drivers/xf86-video-i810/xf86-video-i810-2.4.0-r1.ebuild b/x11-drivers/xf86-video-i810/xf86-video-i810-2.4.0-r1.ebuild
new file mode 100644
index 000000000000..e30fa751c3fb
--- /dev/null
+++ b/x11-drivers/xf86-video-i810/xf86-video-i810-2.4.0-r1.ebuild
@@ -0,0 +1,54 @@
+# Copyright 1999-2008 Gentoo Foundation
+# Distributed under the terms of the GNU General Public License v2
+# $Header: /var/cvsroot/gentoo-x86/x11-drivers/xf86-video-i810/xf86-video-i810-2.4.0-r1.ebuild,v 1.1 2008/08/11 09:17:51 remi Exp $
+
+# Must be before x-modular eclass is inherited
+# Enable snapshot to get the man page in the right place
+# This should be fixed with a XDP patch later
+SNAPSHOT="yes"
+XDPVER=-1
+
+inherit x-modular
+
+# This really needs a pkgmove...
+SRC_URI="http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-${PV}.tar.bz2"
+
+S="${WORKDIR}/xf86-video-intel-${PV}"
+
+DESCRIPTION="X.Org driver for Intel cards"
+
+KEYWORDS="~amd64 ~arm ~ia64 ~sh ~x86 ~x86-fbsd"
+IUSE="dri"
+
+RDEPEND=">=x11-base/xorg-server-1.2
+	x11-libs/libXvMC"
+DEPEND="${RDEPEND}
+	x11-proto/fontsproto
+	x11-proto/randrproto
+	x11-proto/renderproto
+	x11-proto/xextproto
+	x11-proto/xineramaproto
+	x11-proto/xproto
+	dri? ( x11-proto/xf86driproto
+			x11-proto/glproto
+			>=x11-libs/libdrm-2.2
+			x11-libs/libX11 )"
+
+CONFIGURE_OPTIONS="$(use_enable dri)"
+
+PATCHES=(
+"${FILESDIR}/${PV}/0001-Update-DSPARB-while-planes-are-still-off.patch"
+"${FILESDIR}/${PV}/0002-Reorder-visuals-reported-by-the-intel-driver.patch"
+"${FILESDIR}/${PV}/0003-Don-t-program-dsparb-on-new-Intel-chip.patch"
+"${FILESDIR}/${PV}/0004-Fix-SDVO-reg-definition.patch"
+"${FILESDIR}/${PV}/0005-Fix-up-the-HP-Pavilion-ze4944ea-quirk.patch"
+"${FILESDIR}/${PV}/0006-Fix-SDVO-HDMI-encoding-detect-16920.patch"
+"${FILESDIR}/${PV}/0007-Disable-display-clock-gating-for-4-series-chips.patch"
+"${FILESDIR}/${PV}/0008-Fix-possible-spurious-interrupts-in-hotplug-detect-o.patch"
+)
+
+pkg_setup() {
+	if use dri && ! built_with_use x11-base/xorg-server dri; then
+		die "Build x11-base/xorg-server with USE=dri."
+	fi
+}