metadata/md5-cache/sci-electronics/gplcver-2.12a


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DEFINED_PHASES=compile install test unpack
DESCRIPTION=Verilog simulator
EAPI=0
HOMEPAGE=https://sourceforge.net/projects/gplcver
KEYWORDS=~amd64 ~ppc ~x86
LICENSE=GPL-2
SLOT=0
SRC_URI=http://www.pragmatic-c.com/gpl-cver/downloads/gplcver-2.12a.src.tar.bz2
_eclass_exported_funcs=src_unpack:- src_compile:- src_test:- src_install:-
_md5_=754b6f1561174b7471bd952e9c1e0901