blob: bee32d203c65cae615049dc1d76467f41ee9bb55 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
|
BDEPEND=dev-util/gperf sys-devel/bison sys-devel/flex >=app-portage/elt-patches-20170815 || ( >=sys-devel/automake-1.16.1:1.16 >=sys-devel/automake-1.15.1:1.15 ) >=sys-devel/autoconf-2.69 >=sys-devel/libtool-2.4 >=dev-vcs/git-1.8.2.1[curl]
DEFINED_PHASES=install prepare unpack
DEPEND=sys-libs/readline:= sys-libs/zlib
DESCRIPTION=A Verilog simulation and synthesis tool
EAPI=7
HOMEPAGE=http://iverilog.icarus.com https://github.com/steveicarus/iverilog
LICENSE=LGPL-2.1
PROPERTIES=live
RDEPEND=sys-libs/readline:= sys-libs/zlib
SLOT=0
_eclasses_=autotools 7d999b62b8749fad43fff00620cedf47 git-r3 3e7ec3d6619213460c85e2aa48398441 libtool f143db5a74ccd9ca28c1234deffede96 multilib 98584e405e2b0264d37e8f728327fed1 toolchain-funcs 605c126bed8d87e4378d5ff1645330cb
_md5_=53fe7f5f4565527a26b28a22c2a45c7c
|